Akira Hatanaka [Mon, 3 Oct 2011 21:23:18 +0000 (21:23 +0000)]
Add support for 64-bit logical NOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141029
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Akira Hatanaka [Mon, 3 Oct 2011 21:16:50 +0000 (21:16 +0000)]
Add support for 64-bit count leading ones and zeros instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141028
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Bill Wendling [Mon, 3 Oct 2011 21:15:28 +0000 (21:15 +0000)]
Move the grabbing of the jump buffer into the caller function, eliminating the need for returning a std::pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141026
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Jim Grosbach [Mon, 3 Oct 2011 21:12:43 +0000 (21:12 +0000)]
ARM assembly parsing and encoding for VMRS/FMSTAT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141025
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Akira Hatanaka [Mon, 3 Oct 2011 21:06:13 +0000 (21:06 +0000)]
Add support for 64-bit divide instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141024
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Devang Patel [Mon, 3 Oct 2011 20:59:18 +0000 (20:59 +0000)]
Add C api for Instruction->eraseFromParent().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141023
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Jim Grosbach [Mon, 3 Oct 2011 20:58:08 +0000 (20:58 +0000)]
Update test for 141010.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141022
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Jim Grosbach [Mon, 3 Oct 2011 20:51:59 +0000 (20:51 +0000)]
Thumb2 ADD/SUB can take SP as a destination register.
It's documented as a separate instruction to line up with the Thumb1
encodings, for which it really is a distinct instruction encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141020
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Akira Hatanaka [Mon, 3 Oct 2011 20:38:08 +0000 (20:38 +0000)]
Clean up MipsInstrInfo::copyPhysReg and handle copies from and to 64-bit integer
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141019
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Akira Hatanaka [Mon, 3 Oct 2011 20:01:11 +0000 (20:01 +0000)]
Add support for 64-bit integer multiply instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141017
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Akira Hatanaka [Mon, 3 Oct 2011 19:28:44 +0000 (19:28 +0000)]
Add definitions of instructions which move values between 64-bit integer
registers and 64-bit HI and LO registers. Fix encoding of the 32-bit versions
of the instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141015
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Bob Wilson [Mon, 3 Oct 2011 18:48:16 +0000 (18:48 +0000)]
Find the strip tool that works with the specified SDKROOT. rdar://
10165908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141013
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Jim Grosbach [Mon, 3 Oct 2011 17:59:31 +0000 (17:59 +0000)]
Tidy up a bit. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141010
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Craig Topper [Mon, 3 Oct 2011 17:28:23 +0000 (17:28 +0000)]
Add support for MOVBE and RDRAND instructions for the assembler and disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141007
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Eric Christopher [Mon, 3 Oct 2011 15:49:20 +0000 (15:49 +0000)]
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141005
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Eric Christopher [Mon, 3 Oct 2011 15:49:16 +0000 (15:49 +0000)]
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141004
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Rafael Espindola [Mon, 3 Oct 2011 14:45:37 +0000 (14:45 +0000)]
Add the returns_twice attribute to LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141001
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Craig Topper [Mon, 3 Oct 2011 08:14:29 +0000 (08:14 +0000)]
Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140997
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Craig Topper [Mon, 3 Oct 2011 07:53:59 +0000 (07:53 +0000)]
Test updates that were supposed to go with r140993.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140994
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Craig Topper [Mon, 3 Oct 2011 07:51:09 +0000 (07:51 +0000)]
Fix VEX disassembling to ignore REX.RXBW bits in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140993
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Nick Lewycky [Mon, 3 Oct 2011 07:10:45 +0000 (07:10 +0000)]
Reapply r140979 with fix! We never did get a testcase, but careful review of the
logic by David Meyer revealed this bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140992
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Torok Edwin [Mon, 3 Oct 2011 06:41:46 +0000 (06:41 +0000)]
attempt to fix ocaml bindings: landing pads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140991
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Nick Lewycky [Mon, 3 Oct 2011 05:14:59 +0000 (05:14 +0000)]
Revert r140979 due to reports of bootstrap failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140980
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Nick Lewycky [Mon, 3 Oct 2011 01:03:57 +0000 (01:03 +0000)]
Add one more case we compute a max trip count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140979
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Craig Topper [Sun, 2 Oct 2011 21:08:12 +0000 (21:08 +0000)]
Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140974
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Craig Topper [Sun, 2 Oct 2011 16:56:09 +0000 (16:56 +0000)]
Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140971
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Nick Lewycky [Sun, 2 Oct 2011 10:37:37 +0000 (10:37 +0000)]
Add a new icmp+select optz'n. Also shows off the load(cst) folding added in
r140966.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140969
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Nick Lewycky [Sun, 2 Oct 2011 09:12:55 +0000 (09:12 +0000)]
Enhance a couple places where we were doing constant folding of instructions,
but not load instructions. Noticed by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140966
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Craig Topper [Sun, 2 Oct 2011 04:54:26 +0000 (04:54 +0000)]
Fix typo in r140954.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140962
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Ted Kremenek [Sun, 2 Oct 2011 01:47:07 +0000 (01:47 +0000)]
Make canonicalization of ImmutableSetRef::asImmutableSet() semi-explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140959
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Craig Topper [Sat, 1 Oct 2011 21:20:14 +0000 (21:20 +0000)]
Fix disassembling of INVEPT and INVVPID to take operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140955
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Craig Topper [Sat, 1 Oct 2011 19:54:56 +0000 (19:54 +0000)]
Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140954
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Chad Rosier [Sat, 1 Oct 2011 19:30:36 +0000 (19:30 +0000)]
Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions."
to appease nightly testers. Not quite there yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140953
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Nadav Rotem [Sat, 1 Oct 2011 18:39:28 +0000 (18:39 +0000)]
Moved type construction out of the loop and added an assert on the legality of the type. Formatted lines to the 80 char limit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140952
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Peter Collingbourne [Sat, 1 Oct 2011 16:41:13 +0000 (16:41 +0000)]
Move TableGen's parser and entry point into a library
This is the first step towards splitting LLVM and Clang's tblgen executables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951
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Bill Wendling [Sat, 1 Oct 2011 12:47:34 +0000 (12:47 +0000)]
No one should be using the method directly. Assert if they do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140947
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Bill Wendling [Sat, 1 Oct 2011 12:44:28 +0000 (12:44 +0000)]
Add a convenience method to tell if two things are equal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140946
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Bill Wendling [Sat, 1 Oct 2011 09:30:42 +0000 (09:30 +0000)]
Use the ARMConstantPoolMBB class to handle the MBB values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140943
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Bill Wendling [Sat, 1 Oct 2011 09:19:10 +0000 (09:19 +0000)]
Add ARMConstantPoolMBB to hold an MBB value in the constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140942
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Bill Wendling [Sat, 1 Oct 2011 09:05:12 +0000 (09:05 +0000)]
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140941
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Bill Wendling [Sat, 1 Oct 2011 09:04:18 +0000 (09:04 +0000)]
Remove now dead methods and ivar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140940
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Bill Wendling [Sat, 1 Oct 2011 08:58:29 +0000 (08:58 +0000)]
Use the new ARMConstantPoolSymbol class to handle external symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140939
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Bill Wendling [Sat, 1 Oct 2011 08:36:59 +0000 (08:36 +0000)]
Add an ARMConstantPool class for external symbols. This will split out the support for external symbols from the base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140938
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Bill Wendling [Sat, 1 Oct 2011 08:02:05 +0000 (08:02 +0000)]
Remove now dead methods and ivar from ARMConstantPoolValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140937
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Bill Wendling [Sat, 1 Oct 2011 08:00:54 +0000 (08:00 +0000)]
Switch over to using ARMConstantPoolConstant for global variables, functions,
and block addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140936
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Bill Wendling [Sat, 1 Oct 2011 07:52:37 +0000 (07:52 +0000)]
Some more refactoring.
* Add a couple of Create methods to the ARMConstantPoolConstant class,
* Add its own version of getExistingMachineCPValue, and
* Modify hasSameValue to return false if the object isn't an ARMConstantPoolConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140935
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Bill Wendling [Sat, 1 Oct 2011 06:44:24 +0000 (06:44 +0000)]
Add a Create method that accepts 'kind' and 'pcadj' arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140934
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Bill Wendling [Sat, 1 Oct 2011 06:40:33 +0000 (06:40 +0000)]
Refactoring: Separate out the ARM constant pool Constant from the ARM constant
pool value.
It's not used right now, but will be soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140933
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Bob Wilson [Sat, 1 Oct 2011 02:47:54 +0000 (02:47 +0000)]
Subtarget getFeatureBits() returns a uint64_t, not unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140928
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Chad Rosier [Sat, 1 Oct 2011 02:03:18 +0000 (02:03 +0000)]
Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact
useful if an optimization assumes the stack has been realigned. Credit to
Eli for his assistance.
rdar://
10043857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140924
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Andrew Trick [Sat, 1 Oct 2011 01:39:05 +0000 (01:39 +0000)]
Inlining and unrolling heuristics should be aware of free truncs.
We want heuristics to be based on accurate data, but more importantly
we don't want llvm to behave randomly. A benign trunc inserted by an
upstream pass should not cause a wild swings in optimization
level. See PR11034. It's a general problem with threshold-based
heuristics, but we can make it less bad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140919
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Andrew Trick [Sat, 1 Oct 2011 01:27:56 +0000 (01:27 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140916
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Michael J. Spencer [Sat, 1 Oct 2011 00:05:20 +0000 (00:05 +0000)]
Add Windows x64 stack walking support. Patch by Aaron Ballman!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140906
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 23:47:05 +0000 (23:47 +0000)]
Use precomputed BitVector for CodeGenRegisterClass::hasSubClass().
All the sub-class bit vectors are computed when first creating the
register bank.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140905
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Bill Wendling [Fri, 30 Sep 2011 23:40:29 +0000 (23:40 +0000)]
Filecheck-ize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140904
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Bill Wendling [Fri, 30 Sep 2011 23:21:11 +0000 (23:21 +0000)]
Add new line at end of file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140903
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Bill Wendling [Fri, 30 Sep 2011 23:19:55 +0000 (23:19 +0000)]
When inferring the pointer alignment, if the global doesn't have an initializer
and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.
For instance, in file A.c:
struct S s;
In file B.c:
struct {
// something long
};
extern S s;
void foo() {
struct S p = s;
// ...
}
this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140902
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Nick Lewycky [Fri, 30 Sep 2011 22:19:53 +0000 (22:19 +0000)]
Promote comment to doxycomment. Adjust whitespace. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140899
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 22:19:07 +0000 (22:19 +0000)]
Store sub-class lists as a bit vector.
This uses less memory and it reduces the complexity of sub-class
operations:
- hasSubClassEq() and friends become O(1) instead of O(N).
- getCommonSubClass() becomes O(N) instead of O(N^2).
In the future, TableGen will infer register classes. This makes it
cheap to add them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140898
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 22:18:54 +0000 (22:18 +0000)]
Extract a slightly more general BitVector printer.
This one can also print 32-bit groups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140897
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 22:18:51 +0000 (22:18 +0000)]
Move getCommonSubClass() into TRI.
It will soon need the context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 22:18:45 +0000 (22:18 +0000)]
Compute lists of super-classes in CodeGenRegisterClass.
Use these lists instead of computing them on the fly in
RegisterInfoEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140895
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Jim Grosbach [Fri, 30 Sep 2011 22:02:45 +0000 (22:02 +0000)]
Correct for my over-eager delete finger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140892
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Akira Hatanaka [Fri, 30 Sep 2011 21:55:40 +0000 (21:55 +0000)]
Add definition of MipsELFObjectWriter.
Patch by Reed Kotler at Mips Technologies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140891
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Akira Hatanaka [Fri, 30 Sep 2011 21:29:38 +0000 (21:29 +0000)]
Register the MC object streamer.
Patch by Reed Kotler at Mips Technologies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140887
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Akira Hatanaka [Fri, 30 Sep 2011 21:23:45 +0000 (21:23 +0000)]
Register Asm backend. Add functions to MipsAsmBackend.
Patch by Reed Kotler at Mips Technologies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140886
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Akira Hatanaka [Fri, 30 Sep 2011 21:04:02 +0000 (21:04 +0000)]
Add MCELFObjectTargetWriter and MCAsmBackend classes.
Patch by Reed Kotler at Mips Technologies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140885
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David Greene [Fri, 30 Sep 2011 20:59:52 +0000 (20:59 +0000)]
Test More Complicated Lists
Test of indexing lists of lists of lists works. This also exercises
some operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140884
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David Greene [Fri, 30 Sep 2011 20:59:51 +0000 (20:59 +0000)]
Test VarListElementInit:: resolveListElementReference
Add a TableGen test to check if indexing lists of lists works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140883
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David Greene [Fri, 30 Sep 2011 20:59:49 +0000 (20:59 +0000)]
Implement VarListElementInit:: resolveListElementReference
Implement VarListElementInit:: resolveListElementReference so that
lists of lists can be indexed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140882
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Benjamin Kramer [Fri, 30 Sep 2011 20:44:33 +0000 (20:44 +0000)]
Update CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140879
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Akira Hatanaka [Fri, 30 Sep 2011 20:40:03 +0000 (20:40 +0000)]
Initial implementation of MipsMCCodeEmitter.
Patch by Reed Kotler at Mips Technologies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140878
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Jim Grosbach [Fri, 30 Sep 2011 19:58:46 +0000 (19:58 +0000)]
Don't modify constant in-place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140875
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Andrew Trick [Fri, 30 Sep 2011 19:50:40 +0000 (19:50 +0000)]
Tracing or debug-printing a newly formed instruction should not crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140874
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Andrew Trick [Fri, 30 Sep 2011 19:48:58 +0000 (19:48 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140873
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Akira Hatanaka [Fri, 30 Sep 2011 19:18:24 +0000 (19:18 +0000)]
Remove unnecessary checking of register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140872
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Akira Hatanaka [Fri, 30 Sep 2011 18:51:46 +0000 (18:51 +0000)]
Add definitions of Mips64 rotate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140870
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Jim Grosbach [Fri, 30 Sep 2011 18:45:50 +0000 (18:45 +0000)]
float comparison to double 'zero' constant can just be a float 'zero.'
InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.
We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
%conv = fpext float %x to double
%cmp = fcmp olt double %conv, 0.
000000e+00
%conv1 = zext i1 %cmp to i32
%conv2 = sitofp i32 %conv1 to float
ret float %conv2
}
Into:
define float @bar(float %x) nounwind readnone optsize ssp {
%cmp = fcmp olt float %x, 0.
000000e+00 ; <---- This
%conv1 = zext i1 %cmp to i32
%conv2 = sitofp i32 %conv1 to float
ret float %conv2
}
rdar://
10215914
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140869
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Bill Wendling [Fri, 30 Sep 2011 18:42:06 +0000 (18:42 +0000)]
Constify 'isLSDA' and move a method out-of-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140868
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Jim Grosbach [Fri, 30 Sep 2011 18:09:53 +0000 (18:09 +0000)]
Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140865
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Jim Grosbach [Fri, 30 Sep 2011 17:41:35 +0000 (17:41 +0000)]
ARM Darwin default relocation model is PIC.
This matches clang, so default options in llc and friends are now closer to
clang's defaults.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140863
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Akira Hatanaka [Fri, 30 Sep 2011 17:26:36 +0000 (17:26 +0000)]
isCommutable should be 0 for DSUBu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140862
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Jim Grosbach [Fri, 30 Sep 2011 17:23:05 +0000 (17:23 +0000)]
ARM Fixup valus for movt/movw are for the whole value.
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.
rdar://
9653509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140861
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Akira Hatanaka [Fri, 30 Sep 2011 17:19:21 +0000 (17:19 +0000)]
Check values of immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140860
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 17:03:55 +0000 (17:03 +0000)]
Fix a bug in compare_numeric().
Thanks to Alexandru Dura and Jonas Paulsson for finding it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140859
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Duncan Sands [Fri, 30 Sep 2011 17:00:34 +0000 (17:00 +0000)]
Add forgotten tests that the cleanup flag is cleared if there
is a catch-all landingpad clause.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140858
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Danil Malyshev [Fri, 30 Sep 2011 16:40:10 +0000 (16:40 +0000)]
MCJIT initialization TargetData
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140856
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Justin Holewinski [Fri, 30 Sep 2011 14:36:36 +0000 (14:36 +0000)]
PTX: Various stylistic and code readability changes recommended by Jim Grosbach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140855
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Justin Holewinski [Fri, 30 Sep 2011 13:46:52 +0000 (13:46 +0000)]
PTX: Add programmable rounding mode specifier for int <-> fp conversion instrs.
Also take this opportunity to clean up the rounding mode pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140854
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Duncan Sands [Fri, 30 Sep 2011 13:12:16 +0000 (13:12 +0000)]
Inlining often produces landingpad instructions with repeated
catch or repeated filter clauses. Teach instcombine a bunch
of tricks for simplifying landingpad clauses. Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function. Probably
someone should add the ObjC++ personality function. I didn't as
I don't know anything about it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140852
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Torok Edwin [Fri, 30 Sep 2011 13:07:52 +0000 (13:07 +0000)]
some 3.0 API notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140851
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Torok Edwin [Fri, 30 Sep 2011 13:07:47 +0000 (13:07 +0000)]
Comment grammar fixes.
thanks to Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140850
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Justin Holewinski [Fri, 30 Sep 2011 12:54:43 +0000 (12:54 +0000)]
PTX: Attempt to cleanup/unify the handling of FP rounding modes. This requires
us to manually provide Pat<> definitions for all FP instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140849
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Torok Edwin [Fri, 30 Sep 2011 12:31:57 +0000 (12:31 +0000)]
Instead of crashing when MCAsmInfo is NULL, add an assert.
This helps with porting code from 2.9 to 3.0 as TargetSelect.h changed location,
and if you include the old one by accident you will trigger this assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140848
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Akira Hatanaka [Fri, 30 Sep 2011 03:18:46 +0000 (03:18 +0000)]
Mips64 shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140841
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Akira Hatanaka [Fri, 30 Sep 2011 02:08:54 +0000 (02:08 +0000)]
Mips64 arithmetic and logical instructions with one source register and
immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140839
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Jim Grosbach [Fri, 30 Sep 2011 00:50:06 +0000 (00:50 +0000)]
ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.
rdar://
10211428
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140834
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 00:10:40 +0000 (00:10 +0000)]
Precompute a bit vector of register sub-classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140827
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Jakob Stoklund Olesen [Fri, 30 Sep 2011 00:10:36 +0000 (00:10 +0000)]
Order register classes topologically.
All register classes are given a lower ID than their sub-classes.
Cliques are ordered alphabetically.
This will be used to simplify some sub-class operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140826
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Akira Hatanaka [Thu, 29 Sep 2011 23:52:13 +0000 (23:52 +0000)]
Fill delay slot with useful instructions. Modified from Sparc's version of delay
slot filler.
Patch by Reed Kotler at Mips Technologies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140825
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