Mark Yao [Fri, 8 Jul 2016 09:24:36 +0000 (17:24 +0800)]
drm/rockchip: vop: add x/ymirror support
Change-Id: If7d1ef5f3246f467c48895aa2f54957bd59eed18
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Roger Chen [Mon, 11 Jul 2016 03:12:37 +0000 (11:12 +0800)]
net: phy: fix sysfs operation for writing PHY's registers
Change-Id: Ic6cc82c8eb8e20572e77ae703755440012cd3f46
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Mark Yao [Thu, 7 Jul 2016 00:45:23 +0000 (08:45 +0800)]
drm/rockchip: vop: fixup plane zpos
Set unused plane with top zpos will cause a alpha problem.
if there are two planes use same zpos, hardware will do twice
alpha compute, that would cause display abnormal.
Change-Id: I3b5d15c5239412c670ad377edbcc66d7f6c59341
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Roger Chen [Mon, 11 Jul 2016 02:05:18 +0000 (10:05 +0800)]
net: stmmac: dwmac-rk: fix for GMAC resume after PD off/on
GMAC Power Domain(PD) will be disabled during suspend.
That will causes GRF registers reset.
So corresponding GRF registers for GMAC must be setup again.
Change-Id: I9ca541c4599299bad309b810994824d364c2a510
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Chen Liang [Fri, 8 Jul 2016 02:37:53 +0000 (10:37 +0800)]
ARM64: sched: fix bug: remove printk while schedule is in progress
It will cause deadlock and while(1) if call printk while schedule
is in progress. The block state like as below:
cpu0(hold the console sem):
printk->console_unlock->up_sem->spin_lock(&sem->lock)->wake_up_process(cpu1)
->try_to_wake_up(cpu1)->while(p->on_cpu).
cpu1(request console sem):
console_lock->down_sem->schedule->idle_banlance->update_cpu_capacity->
printk->console_trylock->spin_lock(&sem->lock).
p->on_cpu will be 1 forever, because the task is still running on cpu1,
so cpu0 is blocked in while(p->on_cpu), but cpu1 could not get
spin_lock(&sem->lock), it is blocked too, it means the task will running
on cpu1 forever.
Change-Id: I60d02d8c957273872f97939632bdd235accdad4e
Signed-off-by: Chen Liang <cl@rock-chips.com>
Huang Jiachai [Thu, 7 Jul 2016 07:39:07 +0000 (15:39 +0800)]
video: rockchip: rk fb: add debug message
Change-Id: I9af8c17dd95fbf7c9ce44d9cb912071f05fd6014
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huang, Tao [Thu, 7 Jul 2016 13:32:56 +0000 (21:32 +0800)]
regulator: xz3216: Add a sentinel to xz3216_i2c_id[]
This patch fix this bug:
BUG: KASAN: global-out-of-bounds in i2c_device_match+0x64/0xa4 at addr
ffffff9009046800
Read of size 1 by task swapper/0/1
Address belongs to variable xz3216_i2c_id+0x20/0x2c0
CPU: 5 PID: 1 Comm: swapper/0 Not tainted 4.4.14 #21
Hardware name: Rockchip RK3399 Evaluation Board v2 (Android) (DT)
Call trace:
[<
ffffff900808b2d8>] dump_backtrace+0x0/0x288
[<
ffffff900808b574>] show_stack+0x14/0x1c
[<
ffffff90084c16c4>] dump_stack+0xc4/0x100
[<
ffffff900823fdd4>] kasan_report+0x36c/0x49c
[<
ffffff900823f2e4>] __asan_load1+0x24/0x50
[<
ffffff90088f7924>] i2c_device_match+0x64/0xa4
[<
ffffff90086829b8>] __device_attach_driver+0x80/0xd8
[<
ffffff900868064c>] bus_for_each_drv+0xf8/0x12c
[<
ffffff900868232c>] __device_attach+0x114/0x1a4
[<
ffffff9008682b9c>] device_initial_probe+0x10/0x18
[<
ffffff9008680904>] bus_probe_device+0x50/0xe8
[<
ffffff900867ee14>] device_add+0x5f8/0x774
[<
ffffff900867efac>] device_register+0x1c/0x28
[<
ffffff90088f7dd0>] i2c_new_device+0x258/0x2a4
[<
ffffff90088f853c>] i2c_register_adapter+0x4b4/0x600
[<
ffffff90088f8700>] __i2c_add_numbered_adapter+0x78/0x88
[<
ffffff90088f8d9c>] i2c_add_adapter+0x50/0xcc
[<
ffffff9008900c1c>] rk3x_i2c_probe+0x460/0x4fc
[<
ffffff9008684fac>] platform_drv_probe+0x70/0xc8
[<
ffffff9008682648>] driver_probe_device+0x16c/0x364
[<
ffffff90086828d4>] __driver_attach+0x94/0xc8
[<
ffffff9008680010>] bus_for_each_dev+0xe0/0x11c
[<
ffffff9008682bd4>] driver_attach+0x30/0x3c
[<
ffffff9008680ca8>] bus_add_driver+0x160/0x294
[<
ffffff9008683edc>] driver_register+0x10c/0x168
[<
ffffff9008685e34>] __platform_driver_register+0x7c/0x88
[<
ffffff90095da854>] rk3x_i2c_driver_init+0x18/0x20
[<
ffffff90095a4df0>] do_one_initcall+0x168/0x220
[<
ffffff90095a5078>] kernel_init_freeable+0x1d0/0x274
[<
ffffff9008ec5f40>] kernel_init+0x10/0x108
[<
ffffff9008084cd0>] ret_from_fork+0x10/0x40
Memory state around the buggy address:
ffffff9009046700: fa fa fa fa 00 03 fa fa fa fa fa fa 00 00 00 07
ffffff9009046780: fa fa fa fa 07 fa fa fa fa fa fa fa 00 00 00 00
>
ffffff9009046800: fa fa fa fa 00 01 fa fa fa fa fa fa 00 01 fa fa
^
ffffff9009046880: fa fa fa fa 04 fa fa fa fa fa fa fa 00 04 fa fa
ffffff9009046900: fa fa fa fa 00 05 fa fa fa fa fa fa 07 fa fa fa
Change-Id: I624d92b1fefdf87cfb58b9df10db85723b5ed534
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Jeffy Chen [Wed, 6 Jul 2016 08:13:20 +0000 (16:13 +0800)]
ARM: dts: rk3288: limit vpu aclk freq to 400M
Change-Id: I800c50f8c2940921aaa0d388459fb218f1dd874c
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Wed, 6 Jul 2016 08:04:36 +0000 (16:04 +0800)]
ARM: dts: rk3036: limit vpu aclk freq to 297M
Change-Id: I5fe0d49b7bde947188fcf718ffdb850e0c20c066
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Wed, 6 Jul 2016 08:01:46 +0000 (16:01 +0800)]
media: rockchip-vpu: remove force aclk_vcodec 400M
3036's vpu is not stable with 400M.
Change-Id: I5ea988704fd4d82154319cc0b3376aad10d9373b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jacob Chen [Thu, 7 Jul 2016 03:33:40 +0000 (11:33 +0800)]
ARM: dts: rockchip: enable sdmmc for evb rk3288
Change-Id: I9a206e7088afc9910a81c3832d17a6b252d09a1d
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 7 Jul 2016 01:23:37 +0000 (09:23 +0800)]
ARM: dts: rockchip: enable usb host2 for evb rk3288
Change-Id: I2866ef914240a3fb7ae29c35ea61f7a1bf384559
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 7 Jul 2016 01:22:49 +0000 (09:22 +0800)]
ARM: dts: rockchip: enable gmac for evb rk3288
Change-Id: Ib1fa841da0d5b08f5fe7967a8365b4d7467ca8de
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Mark Yao [Wed, 6 Jul 2016 07:09:39 +0000 (15:09 +0800)]
drm/rockchip: force 8bit mode if vop not support 10bit output
Some vop can't support 10bit mode, if connector needs 10bit output,
force to use 8bit rgb888 mode, because the hardware would do the
format convert.
Change-Id: I8cdfbab12dd0ad63d36f3c52a4c7786a2bdbe6a1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Chen Liang [Thu, 7 Jul 2016 03:41:29 +0000 (11:41 +0800)]
ARM64: sched: cpufreq_sched: fix bug: init data before use it in thread
policy->governor_data will be use in cpufreq_sched_thread, but it is init
after wake thread, it will cause NULL point access.
Change-Id: I320a3da34560e49f293211be92cb8310d8e395d7
Signed-off-by: Chen Liang <cl@rock-chips.com>
Chen Liang [Fri, 1 Jul 2016 07:47:14 +0000 (15:47 +0800)]
ARM64: cpufreq_sched: implement event CPUFREQ_GOV_LIMIT for governor
If we do not limit the freqency immediately when the cpu is overheat,
thermal driver will lost the control of temperature. So implement event
CPUFREQ_GOV_LIMIT for governor to limit the freqency immediately.
Change-Id: Id709edd377226417ead92ead2ae3d3d19b3eeabf
Signed-off-by: Chen Liang <cl@rock-chips.com>
Caesar Wang [Wed, 22 Jun 2016 10:13:57 +0000 (18:13 +0800)]
FIXUP: FROMLIST: thermal: rockchip: fixes the exception interrupts
The hardware-tracked trips will set the alarm interrupt value for
registers. Then when the thermal zone has no trips to be set,
That make the thermal trips callback a over range value.
The root cause is the rk_tsadcv2_temp_to_code() function to handle the
invalid temperature range is indeed incorrect, let's fix it on now.
Otherwise, the thermal alarm interrupt will be triggered all the time
on some SoCs.
Fox example:
localhost tmp # grep thermal /proc/interrupts; sleep 5;
grep thermal /proc/interrupts
23: 994830 .. GICv3 129 Level rockchip_thermal
23:
1003423 .. GICv3 129 Level rockchip_thermal
Change-Id: I0ddbd0b2dd9c03e785e588f5f339f1eeed4e1c5c
Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
(am from https://patchwork.kernel.org/patch/
9192357/)
Caesar Wang [Thu, 7 Jul 2016 00:52:34 +0000 (08:52 +0800)]
arm64: dts: rockchip: sync the upstream power domain for rk3399
This patch updates the power domain node to sync upstream.
As Heiko landed on [0].
[0]:
https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/
commit/?id=
6d3cdbf1c219f9817290903e9d1e8de7462a7b54
Change-Id: Ifbf641965d6f66d0f8a941a1162667ac96709847
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Jeffy Chen [Mon, 20 Jun 2016 08:56:41 +0000 (16:56 +0800)]
CHROMIUM: [media]: rockchip-vpu: add rk3288 h264e
Change-Id: Idf6697c107609f5ee80a39c08a5670bebe78c469
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Yakir Yang [Tue, 28 Jun 2016 09:56:31 +0000 (17:56 +0800)]
ARM: dts: rockchip: add the lvds-panel power supply for rk3288-evb-rk808 board
Change-Id: Id90524720ca5012464f8fd7608594b7bdf5d78b0
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Yakir Yang [Tue, 28 Jun 2016 09:54:18 +0000 (17:54 +0800)]
ARM: dts: rockchip: add the lvds-panel power supply for rk3288-evb-act8846 board
Change-Id: I48662e03909459d458ea148b8c37bbffd08371d2
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Yakir Yang [Wed, 27 Jan 2016 08:23:43 +0000 (16:23 +0800)]
ARM: dts: rk3288-evb: Add lvds device node on rk3288-evb board
Due to there are only two vop module, that's to say we can't keep
enable eDP / LVDS / HDMI at the same time, so this time we still
keep LVDS device disabled. If you want to enable lvds device,
then you should disable the HDMI or eDP device, and enable the
LVDS device.
And one more thing that eDP panel and LVDS panel can't enable at
the same time, cause both of them have the same enable gpio. If
you still want to do this, there is an hack way that delete the
'enable-gpios' comptabile from 'lvds-panel'.
Change-Id: Iecf71adc4d307dcdb8b7317a93430e99bb12e20a
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Heiko Stuebner [Wed, 1 Apr 2015 10:09:45 +0000 (12:09 +0200)]
ARM: dts: rockchip: add rk3288 lvds node
Add the basic node for the lvds controller of rk3288 and hook it into the
display-subsystem hirarchy.
Change-Id: I150f27e5d9a626342c4fe984167f94ae717ab9ad
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Heiko Stuebner [Wed, 1 Apr 2015 10:09:44 +0000 (12:09 +0200)]
ARM: dts: rockchip: add rk3288 lcdc0 pinmux settings
Add pinctrl settings for the configurable lcdc0 signals dclk, den, hsync
and vsync. The lcdc0 data pin configuration is not software controlable.
Change-Id: I733179908fd4276e919fe44c6125d504926d751a
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Mark Yao [Wed, 1 Apr 2015 10:09:41 +0000 (12:09 +0200)]
drm/rockchip: Add support for Rockchip Soc LVDS
This adds support for Rockchip soc lvds found on rk3288
Change-Id: Iaab32c8c02fb17bf55db97a7952a346ce45c7d09
Signed-off-by: Mark Yao <yzq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Mark Yao [Wed, 1 Apr 2015 10:09:40 +0000 (12:09 +0200)]
dt-bindings: Add documentation for rockchip lvds
Add binding documentation for Rockchip SoC LVDS driver.
Change-Id: Ie5bbf6715d9dc6b1f5793f78f3eec96783c4725e
Signed-off-by: Mark Yao <yzq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Carlos Palminha [Wed, 10 Feb 2016 16:10:39 +0000 (16:10 +0000)]
UPSTREAM: drm/bridge: removed dummy mode_fixup function from dw-hdmi.
Other bridge drivers don't implement this optional function.
Removed dummy code from dw-hdmi brigde driver.
Signed-off-by: Carlos Palminha <palminha@synopsys.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1455120639-29934-1-git-send-email-palminha@synopsys.com
Change-Id: I1ea1c912885b81e269befb2c83b79f5a261f0881
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
6feea0ebbdca2fe1b7e94ec66aca3aa7279af59f)
Thierry Reding [Mon, 16 Nov 2015 17:19:53 +0000 (18:19 +0100)]
UPSTREAM: drm: Do not set connector->encoder in drivers
An encoder is associated with a connector by the DRM core as a result of
setting up a configuration. Drivers using the atomic or legacy helpers
should never set up this link, even if it is a static one.
While at it, try to catch this kind of error in the future by adding a
WARN_ON() in drm_mode_connector_attach_encoder(). Note that this doesn't
cover all the cases, since drivers could set this up after attaching.
Drivers that use the atomic helpers will get a warning later on, though,
so hopefully the two combined cover enough to help people avoid this in
the future.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Mark yao <mark.yao@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1447694393-24700-1-git-send-email-thierry.reding@gmail.com
Change-Id: Iaec2775976574d93810b4e160ac8889d6bb55cad
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
eb47fe8033d6c2013ce47ec44f39fa0092aa8551)
Mark Yao [Mon, 30 Nov 2015 10:33:40 +0000 (18:33 +0800)]
UPSTREAM: drm: bridge/dw_hdmi: add atomic API support
Fill atomic needed funcs with default atomic helper library.
Rockchip use dw_hdmi, and drm/rockchip will covert to atomic api,
we need dw_hdmi support atomic funcs.
Now another drm driver use dw_hdmi is imx, not yet atomic, so
check DRIVER_ATOMIC at runtime to spilt atomic and not atomic.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Change-Id: I519527efaf88b1e5c1b30db1fd23e59d45b88d50
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
2c5b2cccdbde278fb702893404a2ea20f81f0345)
Ville Syrjälä [Tue, 15 Dec 2015 11:21:02 +0000 (12:21 +0100)]
UPSTREAM: drm/bridge/dw_hdmi: Constify function pointer structs
Moves a bunch of junk to .rodata from .data.
drivers/gpu/drm/bridge/dw_hdmi.ko:
-.rodata 120
+.rodata 216
-.data 96
+.data 0
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450178476-26284-15-git-send-email-boris.brezillon@free-electrons.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Change-Id: Ib35041ba0962794da3ff80110c6e429dacaf9178
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
dae91e4d1c7adea85ff97b28dcea72bd234b4bb7)
Thierry Reding [Tue, 24 Nov 2015 16:54:33 +0000 (17:54 +0100)]
UPSTREAM: drm/bridge: Remove gratuitous blank line
A single blank line is enough to separate Kconfig entries.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Change-Id: I325951cc36a4429a8313b61e3f3a44aa24e49958
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
dae91e4d1c7adea85ff97b28dcea72bd234b4bb7)
Thierry Reding [Tue, 24 Nov 2015 16:52:58 +0000 (17:52 +0100)]
UPSTREAM: drm/bridge: dw-hdmi: Use dashes in filenames
For consistency with other drivers, use dashes instead of underscores in
filenames.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Change-Id: Ie872685143935c365b40c3aaf2a104879478ea66
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
248a86fc3092059324e6f8231abd9134c8188ecc)
Huang, Tao [Tue, 5 Jul 2016 06:33:11 +0000 (14:33 +0800)]
arm64: dts: rockchip: set swiotlb buffer size on rk3399 android board
We don't use swiotlb, so keep the size as small as possible.
Change-Id: I1377f4b31112902a5841eafde094d2d12f48e97c
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 02:35:47 +0000 (10:35 +0800)]
ARM64: configs: rockchip_cros_defconfig: enable extcon support
This allows monitoring external connectors by userspace
via sysfs and uevent and supports external connectors with
multiple states. And extcon notifier mechanism is also
useful.
Change-Id: I670da8efbe20f8f12529e9e062fc38b514524dc3
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 02:29:43 +0000 (10:29 +0800)]
ARM64: configs: rockchip_defconfig: enable extcon support
This allows monitoring external connectors by userspace
via sysfs and uevent and supports external connectors with
multiple states. And extcon notifier mechanism is also
useful.
Change-Id: I7aba50c294b04d48bf5d43bfd90a8280fcbd1081
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 02:08:56 +0000 (10:08 +0800)]
extcon: fix duplicate create switch class
If "CONFIG_ANDROID" and "CONFIG_SWITCH" are enabled,
/sys/class/switch/* are created in switch classe driver,
so we can't create switch class again in extcon.
Change-Id: Ida627cfdbb3ecb6f0aa40af146a66897edafd2fe
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Sugar Zhang [Tue, 5 Jul 2016 02:45:11 +0000 (10:45 +0800)]
FROMLIST: ASoC: rockchip: implement system suspend/resume for i2s
restore hw registers after power loss during a suspend/resume cycle.
Change-Id: I109c4acaef8fef12f84e4c1b6d3488891a94ebb2
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9213485/)
Sugar Zhang [Tue, 5 Jul 2016 02:48:06 +0000 (10:48 +0800)]
FROMLIST: ASoC: rockchip: implement system suspend/resume for spdif
restore hw registers after power loss during a suspend/resume cycle.
Change-Id: I8078f5bdd35ff354a375337d641de479b59f14f6
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9213499/)
Jeffy Chen [Wed, 8 Jun 2016 06:05:42 +0000 (14:05 +0800)]
clk: rockchip: rk3036: add ACLK_VCODEC
Change-Id: I36f6b23139345941656c127718cc4ff01c6d629f
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Fri, 1 Jul 2016 08:23:24 +0000 (16:23 +0800)]
ARM: dts: rockchip: enable rockchip-vpu node for rk3036 kylin
Change-Id: I82fe6cd685bbf8e7eb360b40d308890735dcf608
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Wed, 8 Jun 2016 06:04:38 +0000 (14:04 +0800)]
ARM: dts: rockchip: add rockchip-vpu node for rk3036
Change-Id: If4ce05777e4e4fd2460c76a5fff75c8b1901529e
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Rocky Hao [Fri, 1 Jul 2016 08:35:46 +0000 (16:35 +0800)]
thermal: rockchip: optimize sensor auto accessing period
In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.
Change-Id: Ie8038a1ae5837ad4aa31b04d1f3ace299f82e396
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Rocky Hao [Fri, 1 Jul 2016 08:10:26 +0000 (16:10 +0800)]
arm64: dtsi: rk3399: optimize ipa parameters
Big cores' power consumption is as much as 8 times of little cores'.
Eas tends to bring tasks to big cores to assure the performance, and
this will make the temperature of soc out of control. To resolve this
issue, we set the power request weight of both little cores and gpu is
10 times of big cores, when temperature control occurs. Meanwhile, we
decrease passive polling interval to make temperature control more
accurate.
Change-Id: Ib01948c6a4f4383f03f1317b2397f07fbdc3487e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Huang, Tao [Wed, 6 Jul 2016 03:04:57 +0000 (11:04 +0800)]
rk: gcc-wrapper.py ignore memcontrol.c:5274
Change-Id: I353e7681cb3b6dc9a9019479d3f2628449b8ee54
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Aaro Koskinen [Sat, 23 Jan 2016 22:36:40 +0000 (00:36 +0200)]
UPSTREAM: ASoC: simple-card: don't fail if sysclk setting is not supported
Commit
e22579713ae1 ("ASoC: simple card: set cpu-dai sysclk
with mclk-fs") added sysclk / SND_SOC_CLOCK_OUT setting, that makes
asoc_simple_card_hw_params fail if the operation is not supported,
although the intention clearly was to ignore ENOTSUPP. Fix it.
The patch fixes audio playback on Kirkwood / OpenRD client,
where the following errors are seen:
asoc-simple-card sound: ASoC: machine hw_params failed: -524
alsa-lib: /alsa-lib-1.0.28/src/pcm/pcm_hw.c:327:(snd_pcm_hw_hw_params) SNDRV_PCM_IOCTL_HW_PARAMS failed (-524): Unknown error 524
Fixes: e22579713ae1 ("ASoC: simple card: set cpu-dai sysclk with mclk-fs")
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit git.kernel.org broonie/sound.git for-next
ee43a1a0cd2a8f33cddfa1323a60b5cfcf865ba0)
Change-Id: I979297fa31aa065338804186ee35de948c63a6a4
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 11:06:08 +0000 (19:06 +0800)]
arm64: rockchip_defconfig: merge android config
enable CONFIG_QUOTA
enable CONFIG_IP_NF_NAT
remove CONFIG_UID_STAT
enable CONFIG_SECURITY_PERF_EVENTS_RESTRICT
Change-Id: I989605e59b77294b70d40a8ab67760eae30ec6e4
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 11:00:15 +0000 (19:00 +0800)]
Revert "Revert "drivers: switch: remove S_IWUSR from dev_attr""
This reverts commit
d18fffdddbf0a395440cd8e8e2578d322c8f0dbd.
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 10:58:11 +0000 (18:58 +0800)]
Revert "Revert "switch: switch class and GPIO drivers.""
This reverts commit
c631c9800f20373ddafff77ce19844e78d2d2d9d.
We keep switch driver until HDMI work.
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 10:36:47 +0000 (18:36 +0800)]
Merge tag 'lsk-v4.4-16.06-android'
LSK 16.06 v4.4-android
* tag 'lsk-v4.4-16.06-android': (447 commits)
Linux 4.4.14
netfilter: x_tables: introduce and use xt_copy_counters_from_user
netfilter: x_tables: do compat validation via translate_table
netfilter: x_tables: xt_compat_match_from_user doesn't need a retval
netfilter: ip6_tables: simplify translate_compat_table args
netfilter: ip_tables: simplify translate_compat_table args
netfilter: arp_tables: simplify translate_compat_table args
netfilter: x_tables: don't reject valid target size on some architectures
netfilter: x_tables: validate all offsets and sizes in a rule
netfilter: x_tables: check for bogus target offset
netfilter: x_tables: check standard target size too
netfilter: x_tables: add compat version of xt_check_entry_offsets
netfilter: x_tables: assert minimum target size
netfilter: x_tables: kill check_entry helper
netfilter: x_tables: add and use xt_check_entry_offsets
netfilter: x_tables: validate targets of jumps
netfilter: x_tables: don't move to non-existent next rule
drm/core: Do not preserve framebuffer on rmfb, v4.
crypto: qat - fix adf_ctl_drv.c:undefined reference to adf_init_pf_wq
netfilter: x_tables: fix unconditional helper
...
Huang, Tao [Tue, 5 Jul 2016 10:35:00 +0000 (18:35 +0800)]
Revert "cpufreq: interactive: fix cpufreq object duplicate creatation in sysfs"
This reverts commit
857ad0187f6259e429df117480490c1fc587bc36.
Fixes by LSK commit
b42fb9a7101001d14f996fe2e671f3e7eddded3b
("Revert "cpufreq: interactive: build fixes for 4.4"")
and commit
de5723c8a64e7f7a69662b75d4a789a6e5307dd4
("cpufreq: interactive: drop cpufreq_{get,put}_global_kobject func calls")
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 10:24:14 +0000 (18:24 +0800)]
Revert "netfilter: xt_qtaguid: fix crash on non-full sks"
This reverts commit
1b96a26c65104ee06eaa46dc23bbe22ebe3bf7d0.
Fixes by LSK commit
202d12a1f733a252ee76f4cc497c9ce86270ebb2
("xt_qtaguid: Fix panic caused by synack processing")
and commit
4158b3431f473aad101da1100a9b241ff8b3cc74
("xt_qtaguid: Fix panic caused by processing non-full socket.")
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Xing Zheng [Fri, 24 Jun 2016 03:14:09 +0000 (11:14 +0800)]
clk: rockchip: rk3399: add 106.5MHz clock configuration for 1440x900
Change-Id: I49331fdbf595b731f64f34beb25e817c502984fe
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Peter Ujfalusi [Mon, 14 Dec 2015 20:47:38 +0000 (22:47 +0200)]
UPSTREAM: dmaengine: core: Skip mask matching when it is not provided to private_candidate
If mask is NULL skip the mask matching against the DMA device capabilities.
Change-Id: Iee44026c8d43493e4e73d8d483545267dc2e08a7
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
commit
26b64256e0c4573f3668ac8329a1266ebb9d6120)
Jeffy Chen [Fri, 1 Jul 2016 08:23:24 +0000 (16:23 +0800)]
ARM: dts: rockchip: enable rockchip-vpu node for evb rk3288
Change-Id: Icfc4e5696b2c0d03f79b5927280c2967c256ef8b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Fri, 24 Jun 2016 08:44:48 +0000 (16:44 +0800)]
ARM: dts: rockchip: add rockchip-vpu node for rk3288
Change-Id: I1821a9a00a8878e061385d841c5c447496bb9434
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Huang Jiachai [Tue, 5 Jul 2016 03:17:42 +0000 (11:17 +0800)]
video: rockchip: vop: 3399: fix disable_irq() after local_irq_save()
[ 0.654187] BUG: sleeping function called from invalid context at kernel/irq/manage.c:110
[ 0.654905] in_atomic(): 0, irqs_disabled(): 128, pid: 1, name: swapper/0
[ 0.655502] 2 locks held by swapper/0/1:
[ 0.655849] #0: (&dev->mutex){......}, at: [<
ffffff800848005c>] __driver_attach+0x38/0x98
[ 0.656630] #1: (&dev->mutex){......}, at: [<
ffffff800848007c>] __driver_attach+0x58/0x98
[ 0.657395] irq event stamp: 419700
[ 0.657705] hardirqs last enabled at (419699): [<
ffffff80081b3f54>] kfree+0x1d0/0x360
[ 0.658409] hardirqs last disabled at (419700): [<
ffffff800839933c>] rk_fb_register+0x8a4/0xc64
[ 0.659181] softirqs last enabled at (419668): [<
ffffff80080a0d58>] __do_softirq+0x41c/0x53c
[ 0.659937] softirqs last disabled at (419663): [<
ffffff80080a1100>] irq_exit+0x70/0xc4
[ 0.660651] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 4.4.11 #1477
[ 0.661194] Hardware name: Rockchip RK3399 Evaluation Board v1 (Android) (DT)
[ 0.661819] Call trace:
[ 0.662044] [<
ffffff800808873c>] dump_backtrace+0x0/0x1a8
[ 0.662521] [<
ffffff80080888f8>] show_stack+0x14/0x1c
[ 0.662970] [<
ffffff800834fd18>] dump_stack+0xb0/0xec
[ 0.663419] [<
ffffff80080cd3e0>] ___might_sleep+0x1c8/0x1d8
[ 0.663911] [<
ffffff80080cd464>] __might_sleep+0x74/0x84
[ 0.664383] [<
ffffff80080fca98>] synchronize_irq+0x30/0x84
[ 0.664867] [<
ffffff80080fd230>] disable_irq+0x20/0x2c
[ 0.665325] [<
ffffff80083ae3c0>] vop_set_irq_to_cpu+0x20/0x2c
[ 0.665832] [<
ffffff8008396144>] rk_fb_poll_wait_frame_complete+0x38/0xd4
[ 0.666429] [<
ffffff80083993a4>] rk_fb_register+0x90c/0xc64
[ 0.666922] [<
ffffff80083afe44>] vop_probe+0x55c/0x5d4
[ 0.667378] [<
ffffff8008481a20>] platform_drv_probe+0x58/0xa4
[ 0.667885] [<
ffffff800847feb0>] driver_probe_device+0x114/0x288
[ 0.668414] [<
ffffff8008480090>] __driver_attach+0x6c/0x98
[ 0.668899] [<
ffffff800847e628>] bus_for_each_dev+0x64/0x88
[ 0.669391] [<
ffffff8008480298>] driver_attach+0x20/0x28
[ 0.669861] [<
ffffff800847ee14>] bus_add_driver+0xe8/0x1e0
[ 0.670345] [<
ffffff8008480fcc>] driver_register+0x98/0xe4
[ 0.670829] [<
ffffff8008482448>] __platform_driver_register+0x48/0x50
[ 0.671398] [<
ffffff8008db5f74>] vop_module_init+0x18/0x20
[ 0.671885] [<
ffffff8008d8facc>] do_one_initcall+0xf0/0x178
[ 0.672378] [<
ffffff8008d8fc9c>] kernel_init_freeable+0x148/0x1e8
[ 0.672916] [<
ffffff8008a03394>] kernel_init+0x10/0xf8
[ 0.673370] [<
ffffff80080844d0>] ret_from_fork+0x10/0x40
Change-Id: If9a39a6800a4a5dd1749f21125c6ba5204bee901
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
dalon.zhang [Fri, 1 Jul 2016 07:03:59 +0000 (15:03 +0800)]
camsys driver: v0.0x21.3
Change-Id: Ibbea044aade566ee95184cc9f6dfec76752a3b0a
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>
dalon.zhang [Fri, 1 Jul 2016 06:41:41 +0000 (14:41 +0800)]
arm64: dts: rockchip: add isp0 and isp1 config for rk3399
Change-Id: I27d5843f1cf549e145d1950c5c40796c55896bff
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>
Huang Jiachai [Tue, 28 Jun 2016 02:45:25 +0000 (10:45 +0800)]
ARM64: dts: rk3399: android: add memory reserved for logo and enable uboot logo
Change-Id: I284d69c6156d2191b96aed92b98c13386a5f5fd9
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huang Jiachai [Tue, 28 Jun 2016 03:13:05 +0000 (11:13 +0800)]
video: rockchip: fb: use memory reserved for logo
Change-Id: I19e8b1d0cce5b9d025975ca080f56af3b67c67fb
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Finley Xiao [Tue, 5 Jul 2016 02:17:25 +0000 (10:17 +0800)]
ARM64: dts: rockchip: Rename OPP nodes as opp@<opp-hz>
It would be better to name OPP nodes as opp@<opp-hz> as that will ensure
that multiple DT nodes don't contain the same frequency. Of course we
expect the writer to name the node with its opp-hz frequency and not any
other frequency.
And that will let the compile error out if multiple nodes are using the
same opp-hz frequency.
Change-Id: Icefba93f7a95752e344b5a092a83931bf4d1e682
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Huang, Tao [Mon, 4 Jul 2016 11:11:52 +0000 (19:11 +0800)]
stmmac: do not sleep in atomic context while suspend/resume
Change-Id: Ie5da56ec33b202825e23d3a6fde499a6b831004b
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 4 Jul 2016 10:13:57 +0000 (18:13 +0800)]
Revert "net: stmmac: replace msleep with mdelay between spinlock and spinunlock"
This reverts commit
b664a51a074b560e92e5b22523c5cb54833e7bf2.
Upstream commit
f55d84b07c4e ("stmmac: do not sleep in atomic context for mdio_reset")
fixes this bug.
Change-Id: I7332b3586640667f551c7e83eafff560a4f5a478
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Vincent Palatin [Wed, 1 Jun 2016 15:53:48 +0000 (08:53 -0700)]
UPSTREAM: stmmac: do not sleep in atomic context for mdio_reset
stmmac_mdio_reset() has been updated to use msleep rather udelay
(as some PHY requires a one second delay there).
It called from stmmac_resume() within the spin_lock_irqsave block
atomic context triggering 'scheduling while atomic'.
The stmmac_priv lock usage is not fully documented, but it seems
to protect the access to the MAC registers / DMA structures rather
than the MDIO bus or the PHY (which have separate locking),
so we can push the spin_lock after the stmmac_mdio_reset call.
Change-Id: I0e8a0f7e798f89678d59eefdfd251f217c00787e
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
f55d84b07c4e7340473a25dc82b462607578402c)
chenzhen [Thu, 30 Jun 2016 12:01:01 +0000 (20:01 +0800)]
MALI: midgard: rockchip: add .shutdown of GPU platform_driver
Change-Id: I5af2a464db88b08530b063d90b3a7ce61e26f201
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Thu, 30 Jun 2016 06:54:11 +0000 (14:54 +0800)]
MALI: midgard: rockchip: not to enable clk_gpu when probing
Otherwise, clk_gpu won't be disabled actually in the runtime.
Change-Id: If1e32061cbffc1564a5cf95fbf01aa91c827550d
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Huang Jiachai [Fri, 1 Jul 2016 07:06:22 +0000 (15:06 +0800)]
video: rockchip: vop: 3399: fix layer index for disp info error
Change-Id: I2c45b204d9fafa01b3b05dbb0378bb1b05bd0642
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Mark Yao [Mon, 6 Jun 2016 07:27:33 +0000 (15:27 +0800)]
drm/rockchip: vop: correct the source size of uv scale factor setting
When the input color format is YUV, we need to do some external scale
for CBCR. Like,
* In YUV420 data format:
cbcr_xscale = dst_w / src_w * 2;
cbcr_yscale = dst_h / src_h * 2;
* In YUV422 data format:
cbcr_xscale = dst_w / src_w * 2;
cbcr_yscale = dst_h / src_h;
* In YUV444 data format
cbcr_xscale = dst_w / src_w;
cbcr_yscale = dst_h / src_h;
Change-Id: I08678fdcc13a5c4055fcc46f20b378ad7fa16761
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9157353/)
Yakir Yang [Mon, 6 Jun 2016 07:20:17 +0000 (15:20 +0800)]
FROMLIST: drm/rockchip: vop: add uv_vir register field for RK3036 VOP
The WIN0 of RK3036 VOP could support YUV data format, but driver
forget to add the uv_vir register field for it.
Change-Id: I1fd6be43308468cf0718b113be74d2170f71eebe
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9157349/)
Arnd Bergmann [Thu, 12 Nov 2015 14:14:23 +0000 (15:14 +0100)]
UPSTREAM: mmc: dw_mmc: use resource_size_t to store physical address
The dw_mmc driver stores the physical address of the MMIO registers
in a pointer, which requires the use of type casts, and is actually
broken if anyone ever has this device on a 32-bit SoC in registers
above 4GB. Gcc warns about this possibility when the driver is built
with ARM LPAE enabled:
mmc/host/dw_mmc.c: In function 'dw_mci_edmac_start_dma':
mmc/host/dw_mmc.c:702:17: warning: cast from pointer to integer of different size
cfg.dst_addr = (dma_addr_t)(host->phy_regs + fifo_offset);
^
mmc/host/dw_mmc-pltfm.c: In function 'dw_mci_pltfm_register':
mmc/host/dw_mmc-pltfm.c:63:19: warning: cast to pointer from integer of different size
host->phy_regs = (void *)(regs->start);
This changes the code to use resource_size_t, which gets rid of the
warning, the bug and the useless casts.
Change-Id: I894c49cede8f0626efb80a9a3181a5385bbb2bcd
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
260b31643691e8a58683a4ccc3bdf7abfd86f54a)
Xing Zheng [Wed, 22 Jun 2016 03:16:53 +0000 (11:16 +0800)]
UPSTREAM: ARM: dts: rockchip: add support rk3229 evb board
Initial release for rk3229 evb board, and turn the GMAC on.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit
241eff3c198492b2d63e75723b774f2836fee8a3)
Conflicts:
Documentation/devicetree/bindings/arm/rockchip.txt
[zx: RK3399 FPGA conflicts with RK3399 evb board, fix it.]
Change-Id: I95cfe430aa0975a748aa203c1f78ba7fceedf9af
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Ulf Hansson [Wed, 27 Jan 2016 08:10:37 +0000 (09:10 +0100)]
UPSTREAM: PM / Domains: Fix potential deadlock while adding/removing subdomains
We must preserve the same order of how we acquire and release the lock for
genpd, as otherwise we may encounter deadlocks.
The power on phase of a genpd starts by acquiring its lock. Then it walks
the hierarchy of its parent domains to be able to power on these first, as
per design of genpd.
From a locking perspective this means the locks of the parents becomes
acquired after the lock of the subdomain.
Let's fix pm_genpd_add|remove_subdomain() to maintain the same order of
acquiring/releasing the genpd lock as being applied in the power on/off
sequence.
Change-Id: I7f56875b7620eee6247efecd502a3ada4bfa4e24
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
cdb300a041f5df1dfbde1367f95109b6449d1371)
Marek Szyprowski [Wed, 20 Jan 2016 09:13:42 +0000 (10:13 +0100)]
UPSTREAM: PM / domains: fix lockdep issue for all subdomains
During genpd_poweron, genpd->lock is acquired recursively for each
parent (master) domain, which are separate objects. This confuses
lockdep, which considers every operation on genpd->lock as being done on
the same lock class. This leads to the following false positive warning:
=============================================
[ INFO: possible recursive locking detected ]
4.4.0-rc4-xu3s #32 Not tainted
---------------------------------------------
swapper/0/1 is trying to acquire lock:
(&genpd->lock){+.+...}, at: [<
c0361550>] __genpd_poweron+0x64/0x108
but task is already holding lock:
(&genpd->lock){+.+...}, at: [<
c0361af8>] genpd_dev_pm_attach+0x168/0x1b8
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock(&genpd->lock);
lock(&genpd->lock);
*** DEADLOCK ***
May be due to missing lock nesting notation
3 locks held by swapper/0/1:
#0: (&dev->mutex){......}, at: [<
c0350910>] __driver_attach+0x48/0x98
#1: (&dev->mutex){......}, at: [<
c0350920>] __driver_attach+0x58/0x98
#2: (&genpd->lock){+.+...}, at: [<
c0361af8>] genpd_dev_pm_attach+0x168/0x1b8
stack backtrace:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc4-xu3s #32
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[<
c0016c98>] (unwind_backtrace) from [<
c00139c4>] (show_stack+0x10/0x14)
[<
c00139c4>] (show_stack) from [<
c0270df0>] (dump_stack+0x84/0xc4)
[<
c0270df0>] (dump_stack) from [<
c00780b8>] (__lock_acquire+0x1f88/0x215c)
[<
c00780b8>] (__lock_acquire) from [<
c007886c>] (lock_acquire+0xa4/0xd0)
[<
c007886c>] (lock_acquire) from [<
c0641f2c>] (mutex_lock_nested+0x70/0x4d4)
[<
c0641f2c>] (mutex_lock_nested) from [<
c0361550>] (__genpd_poweron+0x64/0x108)
[<
c0361550>] (__genpd_poweron) from [<
c0361b00>] (genpd_dev_pm_attach+0x170/0x1b8)
[<
c0361b00>] (genpd_dev_pm_attach) from [<
c03520a8>] (platform_drv_probe+0x2c/0xac)
[<
c03520a8>] (platform_drv_probe) from [<
c03507d4>] (driver_probe_device+0x208/0x2fc)
[<
c03507d4>] (driver_probe_device) from [<
c035095c>] (__driver_attach+0x94/0x98)
[<
c035095c>] (__driver_attach) from [<
c034ec14>] (bus_for_each_dev+0x68/0x9c)
[<
c034ec14>] (bus_for_each_dev) from [<
c034fec8>] (bus_add_driver+0x1a0/0x218)
[<
c034fec8>] (bus_add_driver) from [<
c035115c>] (driver_register+0x78/0xf8)
[<
c035115c>] (driver_register) from [<
c0338488>] (exynos_drm_register_drivers+0x28/0x74)
[<
c0338488>] (exynos_drm_register_drivers) from [<
c0338594>] (exynos_drm_init+0x6c/0xc4)
[<
c0338594>] (exynos_drm_init) from [<
c00097f4>] (do_one_initcall+0x90/0x1dc)
[<
c00097f4>] (do_one_initcall) from [<
c0895e08>] (kernel_init_freeable+0x158/0x1f8)
[<
c0895e08>] (kernel_init_freeable) from [<
c063ecac>] (kernel_init+0x8/0xe8)
[<
c063ecac>] (kernel_init) from [<
c000f7d0>] (ret_from_fork+0x14/0x24)
This patch replaces mutex_lock with mutex_lock_nested() and uses
recursion depth to annotate each genpd->lock operation with separate
lockdep subclass.
Change-Id: I9b94b2a571f906ea9e5300abc6f40db343af49e3
Reported-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
0106ef5146f9e89e4dc9354f308ecaddb9617310)
Chris Zhong [Thu, 23 Jun 2016 03:43:48 +0000 (11:43 +0800)]
arm64: dts: rockchip: add a power-domain node for mipi dsi on rk3399
Change-Id: I48ef7a7b209b0766a4277c3d9db0d74deee19c50
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Mark Yao [Fri, 1 Jul 2016 07:25:06 +0000 (15:25 +0800)]
drm/rockchip: mipi: return probe defer if attach panel failed
Return -EINVAL would cause mipi dsi bad behavior, probe defer
to ensure mipi find the correct mode,
Change-Id: I0bb8e97dd6bd19f66052b4e985e95d8d82faf29b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Tue, 21 Jun 2016 06:31:09 +0000 (14:31 +0800)]
drm/rockchip: disabled the plane alpha if it's bottom layer
HardWare limited, the bottom layer not support per-pixel alpha,
Change-Id: I174da1d3d3cfff8d0b6cd6dfab4873438895e56d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Tue, 21 Jun 2016 06:30:19 +0000 (14:30 +0800)]
drm/rockchip: set unused layer with top zpos
Hardware limited, we should keep all unused layer same
with the same zpos, otherwise, would get display abnormal.
Change-Id: I417a6a14731148a89f0372cc028e43a94b56e4d3
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Tue, 21 Jun 2016 06:26:54 +0000 (14:26 +0800)]
drm/rockchip: fix vop value mask
Change-Id: Iedfb871f2909a427ca97f3014f4b0e0b565d06f0
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Tue, 21 Jun 2016 06:24:58 +0000 (14:24 +0800)]
drm/rockchip: add DRM_RENDER_ALLOW
Change-Id: Ia0159b877f7d8b2bb5cecf3b352b67d9c76c7c97
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 1 Jul 2016 06:25:13 +0000 (14:25 +0800)]
drm/rockchip: vop: use new crtc state on atomic check
That is wrong use old crtc mode on atomic check.
Change-Id: Ie37bd842f8bafca04303d641269a84a6016457f4
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 30 Jun 2016 06:31:18 +0000 (14:31 +0800)]
drm/rockchip: move rockchip drm core compile to the last one
All rockchip drm modules are module_init, so the probe sequence
is judged by compile sequence.
We want the rockchip drm core probe on the last one, so if components
call probe defer on bind, would use rockchip drm core to do probe defer.
Change-Id: Ibda12998545a93327bdf35bc1b8386034189ba6a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Zhangbin Tong [Fri, 1 Jul 2016 07:37:23 +0000 (15:37 +0800)]
ARM64: dts: rk3399-box-808-android: modify pinctrl for spdif
Change-Id: I0e9dd45820900463c7c144b8eff4e89c64618061
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
chenzhen [Fri, 3 Jun 2016 02:14:49 +0000 (10:14 +0800)]
MALI: rockchip: add utgard(mali400) src dir
Change-Id: I519dfc05fa762e9145404a9f12b4c0092364c4a8
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Mon, 15 Feb 2016 09:13:10 +0000 (17:13 +0800)]
MALI: rockchip: upgrade utgard DDK to r6p0-01rel1
Change-Id: I0c88698a29855905da05b45c54f37beddcb6fcd6
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 12 Jan 2016 09:31:02 +0000 (17:31 +0800)]
MALI: utgard: rockchip: tidy the files to track
Change-Id: I8629720bc63eae8b2c309d89d2370623ef614948
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 12 Jan 2016 08:58:39 +0000 (16:58 +0800)]
MALI: rockchip: upgrade utgard DDK to r6p0-01rel0
Conflicts:
drivers/gpu/arm/mali400/mali/common/mali_control_timer.c
drivers/gpu/arm/mali400/mali/include/linux/mali/mali_utgard_uk_types.h
drivers/gpu/arm/mali400/mali/linux/mali_osk_mali.c
drivers/gpu/arm/mali400/mali/linux/mali_ukk_wrappers.h
Change-Id: I13d02e836efcebd0dd2367ce138aac258dacda24
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Marc Zyngier [Mon, 11 Apr 2016 08:57:55 +0000 (09:57 +0100)]
UPSTREAM: DT/arm,gic-v3: Documment PPI partition support
Add a decription of the PPI partitioning support.
Change-Id: I11bb88c45556630207fb3ff534fa5645b73cb3f0
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Link: http://lkml.kernel.org/r/1460365075-7316-6-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
287e9357abcc0ef079bf4e439e098a3bd6246a05)
Marc Zyngier [Mon, 11 Apr 2016 08:57:54 +0000 (09:57 +0100)]
UPSTREAM: irqchip/gic-v3: Add support for partitioned PPIs
Plug the partitioning layer into the GICv3 PPI code, parsing the
DT and building the partition affinities and providing the generic
code with partition data and callbacks.
Change-Id: I1f9049d48388b899e99bcadd6be729729d0fe6bb
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Link: http://lkml.kernel.org/r/1460365075-7316-5-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
e3825ba1af3a27d7522c9f5f929f5a13b8b138ae)
Marc Zyngier [Mon, 11 Apr 2016 08:57:53 +0000 (09:57 +0100)]
UPSTREAM: irqchip: Add per-cpu interrupt partitioning library
We've unfortunately started seeing a situation where percpu interrupts
are partitioned in the system: one arbitrary set of CPUs has an
interrupt connected to a type of device, while another disjoint
set of CPUs has the same interrupt connected to another type of device.
This makes it impossible to have a device driver requesting this interrupt
using the current percpu-interrupt abstraction, as the same interrupt number
is now potentially claimed by at least two drivers, and we forbid interrupt
sharing on per-cpu interrupt.
A solution to this is to turn things upside down. Let's assume that our
system describes all the possible partitions for a given interrupt, and
give each of them a unique identifier. It is then possible to create
a namespace where the affinity identifier itself is a form of interrupt
number. At this point, it becomes easy to implement a set of partitions
as a cascaded irqchip, each affinity identifier being the HW irq.
This allows us to keep a number of nice properties:
- Each partition results in a separate percpu-interrupt (with a restrictied
affinity), which keeps drivers happy.
- Because the underlying interrupt is still per-cpu, the overhead of
the indirection can be kept pretty minimal.
- The core code can ignore most of that crap.
For that purpose, we implement a small library that deals with some of
the boilerplate code, relying on platform-specific drivers to provide
a description of the affinity sets and a set of callbacks.
Conflicts:
drivers/irqchip/Kconfig
drivers/irqchip/Makefile
Change-Id: Ie6b2bc8c4c152f0dcd3fbcab8950fae781338322
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Link: http://lkml.kernel.org/r/1460365075-7316-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
9e2c986cb460bf97154f18e85aa833739a1e8dc7)
Marc Zyngier [Mon, 11 Apr 2016 08:57:52 +0000 (09:57 +0100)]
UPSTREAM: genirq: Allow the affinity of a percpu interrupt to be set/retrieved
In order to prepare the genirq layer for the concept of partitionned
percpu interrupts, let's allow an affinity to be associated with
such an interrupt. We introduce:
- irq_set_percpu_devid_partition: flag an interrupt as a percpu-devid
interrupt, and associate it with an affinity
- irq_get_percpu_devid_partition: allow the affinity of that interrupt
to be retrieved.
This will allow a driver to discover which CPUs the per-cpu interrupt
can actually fire on.
Change-Id: I251774db34d1f0145d6c051265886c22f41d941e
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Link: http://lkml.kernel.org/r/1460365075-7316-3-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
222df54fd8b7641dcc81476f157806bb3144ee1d)
Marc Zyngier [Mon, 11 Apr 2016 08:57:51 +0000 (09:57 +0100)]
UPSTREAM: irqdomain: Allow domain matching on irq_fwspec
When iterating over the irq domain list, we try to match a domain
either by calling a match() function or by comparing a number
of fields passed as parameters.
Both approaches are a bit restrictive:
- match() is DT specific and only takes a device node
- the fallback case only deals with the fwnode_handle
It would be useful if we had a per-domain function that would
actually perform the matching check on the whole of the
irq_fwspec structure. This would allow for a domain to triage
matching attempts that need to extend beyond the fwnode.
Let's introduce irq_find_matching_fwspec(), which takes a full
blown irq_fwspec structure, and call into a select() function
implemented by the irqdomain. irq_find_matching_fwnode() is
made a wrapper around irq_find_matching_fwspec in order to
preserve compatibility.
Change-Id: I07df9af068d114c80cd97b9cb987a70c0e24afda
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Link: http://lkml.kernel.org/r/1460365075-7316-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
651e8b54abdeeaa36f5f54ffa05c18707a3cc1d0)
Tomasz Nowicki [Tue, 19 Jan 2016 13:11:14 +0000 (14:11 +0100)]
UPSTREAM: irqchip/gic-v3: Refactor gic_of_init() for GICv3 driver
Isolate hardware abstraction (FDT) code to gic_of_init().
Rest of the logic goes to gic_init_bases() and expects well
defined data to initialize GIC properly. The same solution
is used for GICv2 driver.
This is needed for ACPI initialization later.
Change-Id: I61fcbd96ecd2dc8130cdd2d6ce79841eb184e87b
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
db57d7460ea74de2204ddc303520753f256ea67d)
Will Deacon [Wed, 3 Feb 2016 18:00:58 +0000 (18:00 +0000)]
UPSTREAM: dt-bindings: arm, gic-v3: require that reserved cells are always 0
The arm,gic-v3 binding was written with good intentions and doesn't
enforce interrupt-cells to be 3, therefore making it easy to extend
the irq description in future if necessary:
> Cells 4 and beyond are reserved for future use.
Unfortunately, this sentence is immediately followed up with:
> When the 1st cell has a value of 0 or 1, cells 4 and beyond act as
> padding, and may be ignored. It is recommended that padding cells
> have a value of 0.
Consequently, any extensions to the PPI or SPI interrupt specifiers must
be able to work with random crap from legacy DTs, effectively
necessitating a new interrupt type in the first cell. Sigh.
This patch fixes the text so that additional, reserved cells are
required to be zero. This looks like a reasonable thing to require and
is already satisifed by the .dts files in-tree.
Change-Id: Ia5b07ab4243c0a4492b7c4516af95b86974c42a0
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
4aff7b854611d91c5fefb1553eb4c328123095ae)
Marc Zyngier [Tue, 26 Jan 2016 13:52:25 +0000 (13:52 +0000)]
UPSTREAM: irqdomain: Allow domain lookup with DOMAIN_BUS_WIRED token
Let's take the (outlandish) example of an interrupt controller
capable of handling both wired interrupts and PCI MSIs.
With the current code, the PCI MSI domain is going to be tagged
with DOMAIN_BUS_PCI_MSI, and the wired domain with DOMAIN_BUS_ANY.
Things get hairy when we start looking up the domain for a wired
interrupt (typically when creating it based on some firmware
information - DT or ACPI).
In irq_create_fwspec_mapping(), we perform the lookup using
DOMAIN_BUS_ANY, which is actually used as a wildcard. This gives
us one chance out of two to end up with the wrong domain, and
we try to configure a wired interrupt with the MSI domain.
Everything grinds to a halt pretty quickly.
What we really need to do is to start looking for a domain that
would uniquely identify a wired interrupt domain, and only use
DOMAIN_BUS_ANY as a fallback.
In order to solve this, let's introduce a new DOMAIN_BUS_WIRED
token, which is going to be used exactly as described above.
Of course, this depends on the irqchip to setup the domain
bus_token, and nobody had to implement this so far.
Only so far.
Change-Id: Ia71c7475354eb38ab9b15423560aa3d28ae16381
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Link: http://lkml.kernel.org/r/1453816347-32720-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
530cbe100ef7587aa5b5ac3a4b670cda4d50e598)
Suravee Suthikulpanit [Thu, 10 Dec 2015 16:55:28 +0000 (08:55 -0800)]
UPSTREAM: irqdomain: Introduce is_fwnode_irqchip helper
Since there will be several places checking if fwnode.type
is equal FWNODE_IRQCHIP, this patch adds a convenient function
for this purpose.
Change-Id: I65ab9e1350428de18864ba493256b959efc01f45
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
75aba7b0e9ac416ca53c0c97680b8e9aedf09284)
Will Deacon [Tue, 22 Dec 2015 14:45:35 +0000 (14:45 +0000)]
UPSTREAM: arm64: perf: add support for Cortex-A72
Cortex-A72 has a PMUv3 implementation that is compatible with the PMU
implemented by Cortex-A57.
This patch hooks up the new compatible string so that the Cortex-A57
event mappings are used.
Change-Id: I06b39699fa019d61be81a1a275f7eb6eed17808a
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
5d7ee87708d4d86fcc32afc9552d05f7625d303d)
Will Deacon [Tue, 22 Dec 2015 14:42:57 +0000 (14:42 +0000)]
UPSTREAM: arm64: perf: add format entry to describe event -> config mapping
It's all very well providing an events directory to userspace that
details our events in terms of "event=0xNN", but if we don't define how
to encode the "event" field in the perf attr.config, then it's a waste
of time.
This patch adds a single format entry to describe that the event field
occupies the bottom 10 bits of our config field on ARMv8 (PMUv3).
Change-Id: I71f9ebf92cd2f7083c10f20a8707a91d4517cbcb
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
57d74123954dfe70fad12724d19f743ed14cec90)
Geert Uytterhoeven [Tue, 15 Dec 2015 08:33:20 +0000 (09:33 +0100)]
UPSTREAM: arm64: perf: Correct Cortex-A53/A57 compatible values
Use commas instead of periods.
Change-Id: I6762decd0390c9f8914e4f314a5212875d200ed5
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
aae881ad73460e1b2aea01f079a0541bd5a9136c)
Drew Richardson [Thu, 22 Oct 2015 14:07:32 +0000 (07:07 -0700)]
UPSTREAM: arm64: perf: Add event descriptions
Add additional information about the ARM architected hardware events
to make counters self describing. This makes the hardware PMUs easier
to use as perf list contains possible events instead of users having
to refer to documentation like the ARM TRMs.
Change-Id: Idb004bb6d9889f8e63f518d105e238d43956b561
Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
9e9caa6a496174e53d7753baa4779717771da4a7)
Drew Richardson [Thu, 22 Oct 2015 14:07:01 +0000 (07:07 -0700)]
UPSTREAM: arm64: perf: Convert event enums to #defines
The enums are not necessary and this allows the event values to be
used to construct static strings at compile time.
Change-Id: I01049434e5ddc5c51b7ae914e9c55a0ef6bf66d9
Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
90381cba64591e27d0e8bbfe71bf8a98bd2a3db3)