David Majnemer [Fri, 31 Jul 2015 18:13:25 +0000 (18:13 +0000)]
Attempt to appease the MSVC build bots
They don't seem to care for initializing an ArrayRef with a
std::initializer_list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243769
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Fri, 31 Jul 2015 18:09:08 +0000 (18:09 +0000)]
[libFuzzer] record traces from the switch statements only when told to do so
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243768
91177308-0d34-0410-b5e6-
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David Majnemer [Fri, 31 Jul 2015 17:58:14 +0000 (17:58 +0000)]
New EH representation for MSVC compatibility
This introduces new instructions neccessary to implement MSVC-compatible
exception handling support. Most of the middle-end and none of the
back-end haven't been audited or updated to take them into account.
Differential Revision: http://reviews.llvm.org/D11097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243766
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Fri, 31 Jul 2015 17:55:53 +0000 (17:55 +0000)]
DI: Rewrite the DIBuilder local variable API
Replace the general `createLocalVariable()` with two more specific
functions: `createParameterVariable()` and `createAutoVariable()`, and
rewrite the documentation.
Besides cleaning up the API, this avoids exposing the fake DWARF tags
`DW_TAG_arg_variable` and `DW_TAG_auto_variable` to frontends, and is
preparation for removing them completely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243764
91177308-0d34-0410-b5e6-
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JF Bastien [Fri, 31 Jul 2015 17:53:38 +0000 (17:53 +0000)]
WebAssembly: print basic integer assembly.
Summary:
This prints assembly for int32 integer operations defined in WebAssemblyInstrInteger.td only, with major caveats:
- The operation names are currently incorrect.
- Other integer and floating-point types will be added later.
- The printer isn't factored out to handle recursive AST code yet, since it can't even handle control flow anyways.
- The assembly format isn't full s-expressions yet either, this will be added later.
- This currently disables PrologEpilogCodeInserter as well as MachineCopyPropagation becasue they don't like virtual registers, which WebAssembly likes quite a bit. This will be fixed by factoring out NVPTX's change (currently a fork of PrologEpilogCodeInserter).
Reviewers: sunfish
Subscribers: llvm-commits, jfb
Differential Revision: http://reviews.llvm.org/D11671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243763
91177308-0d34-0410-b5e6-
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David Majnemer [Fri, 31 Jul 2015 17:40:24 +0000 (17:40 +0000)]
[COFF] Consider the ImageBase when reporting section addresses
This lets us reenable the lld test disabled in r243758.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243761
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Fri, 31 Jul 2015 17:05:05 +0000 (17:05 +0000)]
[libFuzzer] support switch interception in dfsan mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243760
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Fri, 31 Jul 2015 17:00:39 +0000 (17:00 +0000)]
[CodeGenPrepare] Compress a pair. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243759
91177308-0d34-0410-b5e6-
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Sanjay Patel [Fri, 31 Jul 2015 16:21:55 +0000 (16:21 +0000)]
[x86] reassociate integer multiplies using machine combiner pass
Add i16, i32, i64 imul machine instructions to the list of reassociation
candidates.
A new bit of logic is needed to handle integer instructions: they have an
implicit EFLAGS operand, so we have to make sure it's dead in order to do
any reassociation with integer ops.
Differential Revision: http://reviews.llvm.org/D11660
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243756
91177308-0d34-0410-b5e6-
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Reid Kleckner [Fri, 31 Jul 2015 16:14:22 +0000 (16:14 +0000)]
[COFF] Return symbol VAs instead of RVAs for PE files
This makes llvm-nm consistent with binutils nm on executables and DLLs.
For a vanilla hello world executable, the address of main should include
the default image base of 0x400000.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243755
91177308-0d34-0410-b5e6-
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Geoff Berry [Fri, 31 Jul 2015 15:55:54 +0000 (15:55 +0000)]
[AArch64] Favor extended reg patterns for sub
Summary:
Favor the extended reg patterns over the shifted reg patterns that match
only the operand shift and not the full sign/zero extend and shift.
Reviewers: jmolloy, t.p.northover
Subscribers: mcrosier, aemerson, llvm-commits, rengolin
Differential Revision: http://reviews.llvm.org/D11569
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243753
91177308-0d34-0410-b5e6-
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Sanjay Patel [Fri, 31 Jul 2015 15:10:44 +0000 (15:10 +0000)]
don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243751
91177308-0d34-0410-b5e6-
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Bruno Cardoso Lopes [Fri, 31 Jul 2015 14:31:35 +0000 (14:31 +0000)]
[CaptureTracker] Provide an ordered basic block to PointerMayBeCapturedBefore
This patch is a follow up from r240560 and is a step further into
mitigating the compile time performance issues in CaptureTracker.
By providing the CaptureTracker with a "cached ordered basic block"
instead of computing it every time, MemDepAnalysis can use this cache
throughout its calls to AA->callCapturesBefore, avoiding to recompute it
for every scanned instruction. In the same testcase used in r240560,
compile time is reduced from 2min to 30s.
This also fixes PR22348.
rdar://problem/
19230319
Differential Revision: http://reviews.llvm.org/D11364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243750
91177308-0d34-0410-b5e6-
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Daniel Sanders [Fri, 31 Jul 2015 12:58:55 +0000 (12:58 +0000)]
[regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting def's upwards.
Summary:
This prevents vreg260 and D7 from being merged in:
%vreg260<def> = LDC1 ...
JAL <ga:@sin>, <regmask ... list not containing D7 ...>
%D7<def> = COPY %vreg260; ...
Doing so is not valid because the JAL clobbers the D7.
This fixes the almabench regression in the LLVM 3.7.0 release branch.
Reviewers: MatzeB
Subscribers: MatzeB, qcolombet, hans, llvm-commits
Differential Revision: http://reviews.llvm.org/D11649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243745
91177308-0d34-0410-b5e6-
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Jingyue Wu [Fri, 31 Jul 2015 05:09:47 +0000 (05:09 +0000)]
Refactor: Simplify boolean conditional return statements in lib/Target/NVPTX
Summary: Use clang-tidy to simplify boolean conditional return statements
Reviewers: rafael, echristo, chandlerc, bkramer, craig.topper, dexonsmith, chapuni, eliben, jingyue, jholewinski
Subscribers: llvm-commits, jholewinski
Differential Revision: http://reviews.llvm.org/D9983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243734
91177308-0d34-0410-b5e6-
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Matt Arsenault [Fri, 31 Jul 2015 04:12:04 +0000 (04:12 +0000)]
AMDGPU: Fix v16i32 to v16i8 truncstore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243731
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Fri, 31 Jul 2015 01:33:06 +0000 (01:33 +0000)]
[libFuzzer] trace switch statements and apply mutations based on the expected case values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243726
91177308-0d34-0410-b5e6-
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Tom Stellard [Fri, 31 Jul 2015 01:15:15 +0000 (01:15 +0000)]
ELFYAML: Enable parsing of EM_AMDGPU
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243724
91177308-0d34-0410-b5e6-
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Matt Arsenault [Fri, 31 Jul 2015 01:12:10 +0000 (01:12 +0000)]
AMDGPU/SI: Set DwarfRegNum
This requires a fix in tablegen for the cast<int> from bits<16>
to work in the list initializer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243723
91177308-0d34-0410-b5e6-
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Matt Arsenault [Fri, 31 Jul 2015 01:12:06 +0000 (01:12 +0000)]
TableGen: Support folding casts from bits to int
This is to fix an incorrect error when trying to initialize
DwarfNumbers with a !cast<int> of a bits initializer.
getValuesAsListOfInts("DwarfNumbers") would not see an IntInit
and instead the cast, so would give up.
It seems likely that this could be generalized to attempt
the convertInitializerTo for any type. I'm not really sure
why the existing code seems to special case the string cast cases
when convertInitializerTo seems like it should generally handle this
sort of thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243722
91177308-0d34-0410-b5e6-
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Tom Stellard [Fri, 31 Jul 2015 01:02:35 +0000 (01:02 +0000)]
docs: Add information about helper scripts to HowToReleaseLLVM page
Differential Revision: http://reviews.llvm.org/D10081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243720
91177308-0d34-0410-b5e6-
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Tom Stellard [Fri, 31 Jul 2015 01:02:32 +0000 (01:02 +0000)]
AMDGPU/SI: Remove unused pattern for f32 constant loads
Reviewers: arsenm
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11603
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243719
91177308-0d34-0410-b5e6-
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Sumanth Gundapaneni [Fri, 31 Jul 2015 00:45:12 +0000 (00:45 +0000)]
[ARM] Lower modulo operation to generate __aeabi_divmod on Android
For a modulo (reminder) operation,
clang -target armv7-none-linux-gnueabi generates "__modsi3"
clang -target armv7-none-eabi generates "__aeabi_idivmod"
clang -target armv7-linux-androideabi generates "__modsi3"
Android bionic libc doesn't provide a __modsi3, instead it provides a
"__aeabi_idivmod". This patch fixes the LLVM ARMISelLowering to generate
the correct call when ever there is a modulo operation.
Differential Revision: http://reviews.llvm.org/D11661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243717
91177308-0d34-0410-b5e6-
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Alex Lorenz [Thu, 30 Jul 2015 22:00:17 +0000 (22:00 +0000)]
MIR Parser: Report an error when a constant pool item is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243696
91177308-0d34-0410-b5e6-
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Alex Lorenz [Thu, 30 Jul 2015 21:54:10 +0000 (21:54 +0000)]
MIR Parser: Report an error when a virtual register is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243695
91177308-0d34-0410-b5e6-
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Sanjay Patel [Thu, 30 Jul 2015 21:41:50 +0000 (21:41 +0000)]
fix memcpy/memset/memmove lowering when optimizing for size
Fixing MinSize attribute handling was discussed in D11363.
This is a prerequisite patch to doing that.
The handling of OptSize when lowering mem* functions was broken
on Darwin because it wants to ignore -Os for these cases, but the
existing logic also made it ignore -Oz (MinSize).
The Linux change demonstrates a widespread problem. The backend
doesn't usually recognize the MinSize attribute by itself; it
assumes that if the MinSize attribute exists, then the OptSize
attribute must also exist.
Fixing this more generally will be a follow-on patch or two.
Differential Revision: http://reviews.llvm.org/D11568
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243693
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Thu, 30 Jul 2015 21:22:22 +0000 (21:22 +0000)]
[libFuzzer] fix the strncmp interceptor -- it should respect short strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243691
91177308-0d34-0410-b5e6-
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Eric Christopher [Thu, 30 Jul 2015 21:16:34 +0000 (21:16 +0000)]
Fix TableGen code generation for ReadNone attribute.
Patch by Pete Abred!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243689
91177308-0d34-0410-b5e6-
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Sanjay Patel [Thu, 30 Jul 2015 21:06:55 +0000 (21:06 +0000)]
enable fast-math-flag propagation to DAG nodes
This uncovered latent bugs previously:
http://reviews.llvm.org/D10403
...but it's time to try again because internal tests aren't finding more.
If time passes and no other bugs are reported, we can remove this cl::opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243687
91177308-0d34-0410-b5e6-
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Adhemerval Zanella [Thu, 30 Jul 2015 20:49:35 +0000 (20:49 +0000)]
Enable dfsan for aarch64
This patch enable DFSan memory transformation for aarch64 (39-bit VMA).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243684
91177308-0d34-0410-b5e6-
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Mehdi Amini [Thu, 30 Jul 2015 20:33:18 +0000 (20:33 +0000)]
Add a TargetMachine hook that verifies DataLayout compatibility
Summary: Also provide the associated assertion when CodeGen starts.
Reviewers: echristo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11654
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243682
91177308-0d34-0410-b5e6-
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Wei Mi [Thu, 30 Jul 2015 17:40:39 +0000 (17:40 +0000)]
[SLP vectorizer]: Choose the best consecutive candidate to pair with a store instruction.
The patch changes the SLPVectorizer::vectorizeStores to choose the immediate
succeeding or preceding candidate for a store instruction when it has multiple
consecutive candidates. In this way it has better chance to find more slp
vectorization opportunities.
Differential Revision: http://reviews.llvm.org/D10445
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243666
91177308-0d34-0410-b5e6-
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Mehdi Amini [Thu, 30 Jul 2015 17:29:33 +0000 (17:29 +0000)]
Fix lli with OrcLazyJIT: the default DataLayout was used.
Set the correct one using the TargetMachine instead.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243664
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 30 Jul 2015 17:03:11 +0000 (17:03 +0000)]
AMDGPU: Set SubRegIndex size and offset
I'm not sure what reasons the comment here could have
had for not setting these. Without these set, there is
an assertion hit during DWARF emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243661
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 30 Jul 2015 17:03:08 +0000 (17:03 +0000)]
AMDGPU: Fix unreachable when emitting binary debug info
Copy implementation of applyFixup from AArch64 with AArch64 bits
ripped out.
Tests will be included with a later commit. Several other
problems must be fixed before binary debug info emission
will work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243660
91177308-0d34-0410-b5e6-
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Alex Lorenz [Thu, 30 Jul 2015 16:54:38 +0000 (16:54 +0000)]
MIR Serialization: Serialize the machine basic block's successor weights.
Reviewers: Duncan P. N. Exon Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243659
91177308-0d34-0410-b5e6-
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David Majnemer [Thu, 30 Jul 2015 16:47:56 +0000 (16:47 +0000)]
[COFF] Add IMAGE_SCN_TYPE_NOLOAD to SectionCharacteristics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243658
91177308-0d34-0410-b5e6-
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Tom Stellard [Thu, 30 Jul 2015 16:20:42 +0000 (16:20 +0000)]
AMDGPU/SI: Simplify moveSMRDToVALU()
Summary:
Replace the switch on instruction opcode with a switch on register size.
This way we don't need to update the switch statement when we add new
SMRD variants.
Reviewers: arsenm
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243652
91177308-0d34-0410-b5e6-
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Tom Stellard [Thu, 30 Jul 2015 16:20:40 +0000 (16:20 +0000)]
AMDGPU/SI: Remove isTriviallyReMaterializable() function from SIInstrInfo
Summary:
This function is never called. isReallyTriviallyReMaterializable() is
the function that should be implemented instead.
Reviewers: arsenm
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11620
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243651
91177308-0d34-0410-b5e6-
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Vasileios Kalintiris [Thu, 30 Jul 2015 13:13:09 +0000 (13:13 +0000)]
[mips] Fix out-of-date debug information in test file.
Update the debug info in the check-lines because the change in r243638
introduced a constant initialization before the prologue's end as part
of a register spill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243640
91177308-0d34-0410-b5e6-
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NAKAMURA Takumi [Thu, 30 Jul 2015 13:06:53 +0000 (13:06 +0000)]
MCJITTests/MCJITCAPITest.cpp: Try to appease i686-win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243639
91177308-0d34-0410-b5e6-
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Vasileios Kalintiris [Thu, 30 Jul 2015 12:39:33 +0000 (12:39 +0000)]
[mips][FastISel] Remove hidden mips-fast-isel option.
Summary:
This hidden option would disable code generation through FastISel by
default. It was removed from the available options and from the
Fast-ISel tests that required it in order to run the tests.
Reviewers: dsanders
Subscribers: qcolombet, llvm-commits
Differential Revision: http://reviews.llvm.org/D11610
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243638
91177308-0d34-0410-b5e6-
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Vasileios Kalintiris [Thu, 30 Jul 2015 11:51:44 +0000 (11:51 +0000)]
[mips][FastISel] Apply only zero-extension to constants prior to their materialization.
Summary:
Previously, we would sign-extend non-boolean negative constants and
zero-extend otherwise. This was problematic for PHI instructions with
negative values that had a type with bitwidth less than that of the
register used for materialization.
More specifically, ComputePHILiveOutRegInfo() assumes the constants
present in a PHI node are zero extended in their container and
afterwards deduces the known bits.
For example, previously we would materialize an i16 -4 with the
following instruction:
addiu $r, $zero, -4
The register would end-up with the 32-bit 2's complement representation
of -4. However, ComputePHILiveOutRegInfo() would generate a constant
with the upper 16-bits set to zero. The SelectionDAG builder would use
that information to generate an AssertZero node that would remove any
subsequent trunc & zero_extend nodes.
In theory, we should modify ComputePHILiveOutRegInfo() to consult
target-specific hooks about the way they prefer to materialize the
given constants. However, git-blame reports that this specific code
has not been touched since 2011 and it seems to be working well for every
target so far.
Reviewers: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243636
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 30 Jul 2015 10:14:57 +0000 (10:14 +0000)]
[test-release.sh] Add -no-libunwind to disable it on targets that don't support it.
Summary:
Mips doesn't implement unw_getcontext() or libunwind::Registers_*::jumpto() yet
so we must disable libunwind for this release.
Reviewers: hans
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11563
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243633
91177308-0d34-0410-b5e6-
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Michael Kuperstein [Thu, 30 Jul 2015 10:10:25 +0000 (10:10 +0000)]
[X86] Recognize "flags" as an identifier, not a register in Intel-syntax inline asm
Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243630
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 30 Jul 2015 08:16:51 +0000 (08:16 +0000)]
Add amdopencl environment to triple
This is used by the AMD x86 OpenCL implementation
to change some ABI details on Windows and Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243627
91177308-0d34-0410-b5e6-
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Adam Nemet [Thu, 30 Jul 2015 04:21:13 +0000 (04:21 +0000)]
[LoopVer] Add missing std::move
The reason I was passing this vector by value in the constructor so that
I wouldn't have to copy when initializing the corresponding member but
then I forgot the std::move.
The use-case is LoopDistribution which filters the checks then
std::moves it to LoopVersioning's constructor. With this interface we
can avoid any copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243616
91177308-0d34-0410-b5e6-
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Adam Nemet [Thu, 30 Jul 2015 03:29:16 +0000 (03:29 +0000)]
[LDist] Filter the checks locally rather than in LAA, NFC
Before, we were passing the pointer partitions to LAA. Now, we get all
the checks from LAA and filter out the checks within partitions in
LoopDistribution.
This effectively concludes the steps to move filtering memchecks from
LAA into its clients. There is still some cleanup left to remove the
unused interfaces in LAA that still take PtrPartition.
(Moving this functionality to LoopDistribution also requires
needsChecking on pointers to be made public.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243613
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Thu, 30 Jul 2015 02:33:45 +0000 (02:33 +0000)]
[libFuzzer] implement strncmp hook for data-flow-guided fuzzing (w/ and w/o dfsan), add a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243611
91177308-0d34-0410-b5e6-
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Lang Hames [Thu, 30 Jul 2015 02:05:37 +0000 (02:05 +0000)]
[MCJIT] Fix a memory leak in a unit test that was introduced in r243589.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243609
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Thu, 30 Jul 2015 01:34:58 +0000 (01:34 +0000)]
[libFuzzer] implement memcmp hook for data-flow-guided fuzzing (w/o dfsan), extend the memcmp fuzzer test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243603
91177308-0d34-0410-b5e6-
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Pete Cooper [Thu, 30 Jul 2015 00:40:42 +0000 (00:40 +0000)]
Prefix make_reverse_iterator with llvm namespace.
This was fallout from r243581. Turns out C++14 has make_reverse_iterator.
Thanks to Filipe and David for the quick fix suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243598
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Sanjay Patel [Thu, 30 Jul 2015 00:04:21 +0000 (00:04 +0000)]
push fast-math check for machine-combiner reassociations into instruction-type check; NFC
This makes it simpler to add instruction types that don't depend on fast-math.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243596
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Matthias Braun [Wed, 29 Jul 2015 23:22:48 +0000 (23:22 +0000)]
IR: Implement Value::mergeUseLists() iteratively
This avoids stack overflows when the the compiler does not perform tail call
elimination. Apparently this happens for MSVC with the /Ob2 switch which
may be used by external code including this header.
Reported by and based on a patch from Jean-Francois Riendeau.
Related to rdar://
21900756
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243590
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Lang Hames [Wed, 29 Jul 2015 23:12:33 +0000 (23:12 +0000)]
[MCJIT] Fix PR20656 by teaching MCJIT to honor ExecutionEngine's global mapping.
This is important for users of the C API who can't supply custom symbol
resolvers yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243589
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Nick Lewycky [Wed, 29 Jul 2015 22:32:47 +0000 (22:32 +0000)]
Fix typo "fuction" noticed in comments in AssumptionCache.h, and also all the other files that have the same typo. All comments, no functionality change! (Merely a "fuctionality" change.)
Bonus change to remove emacs major mode marker from SystemZMachineFunctionInfo.cpp because emacs already knows it's C++ from the extension. Also fix typo "appeary" in AMDGPUMCAsmInfo.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243585
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Frederic Riss [Wed, 29 Jul 2015 22:29:50 +0000 (22:29 +0000)]
[dsymutil] Re-add command line option -v this time printing the version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243584
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Frederic Riss [Wed, 29 Jul 2015 22:29:46 +0000 (22:29 +0000)]
[dsymutil] Use option categories.
Prevent all the unrelated LLVM options to appear in the -help output
by introducing a tool specific option category. As a drive-by improve
the wording of the help message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243583
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Frederic Riss [Wed, 29 Jul 2015 22:29:34 +0000 (22:29 +0000)]
[dsymutil] Rename -v option to -verbose
The dsymutil-classic -v option dumps the tool version rather than
putting it in verbose mode. Rename -v to -verbose and update the
tests that use it (in the process removing it from a few tests that
didn't require it anymore since the -dump-debug-map option was
introduced).
A followup commit will reintroduce the -v option that dumps the
version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243582
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Pete Cooper [Wed, 29 Jul 2015 22:19:09 +0000 (22:19 +0000)]
Reapply "Add reverse(ContainerTy) range adapter."
This reverts commit r243567, which ultimately reapplies r243563.
The fix here was to use std::enable_if for overload resolution. Thanks to David
Blaikie for lots of help on this, and for the extra tests!
Original commit message follows:
For cases where we needed a foreach loop in reverse over a container,
we had to do something like
for (const GlobalValue *GV : make_range(TypeInfos.rbegin(),
TypeInfos.rend())) {
This provides a convenience method which shortens this to
for (const GlobalValue *GV : reverse(TypeInfos)) {
There are 2 versions of this, with a preference to the rbegin() version.
The first uses rbegin() and rend() to construct an iterator_range.
The second constructs an iterator_range from the begin() and end() methods
wrapped in std::reverse_iterator's.
Reviewed by David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243581
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Eric Christopher [Wed, 29 Jul 2015 22:09:48 +0000 (22:09 +0000)]
Rename hasCompatibleFunctionAttributes->areInlineCompatible based
on suggestions. Currently the function is only used for inline purposes
and this is more descriptive for the use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243578
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Simon Pilgrim [Wed, 29 Jul 2015 21:44:27 +0000 (21:44 +0000)]
[X86][SSE] Keep 32-bit target i64 vector shifts on SSE unit.
This patch improves the 32-bit target i64 constant matching to detect the shuffle vector splats that are introduced by i64 vector shift vectorization (D8416).
Differential Revision: http://reviews.llvm.org/D11327
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243577
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Tim Northover [Wed, 29 Jul 2015 21:34:32 +0000 (21:34 +0000)]
AArch64: use 32-bit MOV rather than UBFX to truncate registers.
It's potentially more efficient on Cyclone, and from the optimization guides &
schedulers looks like it has no effect on Cortex-A53 or A57. In general you'd
expect a MOV to be about the most efficient instruction with its semantics,
even though the official "UXTW" alias is really a UBFX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243576
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Alex Lorenz [Wed, 29 Jul 2015 21:09:09 +0000 (21:09 +0000)]
MIR Serialization: Serialize the frame info's save and restore points.
This commit serializes the save and restore machine basic block references from
the machine frame information class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243575
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Alex Lorenz [Wed, 29 Jul 2015 20:57:11 +0000 (20:57 +0000)]
MIR Parser: Extract the code that parses MBB references into a new method. NFC.
This commit extracts the code that's used by the class 'MIRParserImpl' to parse
the machine basic block references into a new method named 'parseMBBReference'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243572
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Simon Pilgrim [Wed, 29 Jul 2015 20:31:45 +0000 (20:31 +0000)]
[X86][SSE] Vectorize i64 ASHR operations
This patch vectorizes the v2i64/v4i64 ASHR shift operations - the last remaining integer vector shifts that are still being transferred to/from the scalar unit to be completed.
Differential Revision: http://reviews.llvm.org/D11439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243569
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Pete Cooper [Wed, 29 Jul 2015 20:29:10 +0000 (20:29 +0000)]
Revert "Add reverse(ContainerTy) range adapter."
This reverts commit r243563.
The GCC buildbots were extremely unhappy about this. Reverting while
we discuss a better way of doing overload resolution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243567
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David Blaikie [Wed, 29 Jul 2015 20:26:23 +0000 (20:26 +0000)]
[opaque pointers] Remove use of PointerType::getElementType in favor of GEPOperator::getSourceElementType
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243566
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Pete Cooper [Wed, 29 Jul 2015 20:00:39 +0000 (20:00 +0000)]
Add reverse(ContainerTy) range adapter.
For cases where we needed a foreach loop in reverse over a container,
we had to do something like
for (const GlobalValue *GV : make_range(TypeInfos.rbegin(),
TypeInfos.rend())) {
This provides a convenience method which shortens this to
for (const GlobalValue *GV : reverse(TypeInfos)) {
There are 2 versions of this, with a preference to the rbegin() version.
The first uses rbegin() and rend() to construct an iterator_range.
The second constructs an iterator_range from the begin() and end() methods
wrapped in std::reverse_iterator's.
Reviewed by David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243563
91177308-0d34-0410-b5e6-
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Alexey Samsonov [Wed, 29 Jul 2015 19:36:08 +0000 (19:36 +0000)]
[ASan] Disable dynamic alloca and UAR detection in presence of returns_twice calls.
Summary:
returns_twice (most importantly, setjmp) functions are
optimization-hostile: if local variable is promoted to register, and is
changed between setjmp() and longjmp() calls, this update will be
undone. This is the reason why "man setjmp" advises to mark all these
locals as "volatile".
This can not be enough for ASan, though: when it replaces static alloca
with dynamic one, optionally called if UAR mode is enabled, it adds a
whole lot of SSA values, and computations of local variable addresses,
that can involve virtual registers, and cause unexpected behavior, when
these registers are restored from buffer saved in setjmp.
To fix this, just disable dynamic alloca and UAR tricks whenever we see
a returns_twice call in the function.
Reviewers: rnk
Subscribers: llvm-commits, kcc
Differential Revision: http://reviews.llvm.org/D11495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243561
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Colin LeMahieu [Wed, 29 Jul 2015 19:21:13 +0000 (19:21 +0000)]
[llvm-objdump] Inverting logic to match the word "predicate". Returning true when we want it rather than when we want to discard it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243558
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Colin LeMahieu [Wed, 29 Jul 2015 19:08:10 +0000 (19:08 +0000)]
[llvm-objdump] Merging MachO DumpSections in to FilterSections. Simplifying some predicate logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243556
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Jingyue Wu [Wed, 29 Jul 2015 18:59:09 +0000 (18:59 +0000)]
Roll forward r242871
r242871 missed one place that should be guarded with isPhysicalReg. This patch
fixes that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243555
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Alex Lorenz [Wed, 29 Jul 2015 18:57:23 +0000 (18:57 +0000)]
MIR Serialization: Serialize the '.cfi_def_cfa' CFI instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243554
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Alex Lorenz [Wed, 29 Jul 2015 18:51:21 +0000 (18:51 +0000)]
MIR Parser: Parse multiple LHS register machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243553
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Sanjay Patel [Wed, 29 Jul 2015 18:24:18 +0000 (18:24 +0000)]
move DAGCombiner's allowableAlignment() helper function into the TLI
Making allowableAlignment() more accessible was suggested as a predecessor patch
for D10662, so I've pulled it into TargetLowering. This let's us remove 4 instances
of duplicate logic in LegalizeDAG.
There's a subtle functional change in the implementation: the existing
allowableAlignment() code was using getPrefTypeAlignment() when checking
alignment with the DataLayout and assumed that was fast. In this implementation,
we use getABITypeAlignment() and assume that is fast. See the TODO comment or the
discussion in the Phab review for future improvements in this implementation
(don't use the data layout at all).
There are no regression test changes from this difference, and I'm not sure how to
expose it via a test. I think we actually do want to provide the 'Fast' param when
checking this from DAGCombiner::MergeConsecutiveStores(). Ie, we shouldn't merge
stores if the new stores are not going to be fast. But that change will require
fixing allowsMisalignedMemoryAccess() overrides as noted in D10662.
Differential Revision: http://reviews.llvm.org/D10905
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243549
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Evgeniy Stepanov [Wed, 29 Jul 2015 18:22:25 +0000 (18:22 +0000)]
[asan] Remove special case mapping on Android/AArch64.
ASan shadow on Android starts at address 0 for both historic and
performance reasons. This is possible because the platform mandates
-pie, which makes lower memory region always available.
This is not such a good idea on 64-bit platforms because of MAP_32BIT
incompatibility.
This patch changes Android/AArch64 mapping to be the same as that of
Linux/AAarch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243548
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Peter Collingbourne [Wed, 29 Jul 2015 18:12:36 +0000 (18:12 +0000)]
LowerBitSets: Add debugging output.
Differential Revision: http://reviews.llvm.org/D11583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243546
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Michael Zolotukhin [Wed, 29 Jul 2015 18:10:33 +0000 (18:10 +0000)]
[Unroll] Handle SwitchInst properly.
Previously successor selection was simply wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243545
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Michael Zolotukhin [Wed, 29 Jul 2015 18:10:29 +0000 (18:10 +0000)]
[Unroll] Don't crash when simplified branch condition is undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243544
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Michael Zolotukhin [Wed, 29 Jul 2015 18:10:23 +0000 (18:10 +0000)]
Rename test full-unroll-bad-geps.ll to full-unroll-crashers.ll.
No reason to limit it only to GEP-related crashes. More tests are to
come here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243543
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Lang Hames [Wed, 29 Jul 2015 18:07:48 +0000 (18:07 +0000)]
Fix typos in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243542
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Bruno Cardoso Lopes [Wed, 29 Jul 2015 17:46:47 +0000 (17:46 +0000)]
Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources"
Reported to Broke some internal tests: PR24303
This reverts commit r243486.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243540
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Douglas Katzman [Wed, 29 Jul 2015 17:34:41 +0000 (17:34 +0000)]
Add an ArgList::AddAllArgs that accepts a vector of OptSpecifier.
This lifts the somewhat arbitrary restriction on 3 OptSpecifiers.
Differential Revision: http://reviews.llvm.org/D11597
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243539
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Tim Northover [Wed, 29 Jul 2015 16:39:56 +0000 (16:39 +0000)]
AArch64: use AddressingModes.h accessors for compare shifts
No functional change because "lsl #12" is actually encoded as 12, but one less
bug if someone ever decides to change that for the giggles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243536
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Hans Wennborg [Wed, 29 Jul 2015 16:29:06 +0000 (16:29 +0000)]
test-release.sh: Add option for building the OpenMP run-time
This isn't part of the official release process, but provides a convenient way
to build binaries for those who want to experiment with it. Hopefully the run-
time can be part of the regular build and release process for 3.8.
Differential Revision: http://reviews.llvm.org/D11494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243531
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Aaron Ballman [Wed, 29 Jul 2015 15:57:49 +0000 (15:57 +0000)]
Reverting r243386 because it has serious post-commit concerns that have not been addressed. Also reverts r243389, which relied on this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243527
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Colin LeMahieu [Wed, 29 Jul 2015 15:45:39 +0000 (15:45 +0000)]
[llvm-objdump] Added -j flag to filter sections that are operated on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243526
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Jingyue Wu [Wed, 29 Jul 2015 15:26:11 +0000 (15:26 +0000)]
Temporarily revert r242871
PR24299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243522
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Bill Schmidt [Wed, 29 Jul 2015 14:31:57 +0000 (14:31 +0000)]
[PPC] Fix PR24216: Don't generate splat for misaligned shuffle mask
Given certain shuffle-vector masks, LLVM emits splat instructions
which splat the wrong bytes from the source register. The issue is
that the function PPC::isSplatShuffleMask() in PPCISelLowering.cpp
does not ensure that the splat pattern found is requesting bytes that
are aligned on an EltSize boundary. This patch detects this situation
as not a valid splat mask, resulting in a permute being generated
instead of a splat.
Patch and test case by Tyler Kenney, cleaned up a bit by me.
This is a simple bug fix that would be good to incorporate into 3.7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243519
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Akira Hatanaka [Wed, 29 Jul 2015 14:17:26 +0000 (14:17 +0000)]
[AArch64] Define subtarget feature strict-align.
This commit defines subtarget feature strict-align and uses it instead of
cl::opt -aarch64-strict-align to decide whether strict alignment should be
forced.
rdar://problem/
21529937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243516
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Bjarke Hammersholt Roune [Wed, 29 Jul 2015 00:29:08 +0000 (00:29 +0000)]
Make function comments consistently imperative.
(tiny edit, mostly a test that my new commit access works)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243505
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Sanjoy Das [Tue, 28 Jul 2015 23:50:30 +0000 (23:50 +0000)]
[Statepoints] Let patchable statepoints have a symbolic call target.
Summary:
As added initially, statepoints required their call targets to be a
constant pointer null if ``numPatchBytes`` was non-zero. This turns out
to be a problem ergonomically, since there is no way to mark patchable
statepoints as calling a (readable) symbolic value.
This change remove the restriction of requiring ``null`` call targets
for patchable statepoints, and changes PlaceSafepoints to maintain the
symbolic call target through its transformation.
Reviewers: reames, swaroop.sridhar
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243502
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Alex Lorenz [Tue, 28 Jul 2015 23:34:27 +0000 (23:34 +0000)]
Fix broken ArrayRef conversion from r243497.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243501
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Sanjay Patel [Tue, 28 Jul 2015 23:28:22 +0000 (23:28 +0000)]
ignore duplicate divisor uses when transforming into reciprocal multiplies (PR24141)
PR24141: https://llvm.org/bugs/show_bug.cgi?id=24141
contains a test case where we have duplicate entries in a node's uses() list.
After r241826, we use CombineTo() to delete dead nodes when combining the uses into
reciprocal multiplies, but this fails if we encounter the just-deleted node again in
the list.
The solution in this patch is to not add duplicate entries to the list of users that
we will subsequently iterate over. For the test case, this avoids triggering the
combine divisors logic entirely because there really is only one user of the divisor.
Differential Revision: http://reviews.llvm.org/D11345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243500
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Sanjay Patel [Tue, 28 Jul 2015 23:05:48 +0000 (23:05 +0000)]
fix TLI's combineRepeatedFPDivisors interface to return the minimum user threshold
This fix was suggested as part of D11345 and is part of fixing PR24141.
With this change, we can avoid walking the uses of a divisor node if the target
doesn't want the combineRepeatedFPDivisors transform in the first place.
There is no NFC-intended other than that.
Differential Revision: http://reviews.llvm.org/D11531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243498
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Alex Lorenz [Tue, 28 Jul 2015 23:02:45 +0000 (23:02 +0000)]
MIR Serialization: Serialize the target index machine operands.
Reviewers: Duncan P. N. Exon Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243497
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Akira Hatanaka [Tue, 28 Jul 2015 22:44:28 +0000 (22:44 +0000)]
[ARM] Define subtarget feature strict-align.
This commit defines subtarget feature strict-align and uses it instead of
cl::opt -arm-strict-align to decide whether strict alignment should be
forced. Also, remove the logic that was checking the OS and architecture
as clang is now responsible for setting strict-align based on the command
line options specified and the target architecute and OS.
rdar://problem/
21529937
http://reviews.llvm.org/D11470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243493
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Tim Northover [Tue, 28 Jul 2015 22:42:32 +0000 (22:42 +0000)]
AArch64: be careful of large immediates when optimising cmps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243492
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Davide Italiano [Tue, 28 Jul 2015 21:58:08 +0000 (21:58 +0000)]
[tests] Use llvm-readobj instead of macho-dump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243487
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