Alex Deucher [Wed, 23 Sep 2015 18:32:06 +0000 (14:32 -0400)]
drm/amdgpu: Sprinkle drm_modeset_lock_all to appease locking checks
In
commit
7a3f3d6667f5f9ffd1517f6b21d64bbf5312042c
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu Jul 9 23:44:28 2015 +0200
drm: Check locking in drm_for_each_connector
I added locking checks to drm_for_each_connector but failed that
through drm_helper_connector_dpms -> drm_helper_choose_encoder_dpms
it's used in a few more places in the amdgpu resume/suspend code.
Fix them up.
Note that we could use the connector iterator macros in there too, but
that's for the future.
Port of radeon commit:
drm/radeon: Sprinkle drm_modeset_lock_all to appease locking checks
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Daniel Vetter [Wed, 23 Sep 2015 18:26:45 +0000 (20:26 +0200)]
drm/radeon: Sprinkle drm_modeset_lock_all to appease locking checks
In
commit
7a3f3d6667f5f9ffd1517f6b21d64bbf5312042c
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu Jul 9 23:44:28 2015 +0200
drm: Check locking in drm_for_each_connector
I added locking checks to drm_for_each_connector but failed that
through drm_helper_connector_dpms -> drm_helper_choose_encoder_dpms
it's used in a few more places in the radeon resume/suspend code.
Fix them up.
Note that we could use the connector iterator macros in there too, but
that's for the future.
Reported-and-tested-by: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
monk.liu [Wed, 23 Sep 2015 05:49:58 +0000 (13:49 +0800)]
drm/amdgpu: sync ce and me with SWITCH_BUFFER(2)
we used to adopt wait_reg_mem to let CE wait before DE finish page
updating, but from Tonga+, CE doesn't support wait_reg_mem package so
this logic no longer works.
so here is another approach to do same thing:
Insert two of SWITCH_BUFFER at both front and end of vm_flush can
guarantee that CE not go further to process IB_const before vm_flush
done.
Insert two of SWITCH_BUFFER also works on CI, so remove legency method
to sync CE and ME
v2:
Insert double SWITCH_BUFFER at front of vm flush as well.
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Dan Carpenter [Wed, 23 Sep 2015 11:00:59 +0000 (14:00 +0300)]
drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()
args->size is a u64. arg->pitch and args->height are u32. The
multiplication will overflow instead of using the high 32 bits as
intended.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dan Carpenter [Wed, 23 Sep 2015 11:00:35 +0000 (14:00 +0300)]
drm/amdgpu: info leak in amdgpu_gem_metadata_ioctl()
There is no limit on args->data.data_size_bytes so we could read beyond
the end of the args->data.data[] array.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dan Carpenter [Wed, 23 Sep 2015 11:00:12 +0000 (14:00 +0300)]
drm/amdgpu: integer overflow in amdgpu_info_ioctl()
The "alloc_size" calculation can overflow leading to memory corruption.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dan Carpenter [Wed, 23 Sep 2015 10:59:28 +0000 (13:59 +0300)]
drm/amdgpu: unwind properly in amdgpu_cs_parser_init()
The amdgpu_cs_parser_init() function doesn't clean up after itself but
instead the caller uses a free everything function amdgpu_cs_parser_fini()
on failure. This style of error handling is often buggy. In this
example, we call "drm_free_large(parser->chunks[i].kdata);" when it is
an unintialized pointer or when "parser->chunks" is NULL.
I fixed this bug by adding unwind code so that it frees everything that
it allocates.
I also mode some other very minor changes:
1) Renamed "r" to "ret".
2) Moved the chunk_array allocation to the start of the function.
3) Removed some initializers which are no longer needed.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 22 Sep 2015 14:06:45 +0000 (10:06 -0400)]
drm/amdgpu: Fix max_vblank_count value for current display engines
The value was much too low, which could cause the userspace visible
vblank counter to move backwards when the hardware counter wrapped
around.
Ported from radeon commit:
b0b9bb4dd51f396dcf843831905f729e74b0c8c0
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Andrzej Hajda [Mon, 21 Sep 2015 21:34:39 +0000 (17:34 -0400)]
drm/amdgpu: use kmemdup rather than duplicating its implementation
The patch was generated using fixed coccinelle semantic patch
scripts/coccinelle/api/memdup.cocci [1].
[1]: http://permalink.gmane.org/gmane.linux.kernel/
2014320
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Fri, 11 Sep 2015 21:09:57 +0000 (17:09 -0400)]
drm/amdgpu: fix UVD suspend and resume for VI APU
User space passed the same handle before suspend and after resume,
so we have remove the session and handle destroy, and keep the
firmware untouched.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Leo Liu [Fri, 11 Sep 2015 18:22:18 +0000 (14:22 -0400)]
drm/amdgpu: fix the UVD suspend sequence order
Fixes suspend issues with UVD.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Leo Liu [Tue, 15 Sep 2015 14:38:38 +0000 (10:38 -0400)]
drm/amdgpu: make UVD handle checking more strict
Invalid messages can crash the hw otherwise
Ported from radeon commit
a1b403da70e038ca6c6c6fe434d1d873546873a3
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Leo Liu [Thu, 10 Sep 2015 17:41:38 +0000 (13:41 -0400)]
drm/amdgpu: Disable UVD PG
This causes problems with multiple suspend/resume cycles.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Christian König [Tue, 8 Sep 2015 18:22:31 +0000 (20:22 +0200)]
drm/amdgpu: more scheduler cleanups v2
Embed the scheduler into the ring structure instead of allocating it.
Use the ring name directly instead of the id.
v2: rebased, whitespace cleanup
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
Christian König [Mon, 7 Sep 2015 16:43:02 +0000 (18:43 +0200)]
drm/amdgpu: cleanup fence queue init v2
Move the fence related stuff into amdgpu_fence.c
v2: rework commit message, cause this is actually not a bug
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Christian König [Mon, 7 Sep 2015 16:16:49 +0000 (18:16 +0200)]
drm/amdgpu: rename fence->scheduler to sched v2
Just to be consistent with the other members.
v2: rename the ring member as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> (v1)
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
Christian König [Mon, 7 Sep 2015 16:07:14 +0000 (18:07 +0200)]
drm/amdgpu: cleanup entity init
Reorder the fields and properly return the kfifo_alloc error code.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
Junwei Zhang [Wed, 9 Sep 2015 01:21:19 +0000 (09:21 +0800)]
drm/amdgpu: refine the scheduler job type conversion
Use container_of rather than casting.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Junwei Zhang [Wed, 9 Sep 2015 01:05:55 +0000 (09:05 +0800)]
drm/amdgpu: refine the job naming for amdgpu_job and amdgpu_sched_job
Use consistent naming across functions.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Christian König [Fri, 4 Sep 2015 08:47:56 +0000 (10:47 +0200)]
drm/amdgpu: use only one reservation object for each VM v2
Reduces the locking and fencing overhead.
v2: add comment why we need the duplicates list in the GEM op.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Christian König [Thu, 3 Sep 2015 14:40:39 +0000 (16:40 +0200)]
drm/amdgpu: validate duplicates in the CS as well
This allows for multiple BOs to have the same reservation object.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 3 Sep 2015 15:34:59 +0000 (17:34 +0200)]
drm/amdgpu: export reservation_object from dmabuf to ttm (v2)
Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c.
Port of radeon commit
831b6966a60fe72d85ae3576056b4e4e0775b112.
v2: fix up kfd.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 7 Sep 2015 10:32:09 +0000 (12:32 +0200)]
drm/amdgpu: fix overflow on 32bit systems
mem->start is a long, so this can overflow on 32bit systems.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Cc: stable@vger.kernel.org
Christian König [Mon, 31 Aug 2015 15:28:28 +0000 (17:28 +0200)]
drm/amdgpu: remove process_job callback from the scheduler
Just free the resources immediately after submitting the job.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Christian König [Mon, 31 Aug 2015 15:02:52 +0000 (17:02 +0200)]
drm/amdgpu: move scheduler fence callback into fence v2
And call the processed callback directly after submitting the job.
v2: split adding error handling into separate patch.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Christian König [Wed, 2 Sep 2015 10:03:06 +0000 (12:03 +0200)]
drm/amdgpu: signal scheduler fence when hw submission fails v3
Otherwise the resource blocked by it will never be reclaimed.
v2: add DRM_ERROR.
v3: fix typo in commit message
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Chunming Zhou [Mon, 7 Sep 2015 08:06:53 +0000 (16:06 +0800)]
drm/amdgpu: add tracepoint for scheduler (v2)
track sched job status like the length of job queue and hw job queue.
v2: fix build after rebase
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Christian König [Sat, 5 Sep 2015 09:59:50 +0000 (11:59 +0200)]
drm/amdgpu: use write confirm for vm_flush()
Make sure the CP waits for the write to be confirmed before
invalidating.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Anatoli Antonovitch [Thu, 3 Sep 2015 15:13:31 +0000 (11:13 -0400)]
drm/amdgpu: execution barrier after fence v2
Insert wait for reg mem after EOP to fix potential issue with vm context switch
v2: move wait to vm_flush() use equal instead of greater than.
Signed-off-by: Anatoli Antonovitch <anatoli.antonovitch@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sat, 5 Sep 2015 09:12:27 +0000 (11:12 +0200)]
drm/amdgpu: add option to disable semaphores
Provide module parameter to enable/disable them. Still
enabled by default.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 11 Sep 2015 04:38:36 +0000 (14:38 +1000)]
Merge branch 'linux-4.3' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next
three nouveau regression fixes.
* 'linux-4.3' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
drm/nouveau/device: enable c800 quirk for tecra w50
drm/nouveau/clk/gt215: Unbreak engine pausing for GT21x/MCP7x
drm/nouveau/gr/nv04: fix big endian setting on gr context
Ben Skeggs [Thu, 3 Sep 2015 02:39:45 +0000 (12:39 +1000)]
drm/nouveau/device: enable c800 quirk for tecra w50
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Wed, 2 Sep 2015 22:21:02 +0000 (23:21 +0100)]
drm/nouveau/clk/gt215: Unbreak engine pausing for GT21x/MCP7x
Typo that snuck in with commit
6979c6303a4abf263753cd9d577d79f05c6e8c47
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Reported-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Tue, 1 Sep 2015 02:50:28 +0000 (22:50 -0400)]
drm/nouveau/gr/nv04: fix big endian setting on gr context
Broken since "gr: convert user classes to new-style nvkm_object"
Tested on a PPC64 G5 + NV34
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Dave Airlie [Fri, 11 Sep 2015 00:52:37 +0000 (10:52 +1000)]
Merge tag 'topic/drm-fixes-2015-09-09' of git://anongit.freedesktop.org/drm-intel into drm-next
bunch of drm fixes.
* tag 'topic/drm-fixes-2015-09-09' of git://anongit.freedesktop.org/drm-intel:
drm/dp: Add dp_aux_i2c_speed_khz module param to set the assume i2c bus speed
drm/dp: Adjust i2c-over-aux retry count based on message size and i2c bus speed
drm/dp: Define AUX_RETRY_INTERVAL as 500 us
drm/atomic: Fix bookkeeping with TEST_ONLY, v3.
Dave Airlie [Fri, 11 Sep 2015 00:52:08 +0000 (10:52 +1000)]
Merge tag 'drm-intel-next-fixes-2015-09-10' of git://anongit.freedesktop.org/drm-intel into drm-next
Fixes headed for v4.3-rc1, including Maarten's DP MST state checker fix
you requested.
* tag 'drm-intel-next-fixes-2015-09-10' of git://anongit.freedesktop.org/drm-intel:
drm/i915: Allow DSI dual link to be configured on any pipe
drm/i915: Don't try to use DDR DVFS on CHV when disabled in the BIOS
drm/i915: Fix CSR MMIO address check
drm/i915: Limit the number of loops for reading a split 64bit register
drm/i915: Fix broken mst get_hw_state.
drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x
uapi/drm/i915_drm.h: fix userspace compilation.
drm/i915: Always mark the object as dirty when used by the GPU
Jonathon Jongsma [Thu, 20 Aug 2015 19:04:32 +0000 (14:04 -0500)]
drm/qxl: validate monitors config modes
Due to some recent changes in
drm_helper_probe_single_connector_modes_merge_bits(), old custom modes
were not being pruned properly. In current kernels,
drm_mode_validate_basic() is called to sanity-check each mode in the
list. If the sanity-check passes, the mode's status gets set to to
MODE_OK. In older kernels this check was not done, so old custom modes
would still have a status of MODE_UNVERIFIED at this point, and would
therefore be pruned later in the function.
As a result of this new behavior, the list of modes for a device always
includes every custom mode ever configured for the device, with the
largest one listed first. Since desktop environments usually choose the
first preferred mode when a hotplug event is emitted, this had the
result of making it very difficult for the user to reduce the size of
the display.
The qxl driver did implement the mode_valid connector function, but it
was empty. In order to restore the old behavior where old custom modes
are pruned, we implement a proper mode_valid function for the qxl
driver. This function now checks each mode against the last configured
custom mode and the list of standard modes. If the mode doesn't match
any of these, its status is set to MODE_BAD so that it will be pruned as
expected.
Signed-off-by: Jonathon Jongsma <jjongsma@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
Gaurav K Singh [Mon, 3 Aug 2015 10:15:32 +0000 (15:45 +0530)]
drm/i915: Allow DSI dual link to be configured on any pipe
Just like single link MIPI panels, similarly for dual link panels, pipe
to be configured is based on the DVO port from VBT Block 2. In hardware,
Port A is mapped with Pipe A and Port C is mapped with Pipe B.
This issue got introduced in -
commit
7e9804fdcffc650515c60f524b8b2076ee59e710
Author: Jani Nikula <jani.nikula@intel.com>
Date: Fri Jan 16 14:27:23 2015 +0200
drm/i915/dsi: add drm mipi dsi host support
Cc: stable@vger.kernel.org # v4.0
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Tue, 8 Sep 2015 18:05:12 +0000 (21:05 +0300)]
drm/i915: Don't try to use DDR DVFS on CHV when disabled in the BIOS
If one disables DDR DVFS in the BIOS, Punit will apparently ignores
all DDR DVFS request. Currently we assume that DDR DVFS is always
operational, which leads to errors in dmesg when the DDR DVFS requests
time out.
Fix the problem by gently prodding Punit during driver load to find out
whether it will respond to DDR DVFS requests. If the request times out,
we assume that DDR DVFS has been permanenly disabled in the BIOS and
no longer perster the Punit about it.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91629
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Tested-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Takashi Iwai [Wed, 9 Sep 2015 14:52:09 +0000 (16:52 +0200)]
drm/i915: Fix CSR MMIO address check
Fix a wrong logical AND (&&) used for the range check of CSR MMIO.
Spotted nicely by gcc -Wlogical-op flag:
drivers/gpu/drm/i915/intel_csr.c: In function ‘finish_csr_load’:
drivers/gpu/drm/i915/intel_csr.c:353:41: warning: logical ‘and’ of mutually exclusive tests is always false [-Wlogical-op]
Fixes: eb805623d8b1 ('drm/i915/skl: Add support to load SKL CSR firmware.')
Cc: <stable@vger.kernel.org> # v4.2
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Chris Wilson [Tue, 8 Sep 2015 13:17:13 +0000 (14:17 +0100)]
drm/i915: Limit the number of loops for reading a split 64bit register
In I915_READ64_2x32 we attempt to read a 64bit register using 2 32bit
reads. Due to the nature of the registers we try to read in this manner,
they may increment between the two instruction (e.g. a timestamp
counter). To keep the result accurate, we repeat the read if we detect
an overflow (i.e. the upper value varies). However, some hardware is just
plain flaky and may endless loop as the the upper 32bits are not stable.
Just give up after a couple of tries and report whatever we read last.
v2: Use the most recent values when erring out on an unstable register.
Reported-by: russianneuromancer@ya.ru
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91906
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Maarten Lankhorst [Thu, 27 Aug 2015 11:13:31 +0000 (13:13 +0200)]
drm/i915: Fix broken mst get_hw_state.
connector->encoder is initialized as NULL. Fix this by setting it in
during pre enable. MST connectors are not read out during initial hw
readout, and have no fixed encoder mappings. So it's harmless to
return false when the connector has never been assigned to an encoder.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Dave Airlie [Fri, 4 Sep 2015 21:46:09 +0000 (07:46 +1000)]
Merge branch 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more fixes for amdgpu from the last few days:
- Fix several copy paste typos
- Resume from suspend fixes for VCE
- Fix the GPU scheduler warning in kfifo_out
- Re-enable GPUVM fault interrupts which were inadvertently disabled
- GPUVM page table hang fix when paging
* 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: rename gmc_v8_0_init_compute_vmid
drm/amdgpu: fix vce3 instance handling
drm/amdgpu: remove ib test for the second VCE Ring
drm/amdgpu: properly enable VM fault interrupts
drm/amdgpu: fix warning in scheduler
drm/amdgpu: fix buffer placement under memory pressure
drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logic
drm/amdgpu: fix typo in dce11 watermark setup
drm/amdgpu: fix typo in dce10 watermark setup
drm/amdgpu: use top down allocation for non-CPU accessible vram
drm/amdgpu: be explicit about cpu vram access for driver BOs (v2)
Alex Deucher [Thu, 3 Sep 2015 22:01:00 +0000 (18:01 -0400)]
drm/amdgpu: rename gmc_v8_0_init_compute_vmid
It should be gfx_v8_0_init_compute_vmid since it's
part of the gfx block.
Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 3 Sep 2015 23:03:11 +0000 (19:03 -0400)]
drm/amdgpu: fix vce3 instance handling
Need to properly handle the instances for the idle
checks and soft reset.
Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Fri, 4 Sep 2015 19:08:55 +0000 (15:08 -0400)]
drm/amdgpu: remove ib test for the second VCE Ring
it seems the VCE ring 1 ib test not reliable, remove it for now.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-and-Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Christian König [Fri, 4 Sep 2015 16:48:29 +0000 (18:48 +0200)]
drm/amdgpu: properly enable VM fault interrupts
This fixes not printing VM faults.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 4 Sep 2015 04:11:54 +0000 (00:11 -0400)]
drm/amdgpu: fix warning in scheduler
This should never happen so warn when the count does
not equal the expected size.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 4 Sep 2015 03:09:20 +0000 (13:09 +1000)]
Merge tag 'drm-intel-next-fixes-2015-09-02' of git://anongit.freedesktop.org/drm-intel into drm-next
i915 display fixes headed for v4.3. Mostly SKL, but some regression
fixes too.
* tag 'drm-intel-next-fixes-2015-09-02' of git://anongit.freedesktop.org/drm-intel:
i915: Set ddi_pll_sel in DP MST path
drm/i915: Don't use link_bw for PLL setup
drm/i915: Preserve SSC earlier
drm/i915/skl: Adding DDI_E power well domain
drm/i915: eDP can be present on DDI-E
drm/i915/skl: Enable DDI-E
drm/i915: Enable HDMI on DDI-E
drm/i915: apply the PCI_D0/D3 hibernation workaround everywhere on pre GEN6
drm/i915: Check DP link status on long hpd too
drm/i915: set CDCLK if DPLL0 enabled during resuming from S3
Dave Airlie [Fri, 4 Sep 2015 03:08:40 +0000 (13:08 +1000)]
Merge branch 'drm-rockchip-2015-08-26' of https://github.com/markyzq/kernel-drm-rockchip into drm-next
Here are some fixes and some new features for rockchip drm,
tested on popmetal rk3288 board, can you land them?
* 'drm-rockchip-2015-08-26' of https://github.com/markyzq/kernel-drm-rockchip:
drm/rockchip: vop: support plane scale
drm/rockchip: vop: restore vop registers when resume
drm/rockchip: vop: Default enable win2/3 area0 bit
drm/rockchip: vop: Add yuv plane support
drm/rockchip: vop: Fix window dest start point
drm/rockchip: vop: Fix virtual stride calculation
Dave Airlie [Fri, 4 Sep 2015 03:08:08 +0000 (13:08 +1000)]
Merge tag 'vmwgfx-next-15-09-01' of git://people.freedesktop.org/~thomash/linux into drm-next
Pull request of 2015-09-01
A single commit. Workaround for
https://bugzilla.redhat.com/show_bug.cgi?id=
1227193
* tag 'vmwgfx-next-15-09-01' of git://people.freedesktop.org/~thomash/linux:
drm/vmwgfx: Allow dropped masters render-node like access on legacy nodes v2
Dave Airlie [Fri, 4 Sep 2015 03:07:18 +0000 (13:07 +1000)]
Merge branch 'exynos-drm-next' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next
This is a last pull request, which includes two g2d patches
I missed, and more cleanup series of Exynos drm driver.
The cleanup series makes Exynos drm driver more simple,
and removes unnecessary codes, and considers multiple plane format
of framebuffer. I hope this not to be late.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
drm/exynos: remove buf_cnt from struct exynos_drm_fb
drm/exynos: remove exynos_drm_fb_get_buf_cnt()
drm/exynos: cleanup exynos_user_fb_create()
drm/exynos: update exynos_drm_framebuffer_init() for multiple buffers
drm/exynos: cleanup to get gem object for fb
drm/exynos: update fb_info via only one function
drm/exynos: cleanup exynos_drm_fbdev_update()
drm/exynos: s/exynos_gem_obj/obj in exynos_drm_fbdev.c
drm/exynos: remove exynos_drm_fb_set_buf_cnt()
drm/exynos: remove superfluous checks in g2d_check_reg_offset()
drm/exynos: fix size check in g2d_check_buf_desc_is_valid()
Dave Airlie [Fri, 4 Sep 2015 03:06:29 +0000 (13:06 +1000)]
Merge branch 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux into drm-next
More fixes for radeon and amdgpu for 4.3:
- Send full DP aux address fixes for radeon and amdgpu
- Fix an HDMI display regression for pre-DCE5 parts
- UVD suspend fixes for amdgpu
- Add an rs480 suspend quirk
- Fix bo reserve handling in amdgpu GEM_OP ioctl
- GPU scheduler fixes
- SDMA optimizations
- MEC fix for Fiji
* 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux: (21 commits)
drm/amdgpu: set MEC doorbell range for Fiji
drm/amdgpu: implement burst NOP for SDMA
drm/amdgpu: add insert_nop ring func and default implementation
drm/amdgpu: add amdgpu_get_sdma_instance helper function
drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES
drm/amdgpu: add burst_nop flag for sdma
drm/amdgpu: add count field for the SDMA NOP packet v2
drm/amdgpu: use PT for VM sync on unmap
drm/amdgpu: make wait_event uninterruptible in push_job
drm/amdgpu: fix amdgpu_bo_unreserve order in GEM_OP IOCTL v2
drm/amdgpu: partially revert "modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()" v2
Add radeon suspend/resume quirk for HP Compaq dc5750.
drm/amdgpu: re-work sync_resv
drm/amdgpu/atom: Send out the full AUX address
drm/radeon/native: Send out the full AUX address
drm/radeon/atom: Send out the full AUX address
drm/amdgpu: use IB for fill_buffer instead of direct command
drm/amdgpu: stop trying to suspend UVD sessions v2
drm/amdgpu: add scheduler dependency callback v2
drm/amdgpu: let the scheduler work more with jobs v2
...
Christian König [Wed, 2 Sep 2015 18:25:48 +0000 (20:25 +0200)]
drm/amdgpu: fix buffer placement under memory pressure
Some buffers (UVD/VM page tables) must be placed in VRAM,
but the byte restriction for moving buffers didn't took this
into account.
Port of radeon commit
4b09556660bfe1b43d72ca858524c6baf2c6cb1d.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 3 Sep 2015 04:53:24 +0000 (00:53 -0400)]
drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logic
The logic was reversed. This feature is not enabled
at the moment, but fix it now for the future.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 3 Sep 2015 14:16:23 +0000 (10:16 -0400)]
drm/amdgpu: fix typo in dce11 watermark setup
Using the wrong watermwark value for the secondary
watermark. Copy paste typo. Noticed by Mykola.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Alex Deucher [Thu, 3 Sep 2015 14:19:03 +0000 (10:19 -0400)]
drm/amdgpu: fix typo in dce10 watermark setup
Using the wrong watermwark value for the secondary
watermark. Copy paste typo. Noticed by Mykola.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Alex Deucher [Wed, 2 Sep 2015 19:06:08 +0000 (15:06 -0400)]
drm/amdgpu: use top down allocation for non-CPU accessible vram
Should help avoid fragmentation of vram due to CPU access
requirements.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 27 Aug 2015 04:14:16 +0000 (00:14 -0400)]
drm/amdgpu: be explicit about cpu vram access for driver BOs (v2)
For kernel driver BOs, be explicit about whether we need
vram access up front. This avoids unecessary migrations and
avoids using visible vram for buffers were it's not needed.
v2: line wrap fixes
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jammy Zhou [Tue, 1 Sep 2015 08:44:11 +0000 (16:44 +0800)]
drm/amdgpu: set MEC doorbell range for Fiji
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jammy Zhou [Tue, 1 Sep 2015 05:13:54 +0000 (13:13 +0800)]
drm/amdgpu: implement burst NOP for SDMA
Customize the insert_nop func for SDMA rings, and use burst NOP for
ring/IB submissions in other places as well
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jammy Zhou [Tue, 1 Sep 2015 05:04:08 +0000 (13:04 +0800)]
drm/amdgpu: add insert_nop ring func and default implementation
The insert_nop function is added to amdgpu_ring_funcs structure as
well as the default implementation
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jammy Zhou [Tue, 1 Sep 2015 04:56:17 +0000 (12:56 +0800)]
drm/amdgpu: add amdgpu_get_sdma_instance helper function
This function is added to map the ring to sdma instance
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jammy Zhou [Tue, 1 Sep 2015 04:54:27 +0000 (12:54 +0800)]
drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES
Remove the hardcoded usage
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jammy Zhou [Mon, 31 Aug 2015 06:06:39 +0000 (14:06 +0800)]
drm/amdgpu: add burst_nop flag for sdma
The burst NOP is supported for SDMA when feature_version is >= 20.
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jammy Zhou [Mon, 31 Aug 2015 06:01:05 +0000 (14:01 +0800)]
drm/amdgpu: add count field for the SDMA NOP packet v2
This is added to support the burst NOP
v2: squash the typo fix
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 1 Sep 2015 13:33:25 +0000 (15:33 +0200)]
drm/amdgpu: use PT for VM sync on unmap
Instead of the array which is used for ID management.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Chunming Zhou [Mon, 31 Aug 2015 07:46:12 +0000 (15:46 +0800)]
drm/amdgpu: make wait_event uninterruptible in push_job
with interruptible, the push_job maybe return -ERESTARTSYS,
then result in push_job error.
E.g. bug trace:
[ 181.618860] *****amdgpu_copy_buffer:fence->seq:0x0000000048d8758b, contxt:
1207959552, ref:
683967304, r:-512
[ 181.618929] BUG: unable to handle kernel paging request at
ffffffff811aa266
[ 181.625887] IP: [<
ffffffff81548ffc>] reservation_object_add_excl_fence+0x3c/0x120
...
[ 181.859767] [<
ffffffff811aa266>] ? unmap_mapping_range+0x66/0x110
[ 181.865928] [<
ffffffffc0608ac1>] ttm_bo_move_accel_cleanup+0x41/0x3c0 [ttm]
[ 181.872971] [<
ffffffffc062d382>] amdgpu_move_blit.isra.18+0x122/0x150 [amdgpu]
[ 181.880254] [<
ffffffff811aa266>] ? unmap_mapping_range+0x66/0x110
[ 181.886420] [<
ffffffffc062d709>] amdgpu_bo_move+0xa9/0x200 [amdgpu]
[ 181.892753] [<
ffffffffc0606e8d>] ttm_bo_handle_move_mem+0x26d/0x5c0 [ttm]
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Christian König [Fri, 28 Aug 2015 15:27:54 +0000 (17:27 +0200)]
drm/amdgpu: fix amdgpu_bo_unreserve order in GEM_OP IOCTL v2
No copy_(to|from)_user while BO is reserved.
v2: handle default path as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Christian König [Wed, 2 Sep 2015 16:14:57 +0000 (12:14 -0400)]
drm/amdgpu: partially revert "modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()" v2
That isn't used any more.
v2: rebase
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jeffery Miller [Tue, 1 Sep 2015 15:23:02 +0000 (11:23 -0400)]
Add radeon suspend/resume quirk for HP Compaq dc5750.
With the radeon driver loaded the HP Compaq dc5750
Small Form Factor machine fails to resume from suspend.
Adding a quirk similar to other devices avoids
the problem and the system resumes properly.
Signed-off-by: Jeffery Miller <jmiller@neverware.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Chunming Zhou [Mon, 24 Aug 2015 08:59:54 +0000 (16:59 +0800)]
drm/amdgpu: re-work sync_resv
sync_resv is to handle both amdgpu_fence and sched_fence.
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Alex Deucher [Mon, 31 Aug 2015 15:08:44 +0000 (11:08 -0400)]
drm/amdgpu/atom: Send out the full AUX address
AUX addresses are 20 bits long. Send out the entire address instead of
just the low 16 bits.
Port of:
drm/radeon/atom: Send out the full AUX address
to amdgpu
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Joonyoung Shim [Tue, 1 Sep 2015 07:22:55 +0000 (16:22 +0900)]
drm/exynos: remove buf_cnt from struct exynos_drm_fb
Looking other drm drivers, there is no the restriction that framebuffer
has only one buffer in .create_handle() callback. They use just first
buffer.
If this limitation is removed, there is no reason keeping buffer count
for framebuffer, so we can remove buf_cnt from struct exynos_drm_fb.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:54 +0000 (16:22 +0900)]
drm/exynos: remove exynos_drm_fb_get_buf_cnt()
We can get buffer count of framebuffer using drm_format_num_planes(), so
keeping exynos_drm_fb_get_buf_cnt() is unnecessary.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:53 +0000 (16:22 +0900)]
drm/exynos: cleanup exynos_user_fb_create()
Using exynos_drm_framebuffer_init(), redundant codes can be removed.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:52 +0000 (16:22 +0900)]
drm/exynos: update exynos_drm_framebuffer_init() for multiple buffers
This modifies exynos_drm_framebuffer_init() to be possible to support
multiple buffers. Then it can be used by exynos_user_fb_create().
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:51 +0000 (16:22 +0900)]
drm/exynos: cleanup to get gem object for fb
Current codes get first gem object and then again get remain gem
objects. They can be unified to one routine.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:50 +0000 (16:22 +0900)]
drm/exynos: update fb_info via only one function
This patch moves codes to update fb_info into exynos_drm_fbdev_update(),
so fb_info is updated via only one function.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:49 +0000 (16:22 +0900)]
drm/exynos: cleanup exynos_drm_fbdev_update()
It can get exynos_gem object via function argument, so no need to call
exynos_drm_fb_gem_obj() in exynos_drm_fbdev_update.
It also can get struct drm_framebuffer *fb via helper->fb, so can remove
a function argument for it.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:48 +0000 (16:22 +0900)]
drm/exynos: s/exynos_gem_obj/obj in exynos_drm_fbdev.c
The variable name "exynos_gem_obj" is too long, so some lines exceed 80
characters. It's simple to use "obj" instead of "exynos_gem_obj".
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Tue, 1 Sep 2015 07:22:47 +0000 (16:22 +0900)]
drm/exynos: remove exynos_drm_fb_set_buf_cnt()
The exynos_drm_fb_set_buf_cnt() is used to set buffer count only in
exynos_drm_fbdev_update(). This patch sets directly buffer count in
exynos_drm_framebuffer_init() without using exynos_drm_fb_set_buf_cnt(),
so there is no any reason to keep exynos_drm_fb_set_buf_cnt().
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Tobias Jakobi [Mon, 17 Aug 2015 22:51:23 +0000 (00:51 +0200)]
drm/exynos: remove superfluous checks in g2d_check_reg_offset()
The cases of the switch statement ensure that reg_type
can never be REG_TYPE_NONE here.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Tobias Jakobi [Mon, 17 Aug 2015 22:51:24 +0000 (00:51 +0200)]
drm/exynos: fix size check in g2d_check_buf_desc_is_valid()
The size check was incomplete. It only computed the
size of area of the drawing rectangle and checked if
the size still fit inside the buffer.
The correct check is to compute the position of the
last byte that the G2D engine is going to access and
then check if that position is still contained in the
buffer. In particular we need the stride information
to determine this.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Ville Syrjälä [Thu, 27 Aug 2015 20:56:12 +0000 (23:56 +0300)]
drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x
Pass the correct hpd[] array to intel_get_hpd_pins() on pre-g4x
platforms.
This got broken in the following commit:
commit
fd63e2a972c670887e5e8a08440111d3812c0996
Author: Imre Deak <imre.deak@intel.com>
Date: Tue Jul 21 15:32:44 2015 -0700
drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Egbert Eich <eich@suse.de>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Artem Savkov [Wed, 2 Sep 2015 11:41:18 +0000 (13:41 +0200)]
uapi/drm/i915_drm.h: fix userspace compilation.
commit
346add7834557b5b9628b9bf2387106d42e631d4
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Tue Jul 14 18:07:30 2015 +0200
drm/i915: Use expcitly fixed type in compat32 structs
changed the type of param field in drm_i915_getparam from int to
s32. This header is exported to userspace and needs to use userspace
type __s32 instead.
This fixes userspace compilation errors like the following:
include/drm/i915_drm.h:361:2: error: unknown type name 's32'
s32 param;
Signed-off-by: Artem Savkov <asavkov@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Chris Wilson [Mon, 31 Aug 2015 14:10:39 +0000 (15:10 +0100)]
drm/i915: Always mark the object as dirty when used by the GPU
There have been many hard to track down bugs whereby userspace forgot to
flag a write buffer and then cause graphics corruption or a hung GPU
when that buffer was later purged under memory pressure (as the buffer
appeared clean, its pages would have been evicted rather than preserved
and any changes more recent than in the backing storage would be lost).
In retrospect this is a rare optimisation against memory pressure,
already the slow path. If we always mark the buffer as dirty when
accessed by the GPU, anything not used can still be evicted cheaply
(ideal behaviour for mark-and-sweep eviction) but we do not run the risk
of corruption. For correct read serialisation, userspace still has to
notify when the GPU writes to an object. However, there are certain
situations under which userspace may wish to tell white lies to the
kernel...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: "Goel, Akash" <akash.goel@intel.co>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 26 Aug 2015 19:55:07 +0000 (22:55 +0300)]
drm/dp: Add dp_aux_i2c_speed_khz module param to set the assume i2c bus speed
To help with debugging i2c-over-aux issues, add a module parameter than
can be used to tweak the assumed i2c bus speed, and thus the maximum
number of retries we will do for each aux message.
Cc: Simon Farnsworth <simon.farnsworth@onelan.com>
Cc: moosotc@gmail.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Tue, 1 Sep 2015 17:12:54 +0000 (20:12 +0300)]
drm/dp: Adjust i2c-over-aux retry count based on message size and i2c bus speed
Calculate the number of retries we should do for each i2c-over-aux
message based on the time it takes to perform the i2c transfer vs. the
aux transfer. We assume the shortest possible length for the aux
transfer, and the longest possible (exluding clock stretching) for the
i2c transfer.
The DP spec has some examples on how to calculate this, but we don't
calculate things quite the same way. The spec doesn't account for the
retry interval (assumes immediate retry on defer), and doesn't assume
the best/worst case behaviour as we do.
Note that currently we assume 10 kHz speed for the i2c bus. Some real
world devices (eg. some Apple DP->VGA dongle) fails with less than 16
retries. and that would correspond to something close to 15 kHz (with
our method of calculating things) But let's just go for 10 kHz to be
on the safe side. Ideally we should query/set the i2c bus speed via
DPCD but for now this should at leaast remove the regression from the
1->16 byte trasnfer size change. And of course if the sink completes
the transfer quicker this shouldn't slow things down since we don't
change the interval between retries.
I did a few experiments with a DP->DVI dongle I have that allows you
to change the i2c bus speed. Here are the results of me changing the
actual bus speed and the assumed bus speed and seeing when we start
to fail the operation:
actual i2c khz assumed i2c khz max retries
1 1 ok -> 2 fail 211 ok -> 106 fail
5 8 ok -> 9 fail 27 ok -> 24 fail
10 17 ok -> 18 fail 13 ok -> 12 fail
100 210 ok -> 211 fail 2 ok -> 1 fail
So based on that we have a fairly decent safety margin baked into
the formula to calculate the max number of retries.
Fixes a regression with some DP dongles from:
commit
1d002fa720738bcd0bddb9178e9ea0773288e1dd
Author: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
Date: Tue Feb 10 18:38:08 2015 +0000
drm/dp: Use large transactions for I2C over AUX
v2: Use best case for AUX and worst case for i2c (Simon Farnsworth)
Add a define our AUX retry interval and account for it
v3: Make everything usecs to avoid confusion about units (Daniel)
Add a comment reminding people about the AUX bitrate (Daniel)
Use DIV_ROUND_UP() since we're after the "worst" case for i2c
Cc: Simon Farnsworth <simon.farnsworth@onelan.com>
Cc: moosotc@gmail.com
Tested-by: moosotc@gmail.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91451
Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 26 Aug 2015 19:55:05 +0000 (22:55 +0300)]
drm/dp: Define AUX_RETRY_INTERVAL as 500 us
Currently we react to native and i2c defers by waiting either 400-500 us
or 500-600 us, depending on which code path we take. Consolidate them
all to one define AUX_RETRY_INTERVAL which defines the minimum interval.
Since we've been using two different intervals pick the longer of them
and define AUX_RETRY_INTERVAL as 500 us. For the maximum just use
AUX_RETRY_INTERVAL+100 us.
I want to have a define for this so that I can use it when calculating
the estimated duration of i2c-over-aux transfers. Without a define it
would be very easy to change the sleep duration and neglect to update
the i2c-over-aux estimates.
Cc: Simon Farnsworth <simon.farnsworth@onelan.com>
Cc: moosotc@gmail.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ander Conselvan de Oliveira [Mon, 31 Aug 2015 08:23:28 +0000 (11:23 +0300)]
i915: Set ddi_pll_sel in DP MST path
The DP MST encoder config function never sets ddi_pll_sel, even though
its value is programmed in its ->pre_enable() hook. That used to work
because a new pipe_config was kzalloc'ed at every modeset, and the value
of zero selects the highest clock for the PLL. Starting with the commit
below, the value of ddi_pll_sel is preserved through modesets, and since
the correct value wasn't properly setup by the MST code, it could lead
to warnings and blank screens.
commit
8504c74c7ae48b4b8ed1f1c0acf67482a7f45c93
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date: Fri May 15 11:51:50 2015 +0300
drm/i915: Preserve ddi_pll_sel when allocating new pipe_config
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91628
Cc: stable@vger.kernel.org # 7e6313a2516d drm/i915: Don't use link_bw for PLL setup
Cc: stable@vger.kernel.org
Cc: Timo Aaltonen <tjaalton@ubuntu.com>
Cc: Luciano Coelho <luciano.coelho@intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Tue, 11 Aug 2015 17:21:46 +0000 (20:21 +0300)]
drm/i915: Don't use link_bw for PLL setup
Use port_clock instead of link_bw when picking the PLL parameters for
DP. link_bw may be zero with an eDP 1.4 sink that supports
DP_LINK_RATE_SET so we shouldn't use it for anything other than feed it
to the sink appropriately.
v2: Fix typo in commit message (Sivakumar)
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[Jani: cherry-picked from future.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Thomas Hellstrom [Thu, 27 Aug 2015 17:06:24 +0000 (10:06 -0700)]
drm/vmwgfx: Allow dropped masters render-node like access on legacy nodes v2
Applications like gnome-shell may try to render after dropping master
privileges. Since the driver should now be safe against this scenario,
allow those applications to use their legacy node like a render node.
v2: Add missing return statement.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Maarten Lankhorst [Mon, 31 Aug 2015 10:25:04 +0000 (12:25 +0200)]
drm/atomic: Fix bookkeeping with TEST_ONLY, v3.
Commit
ec9f932ed41622d120de52a5b525e4d77b9ef17e
"drm/atomic: Cleanup on error properly in the atomic ioctl."
cleaned up some error paths, but didn't fix the TEST_ONLY path.
In the check only case plane->fb shouldn't be updated, and
the vblank events should be cleared as on failure.
Changes since v1:
- Fix -EDEADLK handling of vblank events too.
- Free state last with CHECK_ONLY.
Changes since v2:
- Add comment about freeing crtc_state->event with TEST_ONLY.
(Daniel Stone)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Lukas Wunner [Wed, 15 Jul 2015 11:57:35 +0000 (13:57 +0200)]
drm/i915: Preserve SSC earlier
Commit
92122789b2d6 ("drm/i915: preserve SSC if previously set v3")
added code to intel_modeset_gem_init to override the SSC status read
from VBT with the SSC status set by BIOS.
However, intel_modeset_gem_init is invoked *after* intel_modeset_init,
which calls intel_setup_outputs, which *modifies* SSC status by way of
intel_init_pch_refclk. So unlike advertised, intel_modeset_gem_init
doesn't preserve the SSC status set by BIOS but whatever
intel_init_pch_refclk decided on.
This is a problem on dual gpu laptops such as the MacBook Pro which
require either a handler to switch DDC lines, or the discrete gpu
to proxy DDC/AUX communication: Both the handler and the discrete
gpu may initialize after the i915 driver, and consequently, an LVDS
connector may initially seem disconnected and the SSC therefore
is disabled by intel_init_pch_refclk, but on reprobe the connector
may turn out to be connected and the SSC must then be enabled.
Due to
92122789b2d6 however, the SSC is not enabled on reprobe since
it is assumed BIOS disabled it while in fact it was disabled by
intel_init_pch_refclk.
Also, because the SSC status is preserved so late, the preserved value
only ever gets used on resume but not on panel initialization:
intel_modeset_init calls intel_init_display which indirectly calls
intel_panel_use_ssc via multiple subroutines, *before* the BIOS value
overrides the VBT value in intel_modeset_gem_init (intel_panel_use_ssc
is the sole user of dev_priv->vbt.lvds_use_ssc).
Fix this by moving the code introduced by
92122789b2d6 from
intel_modeset_gem_init to intel_modeset_init before the invocation
of intel_setup_outputs and intel_init_display.
Add a DRM_DEBUG_KMS as suggested way back by Jani:
http://lists.freedesktop.org/archives/intel-gfx/2014-June/046666.html
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Paul Hordiienko <pvt.gord@gmail.com>
[MBP 6,2 2010 intel ILK + nvidia GT216 pre-retina]
Tested-by: William Brown <william@blackhats.net.au>
[MBP 8,2 2011 intel SNB + amd turks pre-retina]
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina]
Tested-by: Bruno Bierbaumer <bruno@bierbaumer.net>
[MBP 11,3 2013 intel HSW + nvidia GK107 retina -- work in progress]
Fixes: 92122789b2d6 ("drm/i915: preserve SSC if previously set v3")
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Xiong Zhang [Thu, 13 Aug 2015 10:00:12 +0000 (18:00 +0800)]
drm/i915/skl: Adding DDI_E power well domain
From B spec, DDI_E port belong to PowerWell 2, but
DDI_E share the powerwell_req/staus register bit with
DDI_A which belong to DDI_A_E_POWER_WELL.
In order to communicate with the connector on DDI-E, both
DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled.
Currently intel_dp_power_get(DDI_E) only enable
DDI_A_E_POWER_WELL, this patch will not only enable
DDI_a_E_POWER_WELL but also enable POWER_WELL_2.
This patch also fix the DDI-E hotplug function.
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Alex Deucher [Mon, 31 Aug 2015 15:15:05 +0000 (11:15 -0400)]
drm/radeon/native: Send out the full AUX address
AUX addresses are 20 bits long. Send out the entire address instead of
just the low 16 bits.
Port of:
drm/radeon/atom: Send out the full AUX address
to radeon non-atom aux path
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Ville Syrjälä [Thu, 27 Aug 2015 14:23:31 +0000 (17:23 +0300)]
drm/radeon/atom: Send out the full AUX address
AUX addresses are 20 bits long. Send out the entire address instead of
just the low 16 bits.
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Rodrigo Vivi [Thu, 6 Aug 2015 07:51:39 +0000 (15:51 +0800)]
drm/i915: eDP can be present on DDI-E
Enable eDP on DDI-E.
Also let's remove duplicated definitions to avoid later confusion.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Rodrigo Vivi [Sat, 8 Aug 2015 00:35:21 +0000 (17:35 -0700)]
drm/i915/skl: Enable DDI-E
There are OEMs using DDI-E out there,
so let's enable it.
Unfortunately there is no detection bit for DDI-E
So we need to rely on VBT for that.
I also need to give credits to Xiong since before seing
his approach to check info->support_* I was creating an ugly
vbt->ddie_sfuse_strap in order to propagate the ddi presence info
v2: Rebased as last patch in the series. since all other patches
in this series are needed for anything working propperly on DDI-E.
Credits-to: "Zhang, Xiong Y" <xiong.y.zhang@intel.com>
Cc: "Zhang, Xiong Y" <xiong.y.zhang@intel.com>
Reviewed-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>