oota-llvm.git
11 years agoFix variable name style. Don't cast to and from int.
Rafael Espindola [Tue, 11 Jun 2013 15:29:10 +0000 (15:29 +0000)]
Fix variable name style. Don't cast to and from int.

This enables the compiler to see the enum and produce warnings about a switch
not being fully covered. Fix one of these warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183749 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConvert another use of sys::identifyFileType.
Rafael Espindola [Tue, 11 Jun 2013 15:19:04 +0000 (15:19 +0000)]
Convert another use of sys::identifyFileType.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183747 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConvert another use of sys::identifyFileType.
Rafael Espindola [Tue, 11 Jun 2013 15:09:43 +0000 (15:09 +0000)]
Convert another use of sys::identifyFileType.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183746 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConvert a use of sys::identifyFileType to sys::fs::identify_magic.
Rafael Espindola [Tue, 11 Jun 2013 14:39:59 +0000 (14:39 +0000)]
Convert a use of sys::identifyFileType to sys::fs::identify_magic.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183745 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Make helper functions static.
Benjamin Kramer [Tue, 11 Jun 2013 13:32:25 +0000 (13:32 +0000)]
R600: Make helper functions static.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183744 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRequire members of llvm.used to be named.
Rafael Espindola [Tue, 11 Jun 2013 13:18:13 +0000 (13:18 +0000)]
Require members of llvm.used to be named.

The effect of llvm.used is to introduce an invisible reference, so this seems
a reasonable restriction. It will be used to provide an easy ordering of
the entries in llvm.used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183743 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRework r183728, suppress assert(0) for now. Its behavior depends on assertions on...
NAKAMURA Takumi [Tue, 11 Jun 2013 10:01:42 +0000 (10:01 +0000)]
Rework r183728, suppress assert(0) for now. Its behavior depends on assertions on win32 hosts.

FIXME: Introduce yet another checker but assert(0).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183736 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoIt adds support for negative zero offsets for loads and stores.
Mihai Popa [Tue, 11 Jun 2013 09:48:35 +0000 (09:48 +0000)]
It adds support for negative zero offsets for loads and stores.
Negative zero is returned by the primary expression parser as INT32_MIN, so all that the method needs to do is to accept this value.
Behavior already present for Thumb2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183734 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThis patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are option...
Mihai Popa [Tue, 11 Jun 2013 09:39:51 +0000 (09:39 +0000)]
This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183733 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: Enforce decoding rules for VLDn instructions
Amaury de la Vieuville [Tue, 11 Jun 2013 08:14:14 +0000 (08:14 +0000)]
ARM: Enforce decoding rules for VLDn instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183731 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: Fix STREX/LDREX reecoding
Amaury de la Vieuville [Tue, 11 Jun 2013 08:03:20 +0000 (08:03 +0000)]
ARM: Fix STREX/LDREX reecoding

The decoded MCInst wasn't reencoded as the same instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183729 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTweak a couple of tests on win32 hosts with +Asserts.
NAKAMURA Takumi [Tue, 11 Jun 2013 06:52:58 +0000 (06:52 +0000)]
Tweak a couple of tests on win32 hosts with +Asserts.

  - Don't use assert(0), or tests may pass or fail according to assertions.
  - For now, The tests are marked as XFAIL for win32 hosts.

FIXME: Could we avoid XFAIL to specify triple in the RUN lines?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183728 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARMAsmBackend.cpp: Use Triple::isOSBinFormatCOFF() instead of isOSWindows().
NAKAMURA Takumi [Tue, 11 Jun 2013 06:52:43 +0000 (06:52 +0000)]
ARMAsmBackend.cpp: Use Triple::isOSBinFormatCOFF() instead of isOSWindows().

FYI, isOSBinFormatCOFF() is as same as isOSWindows(), on trunk.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183727 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoWhitespace.
NAKAMURA Takumi [Tue, 11 Jun 2013 06:52:36 +0000 (06:52 +0000)]
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183726 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix dubious type name similar to member name.
Sean Silva [Tue, 11 Jun 2013 00:13:52 +0000 (00:13 +0000)]
Fix dubious type name similar to member name.

Should bring bots back to life.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183715 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix spurious semicolons.
Sean Silva [Mon, 10 Jun 2013 23:48:38 +0000 (23:48 +0000)]
Fix spurious semicolons.

Apparently these macros have semicolons inside of them already.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183712 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[yaml2obj] Initial ELF support.
Sean Silva [Mon, 10 Jun 2013 23:44:15 +0000 (23:44 +0000)]
[yaml2obj] Initial ELF support.

Currently, only emitting the ELF header is supported (no sections or
segments).

The ELFYAML code organization is broadly similar to the COFFYAML code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183711 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one.
Tim Northover [Mon, 10 Jun 2013 23:20:58 +0000 (23:20 +0000)]
ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one.

Some ARM CPUs only support ARM mode (ancient v4 ones, for example) and some
only support Thumb mode (M-class ones currently). This makes sure such CPUs
default to the correct mode and makes the AsmParser diagnose an attempt to
switch modes incorrectly.

rdar://14024354

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183710 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix xemacs mode line, don't put them in .cpp files (just header files). No
Nick Lewycky [Mon, 10 Jun 2013 23:10:59 +0000 (23:10 +0000)]
Fix xemacs mode line, don't put them in .cpp files (just header files). No
functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183709 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove a few fixmes, the only work we're doing is getting the string
Eric Christopher [Mon, 10 Jun 2013 22:24:10 +0000 (22:24 +0000)]
Remove a few fixmes, the only work we're doing is getting the string
to return and this is done all over.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183704 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix up comment.
Eric Christopher [Mon, 10 Jun 2013 22:24:07 +0000 (22:24 +0000)]
Fix up comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183703 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused function.
Eric Christopher [Mon, 10 Jun 2013 21:59:28 +0000 (21:59 +0000)]
Remove unused function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183698 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoIndentCount is only used within NDEBUG code.
Eric Christopher [Mon, 10 Jun 2013 20:58:53 +0000 (20:58 +0000)]
IndentCount is only used within NDEBUG code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183695 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86: Stop LEA64_32r doing unspeakable things to its arguments.
Tim Northover [Mon, 10 Jun 2013 20:43:49 +0000 (20:43 +0000)]
X86: Stop LEA64_32r doing unspeakable things to its arguments.

Previously LEA64_32r went through virtually the entire backend thinking it was
using 32-bit registers until its blissful illusions were cruelly snatched away
by MCInstLower and 64-bit equivalents were substituted at the last minute.

This patch makes it behave normally, and take 64-bit registers as sources all
the way through. Previous uses (for 32-bit arithmetic) are accommodated via
SUBREG_TO_REG instructions which make the types and classes agree properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183693 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a missing 'e'.
Rafael Espindola [Mon, 10 Jun 2013 20:32:27 +0000 (20:32 +0000)]
Add a missing 'e'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183692 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agotblgen: Assert that InstRWs doesn't grows when we don't expect it.
Benjamin Kramer [Mon, 10 Jun 2013 20:19:35 +0000 (20:19 +0000)]
tblgen: Assert that InstRWs doesn't grows when we don't expect it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183690 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support extended sc mnemonic
Ulrich Weigand [Mon, 10 Jun 2013 17:19:43 +0000 (17:19 +0000)]
[PowerPC] Support extended sc mnemonic

A plain "sc" without argument is supposed to be treated like "sc 0"
by the assembler.  This patch adds a corresponding alias.

Problem reported by Joerg Sonnenberger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183687 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support branch mnemonics with implied CR0
Ulrich Weigand [Mon, 10 Jun 2013 17:19:15 +0000 (17:19 +0000)]
[PowerPC] Support branch mnemonics with implied CR0

The extended branch mnemonics are supposed to use an implied CR0
if there is no explicit condition register specified.  This patch
adds extra variants of the mnemonics to this effect.

Problem reported by Joerg Sonnenberger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183686 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Use multiclass to generate extended branch mnemonics
Ulrich Weigand [Mon, 10 Jun 2013 17:18:29 +0000 (17:18 +0000)]
[PowerPC] Use multiclass to generate extended branch mnemonics

This patch removes some redundancy by generating the extended branch
mnemonics via a multiclass.

No change in behaviour expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183685 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSilencing an MSVC warning about comparing signed and unsigned values.
Aaron Ballman [Mon, 10 Jun 2013 16:45:40 +0000 (16:45 +0000)]
Silencing an MSVC warning about comparing signed and unsigned values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183682 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove the old IdentifyFileType now that lld was updated.
Rafael Espindola [Mon, 10 Jun 2013 15:37:29 +0000 (15:37 +0000)]
Remove the old IdentifyFileType now that lld was updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183671 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPass a StringRef to sys::identifyFileType.
Rafael Espindola [Mon, 10 Jun 2013 15:27:39 +0000 (15:27 +0000)]
Pass a StringRef to sys::identifyFileType.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183669 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix an out of bounds array access.
Rafael Espindola [Mon, 10 Jun 2013 15:22:18 +0000 (15:22 +0000)]
Fix an out of bounds array access.

We were looking at Magic[5] without checking Length. Since this path would not
return unless Length >= 18 anyway, just move the >= 18 check up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183666 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUpdate for current naming conventions.
Rafael Espindola [Mon, 10 Jun 2013 14:56:16 +0000 (14:56 +0000)]
Update for current naming conventions.

I will change identifyFileType to use a StringRef in the next patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183664 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix misleading comments in ARMAsmParser
Amaury de la Vieuville [Mon, 10 Jun 2013 14:17:15 +0000 (14:17 +0000)]
Fix misleading comments in ARMAsmParser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183657 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: ISB cannot be passed the same options as DMB
Amaury de la Vieuville [Mon, 10 Jun 2013 14:17:08 +0000 (14:17 +0000)]
ARM: ISB cannot be passed the same options as DMB

ISB should only accepts full system sync, other options are reserved

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183656 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and...
Justin Holewinski [Mon, 10 Jun 2013 13:29:47 +0000 (13:29 +0000)]
[NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and causes constants to be emitted in the global address space

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183652 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAvoid warnings about unused parameters that tend to come up a lot when
Duncan Sands [Mon, 10 Jun 2013 12:09:30 +0000 (12:09 +0000)]
Avoid warnings about unused parameters that tend to come up a lot when
building outside projects with a different compiler than that used to build
LLVM itself (eg switching between gcc and clang).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183650 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd test for ARM FastISel load/store register classes
JF Bastien [Mon, 10 Jun 2013 00:35:57 +0000 (00:35 +0000)]
Add test for ARM FastISel load/store register classes

r183624 fixed an issue that was tested indirectly. Test it directly with this new test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183634 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a regression I introduced when I expanded the complex pseudos in
Reed Kotler [Sun, 9 Jun 2013 23:23:46 +0000 (23:23 +0000)]
Fix a regression I introduced when I expanded the complex pseudos in
the Mips16 port. A few of the psuedos could either take signed
or unsigned arguments and I did not distinguish the case and improperly
rejected some valid cases that the assembler had previously accepted
when they were pure pseudos that expanded as assembly instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183633 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agotblgen: always lookup values from the original vector as it could be grown under...
Benjamin Kramer [Sun, 9 Jun 2013 15:20:23 +0000 (15:20 +0000)]
tblgen: always lookup values from the original vector as it could be grown under our feet.

PR16281.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183630 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a const version of findNearestCommonDominator to PostDom for convenience.
Benjamin Kramer [Sun, 9 Jun 2013 15:09:30 +0000 (15:09 +0000)]
Add a const version of findNearestCommonDominator to PostDom for convenience.

PR16283.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183629 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRefine the ARM EHABI test cases.
Logan Chien [Sun, 9 Jun 2013 12:36:57 +0000 (12:36 +0000)]
Refine the ARM EHABI test cases.

Since we have ARM unwind directive parser and assembler, we
can check the correctness in two stages:

1. From LLVM assembly (.ll) to ARM assembly (.s)
2. From ARM assembly (.s) to ELF object file (.o)

We already have several "*.s to *.o" test cases.  This CL adds
some "*.ll to *.s" test cases and removes the redundant "*.ll to *.o"
test cases.

New test cases to check "*.ll to *.s" code generator:

- ehabi.ll: Check the correctness of the generated unwind directives.
- section-name.ll: Check the section name of functions.

Removed test cases:

- ehabi-mc-cantunwind.ll
  (Covered by ehabi-cantunwind.ll, and eh-directive-cantunwind.s)
- ehabi-mc-compact-pr0.ll
  (Covered by ehabi.ll, eh-compact-pr0.s, eh-directive-save.s, and
   eh-directive-setfp.s)
- ehabi-mc-compact-pr1.ll
  (Covered by ehabi.ll, eh-compact-pr1.s, eh-directive-save.s, and
   eh-directive-setfp.s)
- ehabi-mc.ll
  (Covered by ehabi.ll, and eh-directive-integrated-test.s)
- ehabi-mc-section-group.ll
  (Covered by section-name.ll, and eh-directive-section-comdat.s)
- ehabi-mc-section.ll
  (Covered by section-name.ll, and eh-directive-section.s)
- ehabi-mc-sh_link.ll
  (Covered by eh-directive-text-section.s, and eh-directive-section.s)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183628 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix ARM unwind opcode assembler in several cases.
Logan Chien [Sun, 9 Jun 2013 12:22:30 +0000 (12:22 +0000)]
Fix ARM unwind opcode assembler in several cases.

Changes to ARM unwind opcode assembler:

* Fix multiple .save or .vsave directives.  Besides, the
  order is preserved now.

* For the directives which will generate multiple opcodes,
  such as ".save {r0-r11}", the order of the unwind opcode
  is fixed now, i.e. the registers with less encoding value
  are popped first.

* Fix the $sp offset calculation.  Now, we can use the
  .setfp, .pad, .save, and .vsave directives at any order.

Changes to test cases:

* Add test cases to check the order of multiple opcodes
  for the .save directive.

* Fix the incorrect $sp offset in the test case.  The
  stack pointer offset specified in the test case was
  incorrect.  (Changed test cases: ehabi-mc-section.ll and
  ehabi-mc.ll)

* The opcode to restore $sp are slightly reordered.  The
  behavior are not changed, and the new output is same
  as the output of GNU as.  (Changed test cases:
  eh-directive-pad.s and eh-directive-setfp.s)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183627 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemoved PackedDouble domain from scalar instructions. Added more formats for the...
Elena Demikhovsky [Sun, 9 Jun 2013 07:37:10 +0000 (07:37 +0000)]
Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183626 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake DeadArgumentElimination more conservative on variadic functions
Tim Northover [Sun, 9 Jun 2013 02:17:27 +0000 (02:17 +0000)]
Make DeadArgumentElimination more conservative on variadic functions

Variadic functions are particularly fragile in the face of ABI changes, so this
limits how much the pass changes them

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183625 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM FastISel fix load register classes
JF Bastien [Sun, 9 Jun 2013 00:20:24 +0000 (00:20 +0000)]
ARM FastISel fix load register classes

The register classes when emitting loads weren't quite restricting enough, leading to MI verification failure on the result register.

These are new failures that weren't there the first time I tried enabling ARM FastISel for new targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183624 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTargetLowering: Clean up method description comments
David Majnemer [Sat, 8 Jun 2013 23:51:45 +0000 (23:51 +0000)]
TargetLowering: Clean up method description comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183623 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agosys::process::get_id() now returns the process ID instead of a process handle on...
Aaron Ballman [Sat, 8 Jun 2013 20:29:03 +0000 (20:29 +0000)]
sys::process::get_id() now returns the process ID instead of a process handle on Windows.  Patch thanks to Kim Gräsman!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183621 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.
Venkatraman Govindaraju [Sat, 8 Jun 2013 15:32:59 +0000 (15:32 +0000)]
[Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183613 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: fix VMOVvnf32 decoding when ambiguous with VCVT
Amaury de la Vieuville [Sat, 8 Jun 2013 13:54:05 +0000 (13:54 +0000)]
ARM: fix VMOVvnf32 decoding when ambiguous with VCVT

Enforce Table A7-15 (op=1, cmode=0b111) -> UNDEF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183612 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: enforce SRS decoding constraints
Amaury de la Vieuville [Sat, 8 Jun 2013 13:43:59 +0000 (13:43 +0000)]
ARM: enforce SRS decoding constraints

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183611 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: fix CPS decoding when ambiguous with QADD
Amaury de la Vieuville [Sat, 8 Jun 2013 13:38:52 +0000 (13:38 +0000)]
ARM: fix CPS decoding when ambiguous with QADD

Handle the case when the disassembler table can't tell
the difference between some encodings of QADD and CPS.

Add some necessary safe guards in CPS decoding as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183610 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: fix VCVT decoding
Amaury de la Vieuville [Sat, 8 Jun 2013 13:29:11 +0000 (13:29 +0000)]
ARM: fix VCVT decoding

UNPRED was reported instead of UNDEF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183608 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUpdate code listings in LLVM tutorial.
Logan Chien [Sat, 8 Jun 2013 09:03:03 +0000 (09:03 +0000)]
Update code listings in LLVM tutorial.

Several LLVM headers are moved.  The code listings in
LLVM tutorial are not updated yet.

This CL removes the code replica in the .rst, and replace
them with a literalinclude directive, so that sphinx can
include the latest code automatically.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183607 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago Fix a potential bug in r183584.
Shuxin Yang [Sat, 8 Jun 2013 04:56:05 +0000 (04:56 +0000)]
  Fix a potential bug in r183584.

  r183584 tries to derive some info from the code *AFTER* a call and apply
these derived info to the code *BEFORE* the call, which is not always safe
as the call in question may never return, and in this case, the derived
info is invalid.

  Thank Duncan for pointing out this potential bug.

rdar://14073661

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183606 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't artifically restrict input object size.
Sean Silva [Sat, 8 Jun 2013 04:32:59 +0000 (04:32 +0000)]
Don't artifically restrict input object size.

sys::IdentifyFileType is already conscious of the length, and
object_error::invalid_file_type is returned below anyway if
sys::IdentifyFileType doesn't recognize the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183605 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix unused variable warning from my previous patch.
JF Bastien [Sat, 8 Jun 2013 00:51:51 +0000 (00:51 +0000)]
Fix unused variable warning from my previous patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183601 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Use a helper function which compares the size of the source and
Akira Hatanaka [Sat, 8 Jun 2013 00:14:54 +0000 (00:14 +0000)]
[mips] Use a helper function which compares the size of the source and
destination operands of an instruction.

No functionality changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183596 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReapply r183552. This time, use a standard type for the option to avoid template
Quentin Colombet [Sat, 8 Jun 2013 00:07:54 +0000 (00:07 +0000)]
Reapply r183552. This time, use a standard type for the option to avoid template
instantiation issue with non-standard type.

Add a backend option to warn on a given stack size limit.
Option: -mllvm -warn-stack-size=<limit>
Output (if limit is exceeded):
warning: Stack size limit exceeded (<actual size>) in <functionName>.

The longer term plan is to hook that to a clang warning.
PR:4072
<rdar://problem/13987214>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183595 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Use a refined heuristic to choose when switching clause
Vincent Lejeune [Fri, 7 Jun 2013 23:30:34 +0000 (23:30 +0000)]
R600: Use a refined heuristic to choose when switching clause

This is using a hint from AMD APP OpenCL Programming Guide with
empirically tweaked parameters.
I used Unigine Heaven 3.0 to determine best parameters on my system
(i7 2600/Radeon 6950/Kernel 3.9.4) the benchmark :
it went from 38.8 average fps to 39.6, which is ~3% gain.
(Lightmark 2008.2 gain is much more marginal: from 537 to 539)

There is no lit test provided as the parameter were determined
empirically and it it would be nearly impossiblet to find a test
program that check for optimal behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183593 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Anti dep better handled in tex clause
Vincent Lejeune [Fri, 7 Jun 2013 23:30:26 +0000 (23:30 +0000)]
R600: Anti dep better handled in tex clause

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183592 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemember the anyext patterns.
Jakob Stoklund Olesen [Fri, 7 Jun 2013 22:59:29 +0000 (22:59 +0000)]
Remember the anyext patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183589 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd missing zextloadi1 to i64 patterns. PR16721.
Jakob Stoklund Olesen [Fri, 7 Jun 2013 22:55:05 +0000 (22:55 +0000)]
Add missing zextloadi1 to i64 patterns. PR16721.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183587 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago Fix an assertion in MemCpyOpt pass.
Shuxin Yang [Fri, 7 Jun 2013 22:45:21 +0000 (22:45 +0000)]
  Fix an assertion in MemCpyOpt pass.

  The MemCpyOpt pass is capable of optimizing:
      callee(&S); copy N bytes from S to D.
    into:
      callee(&D);
subject to some legality constraints.

  Assertion is triggered when the compiler tries to evalute "sizeof(typeof(D))",
while D is an opaque-typed, 'sret' formal argument of function being compiled.
i.e. the signature of the func being compiled is something like this:
  T caller(...,%opaque* noalias nocapture sret %D, ...)

  The fix is that when come across such situation, instead of calling some
utility functions to get the size of D's type (which will crash), we simply
assume D has at least N bytes as implified by the copy-instruction.

rdar://14073661

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183584 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDisallow i64 div/rem in PPC32 counter loops
Hal Finkel [Fri, 7 Jun 2013 22:16:19 +0000 (22:16 +0000)]
Disallow i64 div/rem in PPC32 counter loops

On PPC32, [su]div,rem on i64 types are transformed into runtime library
function calls. As a result, they are not allowed in counter-based loops (the
counter-loops verification pass caught this error; this change fixes PR16169).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183581 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert commits related to stack warning.
Quentin Colombet [Fri, 7 Jun 2013 22:14:50 +0000 (22:14 +0000)]
Revert commits related to stack warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183579 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoExplicit triple in warn stack size test cases to not depend on OS.
Quentin Colombet [Fri, 7 Jun 2013 21:09:42 +0000 (21:09 +0000)]
Explicit triple in warn stack size test cases to not depend on OS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183574 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 21:04:35 +0000 (21:04 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183572 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 21:00:34 +0000 (21:00 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183571 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused c'tor.
Bill Wendling [Fri, 7 Jun 2013 20:59:31 +0000 (20:59 +0000)]
Remove unused c'tor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183570 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Fix calculation of stack offset in AMDGPUFrameLowering
Tom Stellard [Fri, 7 Jun 2013 20:52:05 +0000 (20:52 +0000)]
R600: Fix calculation of stack offset in AMDGPUFrameLowering

We weren't computing structure size correctly and we were relying on
the original alloca instruction to compute the offset, which isn't
always reliable.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183568 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 20:42:15 +0000 (20:42 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183567 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Rework subtarget info and remove AMDILDevice classes
Tom Stellard [Fri, 7 Jun 2013 20:37:48 +0000 (20:37 +0000)]
R600: Rework subtarget info and remove AMDILDevice classes

This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183566 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 20:35:25 +0000 (20:35 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183565 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[docs] Add link to Microsoft PE/COFF Spec.
Rui Ueyama [Fri, 7 Jun 2013 20:30:27 +0000 (20:30 +0000)]
[docs] Add link to Microsoft PE/COFF Spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183562 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't cache the instruction and register info from the TargetMachine, because
Bill Wendling [Fri, 7 Jun 2013 20:28:55 +0000 (20:28 +0000)]
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183561 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Fix the fetch limits for R600 generation GPUs
Tom Stellard [Fri, 7 Jun 2013 20:28:55 +0000 (20:28 +0000)]
R600: Fix the fetch limits for R600 generation GPUs

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
https://bugs.freedesktop.org/show_bug.cgi?id=64257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183560 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Move Subtarget feature definitions into AMDGPU.td
Tom Stellard [Fri, 7 Jun 2013 20:28:49 +0000 (20:28 +0000)]
R600: Move Subtarget feature definitions into AMDGPU.td

This is the convention used by the other targets.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183559 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Remove unnecessary include
Tom Stellard [Fri, 7 Jun 2013 20:28:43 +0000 (20:28 +0000)]
R600: Remove unnecessary include

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183558 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd more explicit link targets to headers in LangRef.rst
Eli Bendersky [Fri, 7 Jun 2013 20:24:43 +0000 (20:24 +0000)]
Add more explicit link targets to headers in LangRef.rst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183555 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a backend option to warn on a given stack size limit.
Quentin Colombet [Fri, 7 Jun 2013 20:18:12 +0000 (20:18 +0000)]
Add a backend option to warn on a given stack size limit.
Option: -mllvm -warn-stack-size=<limit>
Output (if limit is exceeded):
warning: Stack size limit exceeded (<actual size>) in <functionName>.

The longer term plan is to hook that to a clang warning.
PR:4072
<rdar://problem/13987214>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183552 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM FastISel integer sext/zext improvements
JF Bastien [Fri, 7 Jun 2013 20:10:37 +0000 (20:10 +0000)]
ARM FastISel integer sext/zext improvements

My recent ARM FastISel patch exposed this bug:
  http://llvm.org/bugs/show_bug.cgi?id=16178
The root cause is that it can't select integer sext/zext pre-ARMv6 and
asserts out.

The current integer sext/zext code doesn't handle other cases gracefully
either, so this patch makes it handle all sext and zext from i1/i8/i16
to i8/i16/i32, with and without ARMv6, both in Thumb and ARM mode. This
should fix the bug as well as make FastISel faster because it bails to
SelectionDAG less often. See fastisel-ext.patch for this.

fastisel-ext-tests.patch changes current tests to always use reg-imm AND
for 8-bit zext instead of UXTB. This simplifies code since it is
supported on ARMv4t and later, and at least on A15 both should perform
exactly the same (both have exec 1 uop 1, type I).

2013-05-31-char-shift-crash.ll is a bitcode version of the above bug
16178 repro.

fast-isel-ext.ll tests all sext/zext combinations that ARM FastISel
should now handle.

Note that my ARM FastISel enabling patch was reverted due to a separate
failure when dealing with MCJIT, I'll fix this second failure and then
turn FastISel on again for non-iOS ARM targets.

I've tested "make check-all" on my x86 box, and "lnt test-suite" on A15
hardware.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183551 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Don't compare iterators of different maps.
Benjamin Kramer [Fri, 7 Jun 2013 19:59:34 +0000 (19:59 +0000)]
R600: Don't compare iterators of different maps.

Found be libstdc's debug mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183549 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd explicit link targets to some headers in LangRef.rst
Eli Bendersky [Fri, 7 Jun 2013 19:40:08 +0000 (19:40 +0000)]
Add explicit link targets to some headers in LangRef.rst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183548 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoNo functionality change.
Manman Ren [Fri, 7 Jun 2013 18:53:29 +0000 (18:53 +0000)]
No functionality change.

Constify a few member functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183546 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach AsmPrinter how to print odd constants.
Quentin Colombet [Fri, 7 Jun 2013 18:36:03 +0000 (18:36 +0000)]
Teach AsmPrinter how to print odd constants.

Fix an assertion when the compiler encounters big constants whose bit width is
not a multiple of 64-bits.
Although clang would never generate something like this, the backend should be
able to handle any legal IR.

<rdar://problem/13363576>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183544 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDIBuilder: No functionality change.
Manman Ren [Fri, 7 Jun 2013 18:35:53 +0000 (18:35 +0000)]
DIBuilder: No functionality change.

Use the correct DIType when creating types in DIBuilder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183543 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoVincent says the element is at most once in the vector, so we don't need a full std...
Benjamin Kramer [Fri, 7 Jun 2013 18:18:12 +0000 (18:18 +0000)]
Vincent says the element is at most once in the vector, so we don't need a full std::remove.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183541 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse isxdigit.
Rafael Espindola [Fri, 7 Jun 2013 18:05:03 +0000 (18:05 +0000)]
Use isxdigit.

Thanks to Benjamin Kramer for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183540 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake operator== non-member for greater symmetry.
Rafael Espindola [Fri, 7 Jun 2013 18:00:04 +0000 (18:00 +0000)]
Make operator== non-member for greater symmetry.

Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183539 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a typo in asm string of BP* family of instructions. With this fix
Roman Divacky [Fri, 7 Jun 2013 17:46:57 +0000 (17:46 +0000)]
Fix a typo in asm string of BP* family of instructions. With this fix
I am able to compile/assemble/link/run /bin/echo from FreeBSD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183537 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Object/COFF] BaseOfData field should be absent in PE32+.
Rui Ueyama [Fri, 7 Jun 2013 16:58:30 +0000 (16:58 +0000)]
[Object/COFF] BaseOfData field should be absent in PE32+.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183534 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSupport OpenBSD's native frame protection conventions.
Rafael Espindola [Fri, 7 Jun 2013 16:35:57 +0000 (16:35 +0000)]
Support OpenBSD's native frame protection conventions.

OpenBSD's stack smashing protection differs slightly from other
platforms:

  1. The smash handler function is "__stack_smash_handler(const char
     *funcname)" instead of "__stack_chk_fail(void)".

  2. There's a hidden "long __guard_local" object that gets linked
     into each executable and DSO.

Patch by Matthew Dempsky.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183533 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Fix a potential iterator invalidation issue.
Benjamin Kramer [Fri, 7 Jun 2013 16:13:49 +0000 (16:13 +0000)]
R600: Fix a potential iterator invalidation issue.

As a bonus this reduces the loop from O(n^2) to O(n).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183532 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Remove an extra break in R600OptimizeVectorRegisters.cpp
Vincent Lejeune [Fri, 7 Jun 2013 15:44:53 +0000 (15:44 +0000)]
R600: Remove an extra break in R600OptimizeVectorRegisters.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183528 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[llvm-symbolizer] rewrite r183213 in a more clear way
Alexey Samsonov [Fri, 7 Jun 2013 15:25:27 +0000 (15:25 +0000)]
[llvm-symbolizer] rewrite r183213 in a more clear way

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183526 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoBitVector: Do the right thing in all() when Size is a multiple of BITWORD_SIZE.
Benjamin Kramer [Fri, 7 Jun 2013 15:14:31 +0000 (15:14 +0000)]
BitVector: Do the right thing in all() when Size is a multiple of BITWORD_SIZE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183525 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoOptimize BitVector::all().
Benjamin Kramer [Fri, 7 Jun 2013 14:14:38 +0000 (14:14 +0000)]
Optimize BitVector::all().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183521 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFold variable that's only used in assert into the assert.
Benjamin Kramer [Fri, 7 Jun 2013 11:23:35 +0000 (11:23 +0000)]
Fold variable that's only used in assert into the assert.

Avoids unused variable warnings in Release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183512 91177308-0d34-0410-b5e6-96231b3b80d8