Craig Topper [Fri, 17 Jan 2014 07:44:10 +0000 (07:44 +0000)]
Teach x86 asm parser to handle 'opaque ptr' in Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199477
91177308-0d34-0410-b5e6-
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Craig Topper [Fri, 17 Jan 2014 07:37:39 +0000 (07:37 +0000)]
Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199476
91177308-0d34-0410-b5e6-
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Craig Topper [Fri, 17 Jan 2014 07:25:39 +0000 (07:25 +0000)]
Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix instead of 'q'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199474
91177308-0d34-0410-b5e6-
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Craig Topper [Fri, 17 Jan 2014 07:11:45 +0000 (07:11 +0000)]
VEX_PREFIX_66 doesn't need to set the hasOpSize flag since VEX instructions don't use the size fields it controls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199470
91177308-0d34-0410-b5e6-
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Craig Topper [Fri, 17 Jan 2014 06:42:38 +0000 (06:42 +0000)]
Replace duplicated code with a existing helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199468
91177308-0d34-0410-b5e6-
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Hao Liu [Fri, 17 Jan 2014 06:23:30 +0000 (06:23 +0000)]
[AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16.
Also add copy support for FPR16.
Also add a missing test case file belongs to commit r197361.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199463
91177308-0d34-0410-b5e6-
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Kevin Qin [Fri, 17 Jan 2014 05:52:35 +0000 (05:52 +0000)]
[AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199462
91177308-0d34-0410-b5e6-
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Hao Liu [Fri, 17 Jan 2014 05:44:46 +0000 (05:44 +0000)]
[AArch64]Fix the problem can't select concat_vectors of two v1i32 types.
Also fix the problem can't select scalar_to_vector from f32 to v2f32/v4f32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199461
91177308-0d34-0410-b5e6-
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Bob Wilson [Fri, 17 Jan 2014 00:40:39 +0000 (00:40 +0000)]
Fix bad variable syntax in r199413
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199447
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 16 Jan 2014 23:37:23 +0000 (23:37 +0000)]
Use LLVM_EXPLICIT instead of a function pointer as bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199437
91177308-0d34-0410-b5e6-
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Reid Kleckner [Thu, 16 Jan 2014 22:59:24 +0000 (22:59 +0000)]
Change inalloca rules to make it only apply to the last parameter
This makes things a lot easier, because we can now talk about the
"argument allocation", which allocates all the memory for the call in
one shot.
The only functional change is to the verifier for a feature that hasn't
shipped yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199434
91177308-0d34-0410-b5e6-
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Quentin Colombet [Thu, 16 Jan 2014 21:44:34 +0000 (21:44 +0000)]
[opt][PassInfo] Allow opt to run passes that need target machine.
When registering a pass, a pass can now specify a second construct that takes as
argument a pointer to TargetMachine.
The PassInfo class has been updated to reflect that possibility.
If such a constructor exists opt will use it instead of the default constructor
when instantiating the pass.
Since such IR passes are supposed to be rare, no specific support has been
added to this commit to allow an easy registration of such a pass.
In other words, for such pass, the initialization function has to be
hand-written (see CodeGenPrepare for instance).
Now, codegenprepare can be tested using opt:
opt -codegenprepare -mtriple=mytriple input.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199430
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Thu, 16 Jan 2014 21:37:17 +0000 (21:37 +0000)]
LTO: document LTO_API_VERSION for each API
Adding a doxygen comment for each bit of API to indicate at which
LTO_API_VERSION each was available, manually gleaned from successive
git-blames. A few notes:
- LTO_API_VERSION was set to 3 at its introduction.
- I've indicated all the API introduced before LTO_API_VERSION was
around as available "prior to LTO_API_VERSION=3".
- A number of API changes neglected to bump LTO_API_VERSION. These I've
indicated as available at the *next* bump of LTO_API_VERSION.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199429
91177308-0d34-0410-b5e6-
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Owen Anderson [Thu, 16 Jan 2014 21:26:02 +0000 (21:26 +0000)]
Fix two cases where we could lose fast math flags when optimizing FADD expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199427
91177308-0d34-0410-b5e6-
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Owen Anderson [Thu, 16 Jan 2014 21:07:52 +0000 (21:07 +0000)]
Fix an instance where we would drop fast math flags when performing an fdiv to reciprocal multiply transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199425
91177308-0d34-0410-b5e6-
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Owen Anderson [Thu, 16 Jan 2014 20:59:41 +0000 (20:59 +0000)]
Fix a bug in InstCombine where we failed to preserve fast math flags when optimizing an FMUL expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199424
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 16 Jan 2014 20:57:55 +0000 (20:57 +0000)]
Fix style issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199423
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 16 Jan 2014 20:50:34 +0000 (20:50 +0000)]
llvm-objdump/COFF: Print DLL name in the export table header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199422
91177308-0d34-0410-b5e6-
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Owen Anderson [Thu, 16 Jan 2014 20:36:42 +0000 (20:36 +0000)]
Teach InstCombine that (fmul X, -1.0) can be simplified to (fneg X), which LLVM expresses as (fsub -0.0, X).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199420
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 16 Jan 2014 20:30:36 +0000 (20:30 +0000)]
Use static instead of anonymous namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199419
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 16 Jan 2014 20:22:55 +0000 (20:22 +0000)]
Reduce nesting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199418
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 16 Jan 2014 20:11:48 +0000 (20:11 +0000)]
Use the current local variable naming style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199417
91177308-0d34-0410-b5e6-
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Bob Wilson [Thu, 16 Jan 2014 19:35:01 +0000 (19:35 +0000)]
Pass the --enable-libcpp configure option for cross builds, too.
<rdar://problem/
15831288>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199413
91177308-0d34-0410-b5e6-
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Kevin Enderby [Thu, 16 Jan 2014 18:43:56 +0000 (18:43 +0000)]
Tweak the MCExternalSymbolizer to print references to C string literals
with raw_ostream's write_escaped() method.
For example darwin's otool(1) program that uses the llvm
disassembler now produces disassembly like this:
leaq 0x7b(%rip), %rdi ## literal pool for: "%f\ntoto\n"
and not print the new lines which messes up the output.
rdar://
15145300
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199407
91177308-0d34-0410-b5e6-
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Ed Maste [Thu, 16 Jan 2014 17:25:12 +0000 (17:25 +0000)]
llvm-symbolizer: make mangled name heuristic apply to all symbols
PR: http://llvm.org/pr18431
Review: http://llvm-reviews.chandlerc.com/D2552
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199404
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 16 Jan 2014 17:23:08 +0000 (17:23 +0000)]
[mips][sched] Removed IIXfer. No instructions use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199403
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 16 Jan 2014 17:13:57 +0000 (17:13 +0000)]
[mips][sched] Put AND, OR, XOR, MOVT_I, and MOVF_I in the same itinerary class as their non-microMIPS counterparts.
No functional change since both classes have the same InstrItinData definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199402
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 16 Jan 2014 16:28:37 +0000 (16:28 +0000)]
Add an emitRawComment function and use it to simplify some uses of EmitRawText.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199397
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 16 Jan 2014 16:19:38 +0000 (16:19 +0000)]
[mips][sched] Split IIseb into II_SEB and II_SEH
No functional change since there are no InstrItinData's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199396
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 16 Jan 2014 15:57:05 +0000 (15:57 +0000)]
[mips][sched] Split IILogic into II_AND, II_OR, II_XOR, II_ANDI, II_ORI, II_XORI
This is necessary because the classes are shared between all implementations.
No functional change since the InstrItinData's have been duplicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199394
91177308-0d34-0410-b5e6-
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Amara Emerson [Thu, 16 Jan 2014 15:11:54 +0000 (15:11 +0000)]
Move the xscale build attribute test to the proper place and remove the old one.
The encoding of build attributes is already tested in CodeGen/ARM/build-attributes-encoding.s
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199393
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 16 Jan 2014 14:27:20 +0000 (14:27 +0000)]
[mips][sched] Split IIArith in preparation for the first scheduler targeting a specific MIPS CPU.
IIArith -> II_ADD, II_ADDU, II_AND, II_CL[ZO], II_DADDIU, II_DADDU,
II_DROTR, II_DROTR32, II_DROTRV, II_DSLL, II_DSLL32, II_DSLLV,
II_DSR[AL], II_DSR[AL]32, II_DSR[AL]V, II_DSUBU, II_LUI, II_MOV[ZFNT],
II_NOR, II_OR, II_RDHWR, II_ROTR, II_ROTRV, II_SLL, II_SLLV, II_SR[AL],
II_SR[AL]V, II_SUBU, II_XOR
No functional change since the InstrItinData's have been duplicated.
This is necessary because the classes are shared between all schedulers.
Once this patch series is committed there will be an InstrItinClass for
each mnemonic with minimal grouping. This does increase the size of the
itinerary tables for each MIPS scheduler but we have a few options for dealing
with that later. These options include reducing the number of classes once
we see the best way to simplify them, or by extending tablegen to be able
to compress the table by eliminating duplicates entries, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199391
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 16 Jan 2014 14:02:48 +0000 (14:02 +0000)]
[mips] Correct itin class for MULT_MM and MULTu_MM to IIImult.
This matches the itin class used by the non-microMIPS equivalents of these
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199389
91177308-0d34-0410-b5e6-
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Daniel Sanders [Thu, 16 Jan 2014 13:45:53 +0000 (13:45 +0000)]
[mips] IIImult should have an InstrItinData in the generic scheduler. Used the same one as for IIImul.
Affects:
DMULT, DMULTu, MADD, MADD_MM, MADDU, MADDU_MM, MSUB, MSUB_MM, MSUBU,
MSUBU_MM, MULT, MULTu
Does not affect MULT_MM, MULTu_MM since they are currently miscategorised
as IIImul.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199381
91177308-0d34-0410-b5e6-
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Tim Northover [Thu, 16 Jan 2014 12:29:55 +0000 (12:29 +0000)]
ReMat: fix overly cavalier attitude to sub-register indices
There are two attempted optimisations in reMaterializeTrivialDef, trying to
avoid promoting the size of a register too much when rematerializing.
Unfortunately, both appear to be flawed. First, we see if the original register
would have worked, but this is inadequate. Consider:
v1 = SOMETHING (v1 is QQ)
v2:Q0 = COPY v1:Q1 (v1, v2 are QQ)
...
uses of v2
In this case even though v2 *could* be used directly as the output of
SOMETHING, this would set the wrong bits of the QQ register involved. The
correct rematerialization must be:
v2:Q0_Q1 = SOMETHING (v2 promoted to QQQ)
...
uses of v2:Q1_Q2
For the second optimisation, if the correct remat is "v2:idx = SOMETHING" then
we can't necessarily expect v2 itself to be valid for SOMETHING, but we do try
to hunt for a class between v1 and v2 that works. Unfortunately, this is also
wrong:
v1 = SOMETHING (v1 is QQ)
v2:Q0_Q1 = COPY v1 (v1 is QQ, v2 is QQQ)
...
uses of v2 as a QQQ
The canonical rematerialization here is "v2:Q0_Q1 = SOMETHING". However current
logic would decide that v2 could be a QQ (no interest is taken in later uses).
This patch, therefore, always accepts the widened register class without trying
to be clever. Generally there is no penalty to this (e.g. in the common GR32 <
GR64 case, expanding the width doesn't matter because it's not like you were
going to do anything else with the high bits of a GR32 register). It can
increase register pressure in cases like the ARM VFP regs though (multiple
non-overlapping but equivalent subregisters). This situation can be
spotted by the fact that both source and destination in the
not-quite-coalesced pair have a sub-register index and
rematerialisation is skipped in that situation.
Unfortunately, no in-tree targets actually expose this as far as I can tell
(there are so few isAsCheapAsAMove instructions for it to trigger on) so I've
been unable to produce a test. It was exposed in our ARM64 SPEC tests though,
and I will be adding a test there that we should be able to contribute
soon(TM).
rdar://problem/
15775279
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199376
91177308-0d34-0410-b5e6-
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Evgeniy Stepanov [Thu, 16 Jan 2014 10:19:12 +0000 (10:19 +0000)]
[asan] Remove -fsanitize-address-zero-base-shadow command line
flag from clang, and disable zero-base shadow support on all platforms
where it is not the default behavior.
- It is completely unused, as far as we know.
- It is ABI-incompatible with non-zero-base shadow, which means all
objects in a process must be built with the same setting. Failing to
do so results in a segmentation fault at runtime.
- It introduces a backward dependency of compiler-rt on user code,
which is uncommon and complicates testing.
This is the LLVM part of a larger change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199371
91177308-0d34-0410-b5e6-
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Jiangning Liu [Thu, 16 Jan 2014 09:16:13 +0000 (09:16 +0000)]
For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199369
91177308-0d34-0410-b5e6-
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Elena Demikhovsky [Thu, 16 Jan 2014 08:45:54 +0000 (08:45 +0000)]
AVX-512: fixed a compare pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199366
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 16 Jan 2014 07:57:45 +0000 (07:57 +0000)]
Copy segment register when optimizing to MOV8ao8/MOV16ao16/MOV32ao32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199365
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 16 Jan 2014 07:36:58 +0000 (07:36 +0000)]
Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199364
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 16 Jan 2014 07:36:00 +0000 (07:36 +0000)]
Use a slightly smaller hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199363
91177308-0d34-0410-b5e6-
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Quentin Colombet [Thu, 16 Jan 2014 07:29:07 +0000 (07:29 +0000)]
Revert r199361: Now, the sanitizer got the change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199362
91177308-0d34-0410-b5e6-
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Quentin Colombet [Thu, 16 Jan 2014 07:14:01 +0000 (07:14 +0000)]
[LTO] Modify lto.exports to force the sanitizer to rebuilt LTO.exports
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199361
91177308-0d34-0410-b5e6-
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Bill Wendling [Thu, 16 Jan 2014 07:08:22 +0000 (07:08 +0000)]
Fix typo: : not ;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199359
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 16 Jan 2014 07:05:49 +0000 (07:05 +0000)]
llmv-objdump/COFF: Print export table contents.
This patch adds the capability to dump export table contents. An example
output is this:
Export Table:
Ordinal RVA Name
5 0x2008 exportfn1
6 0x2010 exportfn2
By adding this feature to llvm-objdump, we will be able to use it to check
export table contents in LLD's tests. Currently we are doing binary
comparison in the tests, which is fragile and not readable to humans.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199358
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 16 Jan 2014 07:04:11 +0000 (07:04 +0000)]
CommentColumn is always 40. Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199357
91177308-0d34-0410-b5e6-
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Quentin Colombet [Thu, 16 Jan 2014 06:43:55 +0000 (06:43 +0000)]
[cmake] Attempt to fix sanitizer buildbot.
The generation of the native_export_file end up in
several different makefiles. All those makefiles
write the same file, but can be executed concurrently...
and bad things happen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199356
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 16 Jan 2014 06:31:20 +0000 (06:31 +0000)]
Convert test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199355
91177308-0d34-0410-b5e6-
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Bill Wendling [Thu, 16 Jan 2014 06:29:36 +0000 (06:29 +0000)]
Reapply r194218 with fix:
Move copying of global initializers below the cloning of functions.
The BlockAddress doesn't have access to the correct basic blocks until the
functions have been cloned. This causes the BlockAddress to point to the old
values. Just wait until the functions have been cloned before copying the
initializers.
PR13163
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199354
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 16 Jan 2014 06:14:45 +0000 (06:14 +0000)]
Remove use of OpSize for populating VEX_PP field. A prefix encoding is now used instead. Simplify some other code. No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199353
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 16 Jan 2014 05:09:32 +0000 (05:09 +0000)]
Attempt to fix the MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199352
91177308-0d34-0410-b5e6-
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Arnold Schwaighofer [Thu, 16 Jan 2014 04:53:18 +0000 (04:53 +0000)]
BasicAA: We need to check both access sizes when comparing a gep and an
underlying object of unknown size.
Fixes PR18460.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199351
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 16 Jan 2014 04:50:58 +0000 (04:50 +0000)]
Prevent calls to __jit_debug_register_code from being optimized out.
Patch by Andrew MacPherson. I just tweaked the comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199350
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 16 Jan 2014 03:13:19 +0000 (03:13 +0000)]
Don't use DataRefImpl to implement ImportDirectoryEntryRef.
DataRefImpl (a union of two integers and a pointer) is not the ideal data type
to represent a reference to an import directory entity. We should just use the
pointer to the import table and an offset instead to simplify. No functionality
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199349
91177308-0d34-0410-b5e6-
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Manman Ren [Thu, 16 Jan 2014 01:51:12 +0000 (01:51 +0000)]
Report a warning when dropping outdated debug info metadata.
Use DiagnosticInfo to emit the warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199346
91177308-0d34-0410-b5e6-
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Reed Kotler [Thu, 16 Jan 2014 00:47:46 +0000 (00:47 +0000)]
Adjust offsets for max load instruction offsets. This is more pessimistic
than it needs to be by 1 bit but I need to finish some other things so
that all the boundary cases will work in that situation. constpool.c
in test-suite will fail to assemble under our new internal test-suite sync
without this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199343
91177308-0d34-0410-b5e6-
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Rui Ueyama [Wed, 15 Jan 2014 23:46:18 +0000 (23:46 +0000)]
llvm-objdump: Don't print "Import table:" header if there's no import table.
If a binary does not depend on any DLL, it does not contain import table at
all. Printing the section title without contents looks wrong, so we shouldn't
print it in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199340
91177308-0d34-0410-b5e6-
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David Peixotto [Wed, 15 Jan 2014 22:40:02 +0000 (22:40 +0000)]
Fix parsing of .symver directive on ARM
ARM assembly syntax uses @ for a comment, execpt for the second
parameter of the .symver directive which requires @ as part of the
symbol name. This commit fixes the parsing of this directive by
adding a special case for ARM for this one argumnet.
To make the change we had to move the AllowAtInIdentifier variable
to the MCAsmLexer interface (from AsmLexer) and expose a setter for
the value. The ELFAsmParser then toggles this value when parsing
the second argument to the .symver directive for a target that
uses @ as a comment symbol
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199339
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Quentin Colombet [Wed, 15 Jan 2014 22:04:35 +0000 (22:04 +0000)]
[LTO] Add a hook to map LLVM diagnostics into the clients of LTO.
Add a hook in the C API of LTO so that clients of the code generator can set
their own handler for the LLVM diagnostics.
The handler is defined like this:
typedef void (*lto_diagnostic_handler_t)(lto_codegen_diagnostic_severity_t
severity, const char *diag, void *ctxt)
- severity says how bad this is.
- diag is a string that contains the diagnostic message.
- ctxt is the registered context for this handler.
This hook is more general than the lto_get_error_message, since this function
keeps only the latest message and can only be queried when something went wrong
(no warning for instance).
<rdar://problem/
15517596>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199338
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Bob Wilson [Wed, 15 Jan 2014 21:44:14 +0000 (21:44 +0000)]
Remove support for armv7f slice. <rdar://problem/
12478440>
This was never used for anything so we should just get rid of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199337
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Chandler Carruth [Wed, 15 Jan 2014 21:21:48 +0000 (21:21 +0000)]
Use a heavier hammer when --enable-libcpp is passed to bypass the tests
which catch buggy versions of libstdc++. While libc++ would pass them,
we don't actually update the state in the configure script to use libc++
when we pass --enable-libcpp, the logic for that is in the
Makefiles. So just completely skip the library test when that configure
flag is passed.
Hopefully this will be enough to fix the darwin bots at last, and thanks
to Duncan Smith for getting things set up so I can watch the bots myself
on lab.llvm.org and see any failures!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199334
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Andrea Di Biagio [Wed, 15 Jan 2014 20:16:14 +0000 (20:16 +0000)]
Update test/CodeGen/X86/vbinop-simplify-bug.ll.
Redirect the output of llc to /dev/null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199329
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Andrea Di Biagio [Wed, 15 Jan 2014 19:51:32 +0000 (19:51 +0000)]
[DAGCombiner] Fix a wrong check in method SimplifyVBinOp.
This fixes a regression intruced by r199135.
Revision 199135 tried to simplify part of the logic in method
DAGCombiner::SimplifyVBinOp introducing calls to method BuildVectorSDNode::isConstant().
However, that revision wrongly changed the check performed by method
SimplifyVBinOp to identify dag nodes that can be folded.
Before revision 199135, that method only tried to simplify vector binary operations
if both operands were build_vector of Constant/ConstantFP/Undef only.
After revision 199135, method SimplifyVBinop tried to
simplify also vector binary operations with only one constant operand.
This fixes the problem restoring the old behavior of SimplifyVBinOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199328
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Rafael Espindola [Wed, 15 Jan 2014 19:37:43 +0000 (19:37 +0000)]
Return an ErrorOr<Binary *> from createBinary.
I did write a version returning ErrorOr<OwningPtr<Binary> >, but it is too
cumbersome to use without std::move. I will keep the patch locally and submit
when we switch to c++11.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199326
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Chandler Carruth [Wed, 15 Jan 2014 19:19:13 +0000 (19:19 +0000)]
Sink the autoconf check for sufficiently modern host toolchain below the
enable flag that selects the C++ standard library to use with the host
toolchain. Otherwise we end up testing the wrong config.
I'm not really happy about this placement, but its pragmatic and should
unblock the Apple builders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199325
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Kevin Enderby [Wed, 15 Jan 2014 19:05:24 +0000 (19:05 +0000)]
Update the X86 assembler for .intel_syntax to accept
the | and & bitwise operators.
rdar://
15570412
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199323
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Rafael Espindola [Wed, 15 Jan 2014 16:56:57 +0000 (16:56 +0000)]
Make sure we create a new archive by deleting any stale ones first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199319
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Zoran Jovanovic [Wed, 15 Jan 2014 13:17:33 +0000 (13:17 +0000)]
LL and SC decoder method fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199316
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Zoran Jovanovic [Wed, 15 Jan 2014 13:01:18 +0000 (13:01 +0000)]
Added support for LWU microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199315
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Chandler Carruth [Wed, 15 Jan 2014 10:34:30 +0000 (10:34 +0000)]
Fix a bug in r199313 where I failed to restore CXXFLAGS. Doh! Not
*quite* ready to just slam C++11 on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199314
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Chandler Carruth [Wed, 15 Jan 2014 10:31:15 +0000 (10:31 +0000)]
Add a check to configure that the libstdc++ selected by Clang isn't
libstdc++v4.6. This is quite hard to test directly, so we test for it by
checking a known missing feature in that version that was added in v4.7.
This should prevent users from upgrading Clang but not GCC and hosting
with a too-old GCC's libstdc++ and getting strange and hard to debug
errors when we switch to C++11 by default.
Also, switch several of the macros I introduced to use AC_LANG_SOURCE
rather than AC_LANG_PROGRAM as we don't need configure's help writing
our main function (and we don't need such a function at all for most of
the tests).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199313
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David Majnemer [Wed, 15 Jan 2014 09:16:42 +0000 (09:16 +0000)]
WinCOFF: Transform IR expressions featuring __ImageBase into image relative relocations
MSVC on x64 requires that we create image relative symbol
references to refer to RTTI data. Seeing as how there is no way to
explicitly make reference to a given relocation type in LLVM IR, pattern
match expressions of the form &foo - &__ImageBase.
Differential Revision: http://llvm-reviews.chandlerc.com/D2523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199312
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Renato Golin [Wed, 15 Jan 2014 09:09:46 +0000 (09:09 +0000)]
Revert 199262 - MCJIT remote still failing on ARM
Disabling remote MCJIT tests on ARM again, as they're still failing when
self-hosting on ARM, despite all my tests. At least now we have more info
on what message it's breaking and what is going on. Investigating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199310
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Renato Golin [Wed, 15 Jan 2014 09:09:39 +0000 (09:09 +0000)]
Re-disable MCJIT remote tests on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199309
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NAKAMURA Takumi [Wed, 15 Jan 2014 08:21:38 +0000 (08:21 +0000)]
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199305
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Kostya Serebryany [Wed, 15 Jan 2014 07:59:37 +0000 (07:59 +0000)]
replace LeakSanitizerIsTurnedOffForTheCurrentProcess with __lsan_is_turned_off, but this time hide it under __has_feature(address_sanitizer); also include <sanitizer/lsan_interface.h>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199303
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Elena Demikhovsky [Wed, 15 Jan 2014 07:18:11 +0000 (07:18 +0000)]
Fixed identation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199301
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Andrew Trick [Wed, 15 Jan 2014 06:42:11 +0000 (06:42 +0000)]
Fix PR18449: SCEV needs more precise max BECount for multi-exit loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199299
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Craig Topper [Wed, 15 Jan 2014 05:20:59 +0000 (05:20 +0000)]
Add OpSize16 to the two byte forms of INC/DEC that we only use in 64-bit mode and a 64-bit only LEA. Even though we'll not be in 16-bit mode when we use them it makes their tables consistent with their 32-bit counterparts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199297
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Jiangning Liu [Wed, 15 Jan 2014 05:08:01 +0000 (05:08 +0000)]
For AArch64, lowering sext_inreg and generate optimized code by using SXTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199296
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Craig Topper [Wed, 15 Jan 2014 05:02:02 +0000 (05:02 +0000)]
Simplify x86 disassembler table handling of when to use TYPE_Rv/TYPE_R16/TYPE_R32 now that HasOpSizePrefix only means 16-bit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199295
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Hans Wennborg [Wed, 15 Jan 2014 05:00:27 +0000 (05:00 +0000)]
Switch-to-lookup tables: set threshold to 3 cases
There has been an old FIXME to find the right cut-off for when it's worth
analyzing and potentially transforming a switch to a lookup table.
The switches always have two or more cases. I could not measure any speed-up
by transforming a switch with two cases. A switch with three cases gets a nice
speed-up, and I couldn't measure any compile-time regression, so I think this
is the right threshold.
In a Clang self-host, this causes 480 new switches to be transformed,
and reduces the final binary size with 8 KB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199294
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Rafael Espindola [Wed, 15 Jan 2014 04:49:50 +0000 (04:49 +0000)]
Check the error code and save a call to sys::fs::exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199293
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Arnold Schwaighofer [Wed, 15 Jan 2014 03:35:46 +0000 (03:35 +0000)]
LoopVectorize: Only strip casts from integer types when replacing symbolic
strides
Fixes PR18480.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199291
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Rafael Espindola [Wed, 15 Jan 2014 03:27:26 +0000 (03:27 +0000)]
Fix uninitialized variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199288
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Rafael Espindola [Wed, 15 Jan 2014 03:07:12 +0000 (03:07 +0000)]
Only mark functions as micromips.
The GNU as behavior is a bit different and very strange. It will mark any
label that contains an instruction. We can implement that, but using the
type looks more natural since gas will not mark a function if a .word is
used to output the instructions!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199287
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Hans Wennborg [Wed, 15 Jan 2014 02:49:17 +0000 (02:49 +0000)]
LangRef.rst: fix LangRef data layout text about m specifier, take 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199286
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Hans Wennborg [Wed, 15 Jan 2014 02:30:37 +0000 (02:30 +0000)]
LangRef: attempt to fix line breaks
The line breaks around the "m:<mangling>" text in the Data Layout section
look weird. Let's see if this helps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199285
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Weiming Zhao [Wed, 15 Jan 2014 01:32:12 +0000 (01:32 +0000)]
PR 18466: Fix ARM Pseudo Expansion
When expanding neon pseudo stores, it may miss the implicit uses of sub
regs, which may cause post RA scheduler reorder instructions that
breakes anti dependency.
For example:
VST1d64QPseudo %R0<kill>, 16, %Q9_Q10, pred:14, pred:%noreg
will be expanded to
VST1d64Q %R0<kill>, 16, %D18, pred:14, pred:%noreg;
An instruction that defines %D20 may be scheduled before the store by
mistake.
This patches adds implicit uses for such case. For the example above, it
emits:
VST1d64Q %R0<kill>, 8, %D18, pred:14, pred:%noreg, %Q9_Q10<imp-use>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199282
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Rafael Espindola [Wed, 15 Jan 2014 01:08:23 +0000 (01:08 +0000)]
Make parseBitcodeFile return an ErrorOr<Module *>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199279
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Eric Christopher [Wed, 15 Jan 2014 00:04:29 +0000 (00:04 +0000)]
Make sure we emit a relocation to the debug_ranges section in the
presence of CU ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199276
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Rafael Espindola [Tue, 14 Jan 2014 23:51:27 +0000 (23:51 +0000)]
Return an error_code from materializeAllPermanently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199275
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Rafael Espindola [Tue, 14 Jan 2014 23:02:01 +0000 (23:02 +0000)]
Use error_code in Module::materializeAll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199269
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Renato Golin [Tue, 14 Jan 2014 22:59:11 +0000 (22:59 +0000)]
Fix Remote MCJIT on Windows
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199268
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Eric Christopher [Tue, 14 Jan 2014 22:57:52 +0000 (22:57 +0000)]
Add testcase for r199263 forgotten in commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199267
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Tim Northover [Tue, 14 Jan 2014 22:53:28 +0000 (22:53 +0000)]
ARM: correctly determine final tBX_LR in Thumb1 functions
The changes caused by folding an sp-adjustment into a "pop" previously
disrupted the forward search for the final real instruction in a
terminating block. This switches to a backward search (skipping debug
instrs).
This fixes PR18399.
Patch by Zhaoshi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199266
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Tim Northover [Tue, 14 Jan 2014 22:53:22 +0000 (22:53 +0000)]
AArch64: don't try to handle [SU]MUL_LOHI nodes
We should set them to expand for now since there are no patterns
dealing with them. Actually, there are no instructions either so I
doubt they'll ever be acceptable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199265
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Joey Gouly [Tue, 14 Jan 2014 22:52:24 +0000 (22:52 +0000)]
Add the lld root to llvm-lit, so llvm-lit can be used
to run lld tests individually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199264
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Eric Christopher [Tue, 14 Jan 2014 22:44:17 +0000 (22:44 +0000)]
Enable use of ranges for translation units in the presence of
-ffunction-sections and update comments and TODOs about other
places that we should enable this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199263
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Renato Golin [Tue, 14 Jan 2014 22:43:49 +0000 (22:43 +0000)]
Re-enable remote MCJIT tests on ARMv7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199262
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