Ville Syrjälä [Mon, 18 Aug 2014 11:42:46 +0000 (14:42 +0300)]
drm/i915: Clear TX FIFO reset master override bits on chv
Clear the override bits to make sure the hardware manages
the TX FIFO reset master on its own.
v2: Squash with the earlier attempt at forcing the override bits
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Mon, 18 Aug 2014 11:42:45 +0000 (14:42 +0300)]
drm/i915: Make sure hardware uses the correct swing margin/deemph bits on chv
The register can house two different swing marging/deemph settings at
once. However only one gets used based on some other bits. Make sure we
set those bits correctly to make the hardware use the settings we
provided.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Wed, 1 Oct 2014 14:32:37 +0000 (07:32 -0700)]
drm/i915: make sink_crc return -EIO on aux read/write failure
Even though it's unliky, we should check each aux transaction not just
the first one. Also
commit
ce31d9f4fc05964f6c0dd3a8661dc1a1d843a1e2
Author: Rodrigo Vivi <rodrigo.vivi@intel.com>
Date: Mon Sep 29 18:29:52 2014 -0400
drm/i915: preserve other DP_TEST_SINK bits.
added a new aux transaction before the one which was checked. Fix
this.
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Todd Previte <tprevite@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 2 Oct 2014 07:45:35 +0000 (09:45 +0200)]
drm/i915: Constify send buffer for intel_dp_aux_ch
Inspired by Ville constifying the send buffer for pach_aux.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Ville Syrjälä [Wed, 1 Oct 2014 13:56:56 +0000 (16:56 +0300)]
drm/i915: De-magic the PSR AUX message
Use pack_aux() to construct the PSR exit DPMS D0 AUX message,
and use the defines from dp_dp_helper.h to populate the message
contents.
v2: Use sizeof() for message size (Jani)
Use a generic loop to write EDP_PSR_AUX_DATA registers
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 23:02:04 +0000 (01:02 +0200)]
drm/i915: Reinstate error level message for non-simulated gpu hangs
This seems to have been accidentally lost in
commit
be62acb4cce1389a28296852737e3917d9cc5b25
Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Date: Fri Aug 30 16:19:28 2013 +0300
drm/i915: ban badly behaving contexts
Without this real gpu hangs only log output at info level, which gets
filtered away by piglit's testrunner.
v2: Tune down to notice level. Note that we need to add drm/i915 so
that at least the automatic igt dmesg filtering still picks it up.
v3: git add and lack of coffee don't mix well.
v4: Message is in between hw and sw reset, so switch verb to
continuous form.
v5: Use i915_stop_rings_allow_warn for consistency. For Chris' case of
injecting lots of hangs I guess we need to revamp this all anyway when
merging. For now this should plug the regression for piglit testing
mesa.
v6: Make it compile (Mika).
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reported-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Daniel Vetter [Tue, 30 Sep 2014 08:56:42 +0000 (10:56 +0200)]
drm/i915: Kerneldoc for intel_runtime_pm.c
I've decided not to document the functions exported to the audio
driver since really, they shouldn't exist ...
v2: Improvements from Imre's review plus a few more spelling fixes
I've spotted.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 08:56:41 +0000 (10:56 +0200)]
drm/i915: Call runtime_pm_disable directly
Allows us to mark it static and so forgoe the kerneldoc for it.
Note that intel_power_domains_fini is also called from failure paths
in the driver load sequence. But the call to runtime_pm_disable for
that is harmless since by default runtime pm is already disabled.
v2: Augment the commit message as discussed with Imre on irc.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 08:56:40 +0000 (10:56 +0200)]
drm/i915: Move intel_display_set_init_power to intel_runtime_pm.c
I've decided to not move intel_display_port_power_domain because
that's just a hack in our design ...
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 08:56:39 +0000 (10:56 +0200)]
drm/i915: Bikeshed rpm functions name a bit.
- fini goes with init, so call it intel_power_domains_fini. While
at it shovel some of the fini code that leaked out of it back in.
- give power_enabled functions the verb _is_ to make the meaning clearer.
Also use a __ prefix instead of _unlocked to really discourage users.
- rename runtime_pm_init/fini to enable/disable since that's what they do.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 08:56:38 +0000 (10:56 +0200)]
drm/i915: Extract intel_runtime_pm.c
Geez is the audio hack ugly.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
[danvet: Rebased on top of the skl patches.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 08:56:37 +0000 (10:56 +0200)]
drm/i915: Remove intel_modeset_suspend_hw
Another layer of indirection for just an lpt-only w/a is a bit
excessive. Reduce it.
This was added in
commit
7d708ee40a6b9ca1112a322e554c887df105b025
Author: Imre Deak <imre.deak@intel.com>
Date: Wed Apr 17 14:04:50 2013 +0300
drm/i915: HSW: allow PCH clock gating for suspend
Cc: Imre Deak <imre.deak@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 20:10:53 +0000 (22:10 +0200)]
drm/i915: spelling fixes for frontbuffer tracking kerneldoc
Oh well.
v2: Fix one more spelling fail Paulo spotted.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 20:10:52 +0000 (22:10 +0200)]
drm/i915: Tighting frontbuffer tracking around flips
So I think I've spotted a small gap in the frontbuffer tracking
while discussing the logic with Paulo on irc:
1. Userspace schedules gpu rendering to the current frontbuffer.
This gets tracked in dev_priv->fb_tracking.busy_bits.
2. We pageflip a fully rendered buffer before the frontbuffer
rendering completes.
3. The request retiring will never clear busy_bits (since at retire
time the old frontbuffer won't have obj->frontbuffer_bits set), so
these bits now are stuck until someone again does a bit of frontbuffer
tracking.
If we clear stale busy_bits in flip_prepare this gap is closed.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 30 Sep 2014 20:36:57 +0000 (22:36 +0200)]
Merge branch 'topic/skl-stage1' into drm-intel-next-queued
SKL stage 1 patches still need polish so will likely miss the 3.18
merge window. We've decided to postpone to 3.19 so let's pull this in
to make patch merging and conflict handling easier.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Rodrigo Vivi [Mon, 29 Sep 2014 22:29:52 +0000 (18:29 -0400)]
drm/i915: preserve other DP_TEST_SINK bits.
Sink crc was implemented based on dp 1.1 spec that had all TEST_SINK bits
reserved reading all 0s. But when reviewing my latest changes on sink crc
Todd warned me that on new specs we have other valid bits on this reg that we
might want to preserve.
Cc: Todd Previte <tprevite@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Sat, 20 Sep 2014 00:16:27 +0000 (20:16 -0400)]
drm/i915/bdw: WaDisableFenceDestinationToSLM
This WA affect BDW GT3 pre-production steppings.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
[danvet: Don't mention steppings ...]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Sat, 20 Sep 2014 00:16:26 +0000 (20:16 -0400)]
drm/i915: Add IS_BDW_GT3 macro.
It will be usefull to specify w/a that affects only BDW GT3.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Tue, 16 Sep 2014 23:18:12 +0000 (19:18 -0400)]
drm/i915: Fix Sink CRC
In some cases like when PSR just got enabled the panel need more vblank
times to calculate CRC. I figured that out with the new PSR test cases
facing some cases that I had a green screen but a blank CRC. Even with
2 vblank waits on kernel + 2 vblank waits on test case.
So let's give up to 6 vblank wait time. However we now check for
TEST_CRC_COUNT that shows when panel finished to calculate CRC and
has it ready.
v2: Jani pointed out attempts decrements was wrong and should never reach
the error condition. And Daniel pointed out that EIO is more appropriated than
EGAIN. Also I realized that I have to read test_crc_count after setting
test_sink
v3: Rebase and adding error message
Cc: Todd Previte <tprevite@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Thu, 25 Sep 2014 16:28:32 +0000 (12:28 -0400)]
drm/i915: Broadwell DDI Buffer translation - more tuning
BDW display - DP buffer translation values changed to give better margin.
Further change to entry 6; set dword 0 bit 31=1.
Both changes were approved already but this one didn't landed BSpec yet
this is why it is in a separated patch. Making reviewer's life easier.
Also alowing separated tests and any future bisect that might be needed.
Reference: Predator r74080 / HSD
4394389
v2: Arthur noticed I was changing the wrong bit.
Cc: Arthur Runyan <arthur.j.runyan@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Thu, 25 Sep 2014 00:32:43 +0000 (20:32 -0400)]
drm/i915: Broadwell DDI Buffer translation changed to give better margin.
Reference: Predator r73977 / HSD
4394389
Cc: Arthur Runyan <arthur.j.runyan@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Wed, 24 Sep 2014 22:16:58 +0000 (18:16 -0400)]
drm/i915: Make sure PSR is ready for been re-enabled.
Let's make sure PSR is propperly disabled before to re-enabled it.
According to Spec, after disabled PSR CTL, the Idle state might occur
up to 24ms, that is one full frame time (1/refresh rate),
plus SRD exit training time (max of 6ms),
plus SRD aux channel handshake (max of 1.5ms).
So if something went wrong PSR will be disabled until next full
enable/disable setup.
v2: The 24ms above takes in account 16ms for refresh rate on 60Hz mode. However
on low frequency modes this can take longer. So let's use 50ms for safeness.
v3: Move wait out of psr.lock critical area.
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Wed, 24 Sep 2014 23:50:59 +0000 (19:50 -0400)]
drm/i915: Minimize the huge amount of unecessary fbc sw cache clean.
The sw cache clean on BDW is a tempoorary workaround because we cannot
set cache clean on blt ring with risk of hungs. So we are doing the cache clean on sw.
However we are doing much more than needed. Not only when using blt ring.
So, with this extra w/a we minimize the ammount of cache cleans and call it only
on same cases that it was being called on gen7.
The traditional FBC Cache clean happens over LRI on BLT ring when there is a
frontbuffer touch happening. frontbuffer tracking set fbc_dirty variable
to let BLT flush that it must clean FBC cache.
fbc.need_sw_cache_clean works in the opposite information direction
of ring->fbc_dirty telling software on frontbuffer tracking to perform
the cache clean on sw side.
v2: Clean it a little bit and fully check for Broadwell instead of gen8.
v3: Rebase after frontbuffer organization.
v4: Wiggle confused me. So fixing v3!
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Tue, 16 Sep 2014 23:19:07 +0000 (19:19 -0400)]
drm/i915: Avoid re-configure panel on every PSR re-enable.
The panel has to be reconfigured only when it really loose the power.
The traditional enable/disable sequence already take care of this so we can
minimize the time spend on every re-enable.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 27 Mar 2014 18:48:35 +0000 (00:18 +0530)]
drm/i915/skl: Move gen9 pm initialization into its own branch
Gen9 is different enough (for instance, fetching the memory latency
values is different from ILK+) to not take the HAS_PCH_SPLIT() branch,
so let's prefer a clean separation.
v2: Rebase on top of the broadwell_init_clock_gating() name change
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 27 Mar 2014 18:48:33 +0000 (00:18 +0530)]
drm/i915/skl: Introduce intel_num_planes()
It can be handy to get the number of planes for this pipe, ie including
the primary plane to loop over them. Introduce a little function to do
so.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 27 Mar 2014 18:48:32 +0000 (00:18 +0530)]
drm/i915/skl: Introduce a I915_MAX_PLANES macro
This can be useful to declare structures around pipes and planes and
don't have to go back auditing the code if the next platorm bump that
number.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 12 Mar 2014 21:05:38 +0000 (21:05 +0000)]
drm/i915/skl: Adjust assert_sprites_disabled()
Let's put to good use the new PLANE_CTL macros.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 4 Dec 2013 00:49:41 +0000 (00:49 +0000)]
drm/i915/skl: Implement drm_plane vfuncs
SKL Uses the same hardware for all planes now, so called "universal"
planes. Ie both the primary planes and sprite planes share the same
logic. This patch implements the drm_plane vfuncs for "sprites" ie
planes that aren't the primary plane.
v2: Couple of fixes:
- Actually enabled the planes and fix the plane number
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 12 Feb 2014 19:13:31 +0000 (19:13 +0000)]
drm/i915/skl: Skylake has 2 "sprite" planes per pipe
On Skylake, we use plane1 as primary plane and plane2/3 as sprite
planes.
v2: Rebase on top of the for_each_pipe() change adding dev_priv as first
argument.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 26 Mar 2014 18:18:01 +0000 (18:18 +0000)]
drm/i915/skl: Implement WaDisableDgMirrorFixInHalfSliceChicken5:skl
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 26 Mar 2014 17:42:50 +0000 (17:42 +0000)]
drm/i915/skl: Implement Wa4x4STCOptimizationDisable:skl
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 26 Mar 2014 16:55:46 +0000 (16:55 +0000)]
drm/i915/skl: Implement WaDisableSDEUnitClockGating:skl
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Satheeshakrishna M [Wed, 9 Apr 2014 05:38:57 +0000 (11:08 +0530)]
drm/i915/skl: Sunrise Point PCH detection
This patch implements detection of SPT and SPT-LP PCH devices.
v2: Added HAS_PCH_SPT macro
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 20 Mar 2014 20:45:01 +0000 (20:45 +0000)]
drm/i915/skl: Adjust the display engine interrupts
To accomodate the extra planes, the bit definitions were shuffled around
a bit.
v2: Rebase on top of the for_each_pipe() change adding dev_priv as first
argument.
v3: Rebase after yet another change int that area (done with wiggle)
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Satheeshakrishna M [Tue, 8 Apr 2014 10:16:56 +0000 (15:46 +0530)]
drm/i915/skl: Restore pipe B/C interrupts
Extending BDW implementation to gen9. Pipe B/C interrupt
restoration after exiting LPSP.
v2: Fix minor rebasing conflict.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Satheeshakrishna M [Tue, 8 Apr 2014 10:16:55 +0000 (15:46 +0530)]
drm/i915/skl: SKL backlight enabling
Extending the BDW backlight implementation to SKL.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Satheeshakrishna M [Tue, 8 Apr 2014 10:16:54 +0000 (15:46 +0530)]
drm/i915/skl: vfuncs for skl eld and global resource
Set gen 9 function pointers for eld write and global resource.
Implementation remains same as HSW.
v2: Rebase on top of Sonika's untangling of the if/else ladder (Damien)
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Satheeshakrishna M [Tue, 8 Apr 2014 10:16:53 +0000 (15:46 +0530)]
drm/i915/skl: SKL pipe misc programming
Pipe misc programming in gen9 is similar to BDW. Extending the BDW
implementation to gen 9.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 4 Jun 2014 18:25:23 +0000 (19:25 +0100)]
drm/i915/skl: SKL shares the same underrun interrupt as BDW
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 3 Apr 2014 15:17:51 +0000 (16:17 +0100)]
drm/i915/skl: Report the PDP regs as in gen8
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 3 Apr 2014 15:13:29 +0000 (16:13 +0100)]
drm/i915/skl: report the same INSTDONE registers as gen8
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Sun, 30 Mar 2014 15:28:23 +0000 (16:28 +0100)]
drm/i915/skl: Allow the reg_read ioctl to return RCS_TIMESTAMP
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 23 Jan 2014 13:59:49 +0000 (13:59 +0000)]
drm/i915/skl: Initialize PPGTT like gen8
gen9 uses very similar memory management to what gen8 has. Just follow
the flow.
v2: Fix trivial conflict (Damien)
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Mon, 20 Jan 2014 16:01:00 +0000 (16:01 +0000)]
drm/i915/skl: Provide a get_aux_send_ctl() vfunc for skylake
Skylake doesn't use the pre-charge field now, but, instead, we need to
specify the total number of SYNC pulses for the SYNC phase (pre-charge +
SYNC pattern pules). Let's use the default value (32) for that.
v3: increase DP AUX TX timeout as 400us is not to be used on SKL
apparently (Jesse).
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Mon, 20 Jan 2014 16:00:59 +0000 (16:00 +0000)]
drm/i915/skl: Implement the get_aux_clock_divider() DP vfunc
We need to provide a vfunc that will make the code in intel_dp_aux_ch()
loop once to start the AUX transaction. The return value (clock divider)
is unused on SKL, so just return 1.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 16 Jan 2014 16:42:32 +0000 (16:42 +0000)]
drm/i915/skl: gen9 uses the same bind_vma() vfuncs as gen6+
Temporary plug a BUG() while waiting for a better solution. See:
http://lists.freedesktop.org/archives/intel-gfx/2014-January/038132.html
However Chris was looking at cleaning-up this as well, so went for the
easy intermediate solution instead.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 9 Jan 2014 18:02:46 +0000 (18:02 +0000)]
drm/i915/skl: Add the additional graphics stolen sizes
Skylake introduces new stolen memory sizes starting at 0xf0 (4MB) and
growing by 4MB increments from there.
v2: Rebase on top of the early-quirk changes from Ville.
v3: Rebase on top of the PCI_IDS/IDS macro rename
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 3 Dec 2013 13:56:29 +0000 (13:56 +0000)]
drm/i915/skl: Skylake moves AUX_CTL from PCH to CPU
So we can apply the old aux_ctl = dp_ctl + 0x10 rule again.
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 3 Dec 2013 13:56:26 +0000 (13:56 +0000)]
drm/i915/skl: Add support for DP voltage swings and pre-emphasis
They are similar to Haswell.
v2: Rebased on top of drm-intel-nightly
v3: Rebased on top of Sonika's DP train defines renaming
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 3 Dec 2013 13:56:25 +0000 (13:56 +0000)]
drm/i915/skl: Program the DDI buffer translation tables
A couple of things have changed compared to Broadwell:
- Entry 9 is used for eDP
- No more FDI
v2: Update the translation values to latest specs.
v3: Rebase on top of the BDW HDMI translation patch
v4: Remove the low voltage edp tables,
Rebase on top of the patch not writing the HDMI entry on eDP/FDI
DDIs (Satheesh, Paulo).
v5: Apply the / 2 fix for the number of HDMI entries (Satheesh)
v6: Rebase on top of Jani's clean up for the DDI_BUF_TRANS tables
v7: Restore the commit message that was mangled by error
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 3 Dec 2013 13:56:24 +0000 (13:56 +0000)]
drm/i915/skl: Don't try to read out the PCH transcoder state if not present
When the platform doesn't have a FDI link, don't try to read out the
state of a potential PCH transcoder.
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Don't open-code HAS_FDI if there's only one place that needs
it. Acked by Damien on irc.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 3 Dec 2013 13:56:23 +0000 (13:56 +0000)]
drm/i915/skl: Don't create a VGA connector on Skylake
v2: Rebase on top of the intel_crt_present() addition
v3: Fix rebase error (we were patching the wrong function)
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 3 Jul 2013 20:06:04 +0000 (21:06 +0100)]
drm/i915/skl: Implement the new update_plane() for primary planes
Skylake makes primary planes the same as sprite planes and call the
result "universal planes".
This commit emulates a primary plane with plane 0, taking the
opportunity to redefine primary and sprite registers to be identical now
that the underlying hardware is. It also makes sense as plenty of fields
have changed.
v2: Rebase on top of the vma code.
v3: Follow upstream evolution:
- Drop return values.
- Remove pipe checks since redudant and BUG instead.
- Remove tiling checks and BUG instead.
- Drop commented out DISP_MODIFY usage.
v4: s/plane/primary_plane/
v5: Misc fixes:
- Fix the fields we need to clear up
- Disable trickle feed
- Correctly use PLANE_OFFSET for the panning
v6: (Jesse)
Use pipe src size when programming plane size. This makes cloned configs
work correctly w/o the use of a panel fitter.
v7: Rebase on top of Ville's rmw elimination series
v8: Remove clearing the trickle feed bit now that we don't do a RMW (Rodrigo,
Damien)
Add a comment about the stride unit (Rodrigo)
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (v1,5,6,7)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v2,3)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Robert Beckett [Thu, 23 Jan 2014 14:23:14 +0000 (14:23 +0000)]
drm/i915/skl: i915_swizzle_info gen9 fix
Fix ARB_MODE register read for gen >= 8 in i915_swizzle_info
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Robert Beckett <robert.beckett@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 3 Jul 2013 20:06:02 +0000 (21:06 +0100)]
drm/i915/skl: Framebuffers need to be aligned to 256KB on Skylake
v2: Also align X tiled fbs to 256KB (Thomas)
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Imre Deak [Wed, 13 Feb 2013 15:27:34 +0000 (15:27 +0000)]
drm/i915/skl: don't set the AsyncFlip performance mode for Gen9+
The following sets the AsyncFlip performance mode for everything above
Gen6:
commit
4790cb36b3eede8fb0cca529dc1d31b9936fa24b
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Sun Jan 20 16:11:20 2013 +0000
drm/i915: Disable AsyncFlip performance optimisations
Starting from Gen9 the MI_MODE register layout changes and doesn't
include the above bit.
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Mon, 8 Apr 2013 13:42:02 +0000 (15:42 +0200)]
drm/i915/skl: Skylake shares the interrupt logic with Broadwell
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 13 Feb 2013 15:27:27 +0000 (15:27 +0000)]
drm/i915/skl: Provide a placeholder for init_clock_gating()
v2: Rebase on top of the broadwell_init_clock_gating() name change
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 13 Feb 2013 15:27:25 +0000 (15:27 +0000)]
drm/i915/skl: Fence registers on SKL are the same as SNB
v2: Rebased on top of the i915_gpu_error.c extraction.
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daisy Sun [Thu, 24 Apr 2014 00:13:09 +0000 (17:13 -0700)]
drm/i915/skl: SKL FBC enablement
Enable FBC feature on Skylake
Issue: VIZ-3788
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Daisy Sun <daisy.sun@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Satheeshakrishna M [Wed, 2 Apr 2014 05:54:50 +0000 (11:24 +0530)]
drm/i915/skl: Add an IS_SKYLAKE macro
Adding new macro IS_SKYLAKE for skylake specific implementation.
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 13 Feb 2013 15:27:24 +0000 (15:27 +0000)]
drm/i915/skl: Add an IS_GEN9() define
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Wed, 13 Feb 2013 15:27:37 +0000 (15:27 +0000)]
drm/i915/skl: Add the Skylake PCI ids
v2: Squash in 2nd patch from Damien for more ids (Daniel)
v3: info->has*ring -> info->ring_mask conversion. Also add VEBOX support.
v4: Fold in update from Damien
v5: Rebase and add GEN_DEFAULT_PIPEOFFSETS
v6: Add more PCI ID (Vandana)
v7: Rebase and add IVB_CURSOR_OFFSETS
v8: Renamed the macro from _PCI_IDS to _IDS for consistency
Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Tue, 16 Sep 2014 23:19:06 +0000 (19:19 -0400)]
drm/i915: PSR: Organize PSR enable function
We don't need to setup everything else if it doesn't match all conditions.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Tue, 16 Sep 2014 23:19:05 +0000 (19:19 -0400)]
drm/i915: PSR: organize setup function.
psr_enabled is already by itself a setup once so let's put the W/As there and
rename old setup once to setup_vsc.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 23 Sep 2014 13:46:54 +0000 (15:46 +0200)]
drm/doc: Fixup drm_irq kerneldoc includes.
Only !P can be used together with a function list.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Tue, 23 Sep 2014 13:46:53 +0000 (15:46 +0200)]
drm: Extract <drm/drm_gem.h>
v2: Don't forget git add, noticed by David.
Cc: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Acked-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Tue, 23 Sep 2014 13:46:52 +0000 (15:46 +0200)]
drm: Move internal debugfs functions to drm_internal.h
In my header cleanup I've missed the debugfs functions completely.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Tue, 23 Sep 2014 13:46:51 +0000 (15:46 +0200)]
drm: Move leftover ioctl declarations to drm_internal.h
Somehow I've missed these three, fix this up asap. Plus move
drm_master_create since while at it.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Tue, 23 Sep 2014 13:46:50 +0000 (15:46 +0200)]
drm: Move drm_vm_open_locked into drm_internal.h
Leftover from my previous header cleanup.
This depends upon the patch to rework exynos mmap support, otherwise
it'll break exynos.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Tue, 23 Sep 2014 13:46:49 +0000 (15:46 +0200)]
drm: move drm_mmap to <drm/drm_legacy.h>
Now that we've removed the copypasted users in gem/ttm we can
relegate the legacy buffer mapping support to where it belongs.
Also give it the proper drm_legacy_ prefix.
While at it statify drm_mmap_locked, somehow I've missed that in my
previous header rework.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Tue, 23 Sep 2014 13:46:48 +0000 (15:46 +0200)]
drm/gem: Don't call drm_mmap from drm_gem_mmap
The only user I could dig out was i915 back when ums+gem was still a
thing. But we've just very much killed that, and even when someone
screams about that we should resurrect that with a special hack
(wrapping drm_gem_mmap) in i915, not in the core code.
So good riddance to another entry point of the legacy buffer mapping
code.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Tue, 23 Sep 2014 13:46:47 +0000 (15:46 +0200)]
drm/<ttm-based-drivers>: Don't call drm_mmap
Really, the legacy buffer api should be dead, especially for all these
newfangled drivers. I suspect this is copypasta from the transitioning
days, which probably originated in radeon.
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Rashika <rashika.kheria@gmail.com>
Cc: Josh Triplett <josh@joshtriplett.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Fabian Frederick <fabf@skynet.be>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Alexandre Courbot <acourbot@nvidia.com>
Cc: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Cc: Christian Engelmayer <cengelma@gmx.at>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Joe Perches [Mon, 22 Sep 2014 16:30:11 +0000 (09:30 -0700)]
drm: change drm_err return type to void
The return value is not used by callers of this function
nor by uses of the DRM_ERROR macro so change the function
to return void.
Signed-off-by: Joe Perches <joe@perches.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Paulo Zanoni [Fri, 19 Sep 2014 19:04:55 +0000 (16:04 -0300)]
drm/i915: add SW tracking to FBC enabling
Currently, calling intel_fbc_enabled() will trigger a register read.
And we call it a lot of times, even when FBC is disabled, so saving a
few cycles would be a good thing.
Another reason for this patch is because we currently call
intel_fbc_enabled() while the HW is runtime suspended, so the read
makes no sense and triggers a WARN. This happens even if FBC is
disabled by default. Of course one could argue that we just shouldn't
be calling intel_fbc_enabled() while the driver is runtime suspended,
and I agree that's a good argument, but I still think that the reason
explained in the first paragraph already justifies the patch.
This problem can easily be reproduced with many subtests of
igt/pm_rpm, and it is a regression introduced by:
commit
c5ad011d7d256ecbe173324029e992817194d2b0
Author: Rodrigo Vivi <rodrigo.vivi@intel.com>
Date: Mon Aug 4 03:51:38 2014 -0700
drm/i915: FBC flush nuke for BDW
Testcase: igt/pm_rpm/cursor (and others)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Paulo Zanoni [Fri, 19 Sep 2014 19:04:54 +0000 (16:04 -0300)]
drm/i915: extract intel_init_fbc()
Because I plan to expand it a little bit.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Benjamin Herrenschmidt [Thu, 4 Sep 2014 07:47:23 +0000 (17:47 +1000)]
drm/ttm: Clean usage of ttm_io_prot() with TTM_PL_FLAG_CACHED
Today, most callers of ttm_io_prot() check TTM_PL_FLAG_CACHED before
calling it since on some archs it will unconditionally create non-cached
mappings.
But not all callers do which is incorrect as far as I can tell.
Instead, move that check inside ttm_io_port() itself for all archs
and make powerpc use the same implementation as ia64 and arm
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Benjamin Herrenschmidt [Thu, 4 Sep 2014 07:46:45 +0000 (17:46 +1000)]
drm: powerpc can use a simpler drm_io_prot()
What the code does is equivalent to the x86 code, so let's use
it as well
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 22 Sep 2014 00:07:25 +0000 (10:07 +1000)]
Merge branch 'exynos-drm-next' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next
Sorry for late. This pull request includes some enhancements
for Exynos drm, new feature supports, cleanups and fixups
like below,
- Consider low power transmission for drm mipi dsi module,
and also add non-continuous clock mode support for Exynos
mipi dsi driver.
- Add Exynos3250 SoC support.
- Enhance and clean up ipp framework and fimc driver.
- Update to use component match support and fix up
de-initialization order.
- Remove a direct mmap interface and relevant stuff specific to
Exynos drm, use drm generic mmap interface instead.
And we will remove the specific interface from userspace
library, libdrm soon.
- Use universal plane which allows to replace fake primary plane
with the real one.
- Some code cleanups and fixups.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (40 commits)
drm/exynos: switch to universal plane API
drm/exynos: use drm generic mmap interface
drm/exynos: remove DRM_EXYNOS_GEM_MAP_OFFSET ioctl
drm/exynos: factor out initial setting of each driver
drm/exynos/hdmi: unregister connector on removal
drm/exynos/dp: unregister connector on removal
drm/exynos/dpi: unregister connector and panel on removal
drm/exynos/dsi: unregister connector on removal
drm/exynos/fb: free exynos framebuffer on error
drm/exynos/fbdev: fix fbdev gem object cleanup
drm/exynos: fix drm driver de-initialization order
drm/exynos/ipp: traverse ipp drivers list safely
drm/exynos: update to use component match support
drm/exynos/ipp: add file checks for ioctls
drm/exynos/ipp: remove file argument from node related functions
drm/exynos/fimc: fix source buffer registers
drm/exynos/fimc: simplify buffer queuing
drm/exynos/fimc: do not enable fimc twice
drm/exynos/fimc: avoid clearing overflow bits
drm/exynos/ipp: remove events during command cleaning
...
Daniel Vetter [Fri, 19 Sep 2014 16:27:27 +0000 (18:27 +0200)]
drm/i915: DocBook integration for frontbuffer tracking
I shouldn't ask everyone to do this and fail myself ...
This extracts all the frontbuffer tracking functions into
intel_frontbuffer.c, adds a DOC overview section and also adds the
missing kerneldoc for i915_gem_track_fb and also pulls it into the
same section for convenience.
v2: Don't forget about the header files.
v3: Oops, might check compilation next time around. To make my life
easier drop the increase_pllclock from set_base_atomic since really,
it doesn't matter if you see your Oops or kgdb with a tiny bit of lag.
v4: Try to better explain how to actually use this, requested by Paulo
on irc.
v5: Explain invalidate/flush a bit clearer.
v6: s/business/busyness/
Acked-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Andrzej Hajda [Fri, 19 Sep 2014 12:58:53 +0000 (14:58 +0200)]
drm/exynos: switch to universal plane API
The patch replaces legacy functions
drm_plane_init() / drm_crtc_init() with
drm_universal_plane_init() and drm_crtc_init_with_planes().
It allows to replace fake primary plane with the real one.
Additionally the patch leaves cleanup of crtcs to core,
this way planes and crtcs are cleaned in correct order.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Inki Dae [Thu, 18 Sep 2014 05:19:01 +0000 (14:19 +0900)]
drm/exynos: use drm generic mmap interface
This patch removes DRM_EXYNOS_GEM_MMAP ictrl feature specific
to Exynos drm and instead uses drm generic mmap.
We had used the interface specific to Exynos drm to do mmap directly,
not to use demand paging which maps each page with physical memory
at page fault handler. We don't need the specific mmap interface
because the drm generic mmap which uses vm offset manager stuff can
also do mmap directly.
This patch makes a userspace region to be mapped with whole physical
memory region allocated by userspace request when mmap system call is
requested.
Changelog v2:
- do not set VM_IO, VM_DONTEXPEND and VM_DONTDUMP. These flags were already
set by drm_gem_mmap
- do not include <linux/anon_inodes.h>, which isn't needed anymore.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Inki Dae [Wed, 17 Sep 2014 13:48:45 +0000 (22:48 +0900)]
drm/exynos: remove DRM_EXYNOS_GEM_MAP_OFFSET ioctl
This interface and relevant codes aren't used anymore.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Chris Wilson [Fri, 19 Sep 2014 10:56:27 +0000 (11:56 +0100)]
drm/i915: Inline feature detection into sanitize_enable_ppgtt
Rather than splitting and hiding away critical parts of
sanitize_enable_ppgtt() into single use macros in the headers, inline
them into the function for clarity.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Joonyoung Shim [Thu, 18 Sep 2014 08:50:35 +0000 (17:50 +0900)]
drm/exynos: factor out initial setting of each driver
From fimd driver and vidi driver, dev->irq_enabled and
dev->vblank_disable_allowed are set and also mixer needs them even if
missed. It's duplicated so set them when loads drm driver.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Brad Volkin [Thu, 18 Sep 2014 23:26:27 +0000 (16:26 -0700)]
drm/i915: Log a message when rejecting LRM to OACONTROL
The other paths in the command parser that reject a batch all
log a message indicating the reason. We simply missed this one.
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:13 +0000 (15:16 +0200)]
drm/exynos/hdmi: unregister connector on removal
During component removal driver should unregister connector.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:12 +0000 (15:16 +0200)]
drm/exynos/dp: unregister connector on removal
During component removal driver should unregister connector.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:11 +0000 (15:16 +0200)]
drm/exynos/dpi: unregister connector and panel on removal
During component removal it should unregister connector
and optionally detach the panel.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:10 +0000 (15:16 +0200)]
drm/exynos/dsi: unregister connector on removal
During component unbind connector should be unregistered.
Also DSI host should be unregistered after KMS cleanup.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:08 +0000 (15:16 +0200)]
drm/exynos/fb: free exynos framebuffer on error
In case drm_framebuffer_init fails exynos_fb should be freed
before returning an error.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:07 +0000 (15:16 +0200)]
drm/exynos/fbdev: fix fbdev gem object cleanup
exynos_gem_obj is used by exynos_drm_fbdev_destroy so it cannot be destroyed
before calling the latter. exynos_gem_obj will be destroyed anyway by
exynos_drm_fbdev_destroy->...->exynos_drm_fb_destroy.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:06 +0000 (15:16 +0200)]
drm/exynos: fix drm driver de-initialization order
Since components have their own cleanup routines calling
drm_mode_config_cleanup before component_unbind_all causes errors
due to double free of KMS objects. The patch fixes it by changing
de-initialization order. Now it is exactly opposite to init order.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 9 Sep 2014 13:16:05 +0000 (15:16 +0200)]
drm/exynos/ipp: traverse ipp drivers list safely
On ipp subsystem removal list of ipp drivers is traversed
and their members are deleted. To do it properly safe version
of list_for_each* should be used.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Inki Dae [Thu, 11 Sep 2014 08:04:03 +0000 (17:04 +0900)]
drm/exynos: update to use component match support
Update Exynos's DRM driver to use component match support rater than
add_components.
Changelog v2:
- release devices and drivers if failed.
- change compare_of to compare_dev.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Tested-by: Andrzej Hajda <a.hajda@samsung.com>
Andrzej Hajda [Tue, 2 Sep 2014 12:56:21 +0000 (14:56 +0200)]
drm/exynos/ipp: add file checks for ioctls
Process should not have access to ipp nodes created by another
process. The patch adds necessary checks.
It also simplifies lookup for command node.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 2 Sep 2014 12:55:06 +0000 (14:55 +0200)]
drm/exynos/ipp: remove file argument from node related functions
Since file pointer is preserved in c_node passing it
as argument in node functions is redundant.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 28 Aug 2014 09:07:39 +0000 (11:07 +0200)]
drm/exynos/fimc: fix source buffer registers
FIMC in default mode of operation uses only one input buffer,
but the driver used also second buffer, as a result only the
first frame was processed correctly. The patch fixes it.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 28 Aug 2014 09:07:38 +0000 (11:07 +0200)]
drm/exynos/fimc: simplify buffer queuing
The patch removes redundant checks, redundant HW reads
and simplifies code.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>