oota-llvm.git
14 years agoTeach LSR how to cope better with unrolled loops on targets where
Dan Gohman [Wed, 19 May 2010 23:43:12 +0000 (23:43 +0000)]
Teach LSR how to cope better with unrolled loops on targets where
the addressing modes don't make this trivially easy. This allows
it to avoid falling into the less precise heuristics in more
cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104186 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoOptimize away insertelement of an undef value. This shows up in
Bob Wilson [Wed, 19 May 2010 23:42:58 +0000 (23:42 +0000)]
Optimize away insertelement of an undef value.  This shows up in
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up.  Radar 7998853.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agofix rdar://7986634 - match instruction opcodes case insensitively.
Chris Lattner [Wed, 19 May 2010 23:34:33 +0000 (23:34 +0000)]
fix rdar://7986634 - match instruction opcodes case insensitively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104183 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTestcase for r104181.
Bill Wendling [Wed, 19 May 2010 23:33:26 +0000 (23:33 +0000)]
Testcase for r104181.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104182 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoEnable preserving debug information through post-RA scheduling
Jim Grosbach [Wed, 19 May 2010 22:57:47 +0000 (22:57 +0000)]
Enable preserving debug information through post-RA scheduling

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104175 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix the post-RA instruction scheduler to handle instructions referenced by
Jim Grosbach [Wed, 19 May 2010 22:57:06 +0000 (22:57 +0000)]
Fix the post-RA instruction scheduler to handle instructions referenced by
more than one dbg_value instruction. rdar://7759363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104174 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoCode clean up.
Evan Cheng [Wed, 19 May 2010 22:42:23 +0000 (22:42 +0000)]
Code clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104173 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRevert r104165.
Devang Patel [Wed, 19 May 2010 21:58:28 +0000 (21:58 +0000)]
Revert r104165.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104172 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd support for partial redefs to the fast register allocator.
Jakob Stoklund Olesen [Wed, 19 May 2010 21:36:05 +0000 (21:36 +0000)]
Add support for partial redefs to the fast register allocator.

A partial redef now triggers a reload if required. Also don't add
<imp-def,dead> operands for physical superregisters.

Kill flags are still treated as full register kills, and <imp-use,kill> operands
are added for physical superregisters as before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104167 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoThere is no need to maintain InsnsBeginScopeSet separately.
Devang Patel [Wed, 19 May 2010 21:26:53 +0000 (21:26 +0000)]
There is no need to maintain InsnsBeginScopeSet separately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104165 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoA more combo tls testcase.
Eric Christopher [Wed, 19 May 2010 21:19:42 +0000 (21:19 +0000)]
A more combo tls testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104163 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd MachineInstr::readsVirtualRegister() in preparation for proper handling of
Jakob Stoklund Olesen [Wed, 19 May 2010 20:36:22 +0000 (20:36 +0000)]
Add MachineInstr::readsVirtualRegister() in preparation for proper handling of
partial redefines.

We are going to treat a partial redefine of a virtual register as a
read-modify-write:

  %reg1024:6 = OP

Unless the register is fully clobbered:

  %reg1024:6 = OP, %reg1024<imp-def>

MachineInstr::readsVirtualRegister() knows the difference. The first case is a
read, the second isn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104149 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFew more simple tls testcases.
Eric Christopher [Wed, 19 May 2010 20:35:15 +0000 (20:35 +0000)]
Few more simple tls testcases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104148 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoCode refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine...
Evan Cheng [Wed, 19 May 2010 20:19:50 +0000 (20:19 +0000)]
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTwoAddressInstructionPass doesn't really know how to merge live intervals when
Jakob Stoklund Olesen [Wed, 19 May 2010 20:08:00 +0000 (20:08 +0000)]
TwoAddressInstructionPass doesn't really know how to merge live intervals when
lowering REG_SEQUENCE instructions.

Insert copies for REG_SEQUENCE sources not killed to avoid breaking later passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104146 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agollvmc: report an error if a child process segfaults.
Mikhail Glushenkov [Wed, 19 May 2010 19:24:32 +0000 (19:24 +0000)]
llvmc: report an error if a child process segfaults.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104145 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAttempt to run this test on x86 only.
Eric Christopher [Wed, 19 May 2010 18:59:37 +0000 (18:59 +0000)]
Attempt to run this test on x86 only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104143 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTestcase to go with 104141.
Bob Wilson [Wed, 19 May 2010 18:58:37 +0000 (18:58 +0000)]
Testcase to go with 104141.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104142 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoWhen expanding a vector_shuffle, the element type may not be legal and may
Bob Wilson [Wed, 19 May 2010 18:48:32 +0000 (18:48 +0000)]
When expanding a vector_shuffle, the element type may not be legal and may
need to be promoted.  The BUILD_VECTOR and EXTRACT_VECTOR_ELT nodes generated
here already allow the promoted type to be used without further changes, so
just do the promotion.  This fixes part of pr7167.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104141 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Add missing entry for TAILJMP_1 to getRelaxedOpcode().
Daniel Dunbar [Wed, 19 May 2010 17:20:58 +0000 (17:20 +0000)]
MC/X86: Add missing entry for TAILJMP_1 to getRelaxedOpcode().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104122 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid same
Daniel Dunbar [Wed, 19 May 2010 15:26:43 +0000 (15:26 +0000)]
MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid same
prefix byte problem as in r104062.
 - As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104120 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and
Daniel Dunbar [Wed, 19 May 2010 08:07:12 +0000 (08:07 +0000)]
MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and
CALL64pcrel32, for the same reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104116 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agot2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more...
Evan Cheng [Wed, 19 May 2010 07:28:01 +0000 (07:28 +0000)]
t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104115 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoUse 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable.
Evan Cheng [Wed, 19 May 2010 07:26:50 +0000 (07:26 +0000)]
Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104114 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoUpdate autoconf/automake versions in the documentation to match the versions used...
Tobias Grosser [Wed, 19 May 2010 07:00:17 +0000 (07:00 +0000)]
Update autoconf/automake versions in the documentation to match the versions used in Autogen.sh

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104113 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Lower MOV{8,16,32,64}{rm,mr} to fixed-register forms, as appropriate.
Daniel Dunbar [Wed, 19 May 2010 06:20:44 +0000 (06:20 +0000)]
MC/X86: Lower MOV{8,16,32,64}{rm,mr} to fixed-register forms, as appropriate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104112 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These do not...
Evan Cheng [Wed, 19 May 2010 06:07:03 +0000 (06:07 +0000)]
Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These do not have other un-modeled side effects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104111 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTarget instruction selection should copy memoperands.
Evan Cheng [Wed, 19 May 2010 06:06:09 +0000 (06:06 +0000)]
Target instruction selection should copy memoperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104110 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Strip spurious operands from CALL64r as we do for CALL64pcrel32, to
Daniel Dunbar [Wed, 19 May 2010 04:31:36 +0000 (04:31 +0000)]
MC/X86: Strip spurious operands from CALL64r as we do for CALL64pcrel32, to
avoid same prefix byte problem as in r104062.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104108 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMark a few more pattern-less instructions with neverHasSideEffects. This is especiall...
Evan Cheng [Wed, 19 May 2010 01:52:25 +0000 (01:52 +0000)]
Mark a few more pattern-less instructions with neverHasSideEffects. This is especially important on instructions like t2LEApcreal which are prime candidate for machine LICM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104102 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd a comment explaining why this code uses Append mode.
Dan Gohman [Wed, 19 May 2010 01:21:34 +0000 (01:21 +0000)]
Add a comment explaining why this code uses Append mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104095 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoIntrinsics which do a vector compare (results are all zero or all ones) are modeled...
Evan Cheng [Wed, 19 May 2010 01:08:17 +0000 (01:08 +0000)]
Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.

The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.

Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFactor out the code for picking integer arithmetic with immediate
Dan Gohman [Wed, 19 May 2010 00:53:19 +0000 (00:53 +0000)]
Factor out the code for picking integer arithmetic with immediate
opcodes into a helper function. This fixes a few places in the code
which were not properly selecting the 8-bit-immediate opcodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104091 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd a test to make sure that we're lowering the shift amount correctly.
Eric Christopher [Wed, 19 May 2010 00:22:04 +0000 (00:22 +0000)]
Add a test to make sure that we're lowering the shift amount correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104090 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd a comment.
Dan Gohman [Tue, 18 May 2010 23:55:57 +0000 (23:55 +0000)]
Add a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104089 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix the predicate which checks for non-sensical formulae which have
Dan Gohman [Tue, 18 May 2010 23:48:08 +0000 (23:48 +0000)]
Fix the predicate which checks for non-sensical formulae which have
constants in registers which partially cancel out their immediate fields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104088 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFactor out the code for recomputing an LSRUse's Regs set after some
Dan Gohman [Tue, 18 May 2010 23:42:37 +0000 (23:42 +0000)]
Factor out the code for recomputing an LSRUse's Regs set after some
of its formulae have been removed into a helper function, and also
teach it how to update the RegUseTracker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104087 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix a crash when debugging the coalescer. DebugValue instructions are not
Bob Wilson [Tue, 18 May 2010 23:19:42 +0000 (23:19 +0000)]
Fix a crash when debugging the coalescer.  DebugValue instructions are not
in the coalescer's instruction map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104086 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFactor out code for estimating search space complexity into a helper
Dan Gohman [Tue, 18 May 2010 22:51:59 +0000 (22:51 +0000)]
Factor out code for estimating search space complexity into a helper
function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104082 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd some more debug output.
Dan Gohman [Tue, 18 May 2010 22:41:32 +0000 (22:41 +0000)]
Add some more debug output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104080 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFactor out the code for deleting a formula from an LSRUse into
Dan Gohman [Tue, 18 May 2010 22:39:15 +0000 (22:39 +0000)]
Factor out the code for deleting a formula from an LSRUse into
a helper function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104079 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMake some debug output more informative.
Dan Gohman [Tue, 18 May 2010 22:37:37 +0000 (22:37 +0000)]
Make some debug output more informative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104078 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoPrint an error message in Formula::print if the HasBaseReg flag
Dan Gohman [Tue, 18 May 2010 22:35:55 +0000 (22:35 +0000)]
Print an error message in Formula::print if the HasBaseReg flag
is inconsistent with the BaseRegs field. It's not print's job to
assert on an invalid condition, but it can make one more obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104077 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRename RegUseTracker's RegUses member to RegUsesMap to avoid
Dan Gohman [Tue, 18 May 2010 22:33:00 +0000 (22:33 +0000)]
Rename RegUseTracker's RegUses member to RegUsesMap to avoid
confusion with LSRInstance's RegUses member.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104076 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRemember to update VirtRegLastUse when spilling without killing before a call.
Jakob Stoklund Olesen [Tue, 18 May 2010 22:20:09 +0000 (22:20 +0000)]
Remember to update VirtRegLastUse when spilling without killing before a call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104074 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTeach mode load folding and unfolding code about CMP32ri8 and friends.
Dan Gohman [Tue, 18 May 2010 21:54:15 +0000 (21:54 +0000)]
Teach mode load folding and unfolding code about CMP32ri8 and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104068 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoDon't eliminate frame pointers from leaf functions if "--disable-fp-elim" is
Bill Wendling [Tue, 18 May 2010 21:47:08 +0000 (21:47 +0000)]
Don't eliminate frame pointers from leaf functions if "--disable-fp-elim" is
specified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104066 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoWhen converting a test to a cmp to fold a load, use the cmp that has an
Dan Gohman [Tue, 18 May 2010 21:42:03 +0000 (21:42 +0000)]
When converting a test to a cmp to fold a load, use the cmp that has an
8-bit immediate field rather than one with a wider immediate field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104064 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoQuick test to make sure we're emitting the tbss section correctly.
Eric Christopher [Tue, 18 May 2010 21:40:20 +0000 (21:40 +0000)]
Quick test to make sure we're emitting the tbss section correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104063 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agomake mcinstlower remove all but the first operand to CALL64pcrel32.
Chris Lattner [Tue, 18 May 2010 21:40:18 +0000 (21:40 +0000)]
make mcinstlower remove all but the first operand to CALL64pcrel32.
The register use operands (e.g. the first argument is passed in a
register) is currently being modeled as a normal register use,
instead of correctly being an implicit use.  This causes the operand
to get propagated onto the mcinst, which was causing the encoder to
emit a rex prefix byte, which generates an invalid call.

This fixes rdar://7998435

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104062 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSink dag combine's post index load / store code that swap base ptr and index into...
Evan Cheng [Tue, 18 May 2010 21:31:17 +0000 (21:31 +0000)]
Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoImplement EmitTBSSSymbol for MachOStreamer.
Eric Christopher [Tue, 18 May 2010 21:26:41 +0000 (21:26 +0000)]
Implement EmitTBSSSymbol for MachOStreamer.

Fixes build failure as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104059 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix enum to address array bounds regression.
mike-m [Tue, 18 May 2010 21:22:12 +0000 (21:22 +0000)]
Fix enum to address array bounds regression.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104058 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMake EmitTBSSSymbol take a section argument so that we can find it later.
Eric Christopher [Tue, 18 May 2010 21:16:04 +0000 (21:16 +0000)]
Make EmitTBSSSymbol take a section argument so that we can find it later.
Fix up callers and users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104057 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoProperly handle multiple definitions of a virtual register in the same
Jakob Stoklund Olesen [Tue, 18 May 2010 21:10:50 +0000 (21:10 +0000)]
Properly handle multiple definitions of a virtual register in the same
instruction.

This can happen on ARM:

>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104056 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTest passed on ppc, to my surprise; if it worked
Dale Johannesen [Tue, 18 May 2010 20:47:04 +0000 (20:47 +0000)]
Test passed on ppc, to my surprise; if it worked
there it may work everywhere...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104053 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoContinuously refine the register class of REG_SEQUENCE def with all the source regist...
Evan Cheng [Tue, 18 May 2010 20:07:47 +0000 (20:07 +0000)]
Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104051 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix PR7162: Use source register classes and sub-indices to determine the correct...
Evan Cheng [Tue, 18 May 2010 20:03:28 +0000 (20:03 +0000)]
Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104050 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTestcase for llvm-gcc checkin 104042.
Dale Johannesen [Tue, 18 May 2010 19:03:51 +0000 (19:03 +0000)]
Testcase for llvm-gcc checkin 104042.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104043 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoIncorporate Daniel's suggestion and use !isdigit(CurPtr[0]) and not
Kevin Enderby [Tue, 18 May 2010 18:09:20 +0000 (18:09 +0000)]
Incorporate Daniel's suggestion and use !isdigit(CurPtr[0]) and not
CurPtr[0] == '\n' when testing the character after a "0b" when looking
to see if it part of a something like "jmp 0b".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104039 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFixed the problem with a branch to "0b" that was not parsed by llvm-mc
Kevin Enderby [Tue, 18 May 2010 17:51:35 +0000 (17:51 +0000)]
Fixed the problem with a branch to "0b" that was not parsed by llvm-mc
correctly.  The Lexer was incorrectly eating the newline casusing it to branch
to address 0.  Updated the test case to use a "0:" label and a branch to "0b".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104038 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTeach the machine code verifier to use getSubRegisterRegClass().
Jakob Stoklund Olesen [Tue, 18 May 2010 17:31:12 +0000 (17:31 +0000)]
Teach the machine code verifier to use getSubRegisterRegClass().

The old approach was wrong. It had an off-by-one error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104034 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/Mach-O: Implement support for setting indirect symbol table offset in section...
Daniel Dunbar [Tue, 18 May 2010 17:28:24 +0000 (17:28 +0000)]
MC/Mach-O: Implement support for setting indirect symbol table offset in section header.

Also, create symbol data for LHS of assignment, to match 'as' symbol ordering better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104033 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/Mach-O: Remove some FIXMEs.
Daniel Dunbar [Tue, 18 May 2010 17:28:20 +0000 (17:28 +0000)]
MC/Mach-O: Remove some FIXMEs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104032 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/Mach-O: Fail faster/harder when we see .file, which isn't yet supported.
Daniel Dunbar [Tue, 18 May 2010 17:28:17 +0000 (17:28 +0000)]
MC/Mach-O: Fail faster/harder when we see .file, which isn't yet supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104031 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/X86: Implement custom lowering to make sure we match things like
Daniel Dunbar [Tue, 18 May 2010 17:22:24 +0000 (17:22 +0000)]
MC/X86: Implement custom lowering to make sure we match things like
  X86::ADC32ri $0, %eax
to
  X86::ADC32i32 $0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104030 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agollc (et al): Add support for --show-encoding and --show-inst.
Daniel Dunbar [Tue, 18 May 2010 17:22:19 +0000 (17:22 +0000)]
llc (et al): Add support for --show-encoding and --show-inst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104029 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoUsage of O_NONBLOCK in bjam is now confirmed as a bug and fixed upstream.
Dan Gohman [Tue, 18 May 2010 15:25:14 +0000 (15:25 +0000)]
Usage of O_NONBLOCK in bjam is now confirmed as a bug and fixed upstream.
Update the comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104021 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSimplify MCContext::(Next|Get)Instance
Benjamin Kramer [Tue, 18 May 2010 12:15:34 +0000 (12:15 +0000)]
Simplify MCContext::(Next|Get)Instance

- Allocate MCLabels in the context so they don't leak.
- Avoid duplicated densemap lookup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104020 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoReplace FIRST_* and LAST_* macros with a generic STMT_RANGE macro
Sean Hunt [Tue, 18 May 2010 06:22:50 +0000 (06:22 +0000)]
Replace FIRST_* and LAST_* macros with a generic STMT_RANGE macro
Also rename ABSTRACT to ABSTRACT_STMT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104018 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_ve...
Evan Cheng [Tue, 18 May 2010 00:03:40 +0000 (00:03 +0000)]
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoARMBaseRegisterInfo::estimateRSStackSizeLimit() could return prematurely with a
Jakob Stoklund Olesen [Mon, 17 May 2010 23:29:23 +0000 (23:29 +0000)]
ARMBaseRegisterInfo::estimateRSStackSizeLimit() could return prematurely with a
too large limit.

The function would return immediately when finding an addrmode 3/5 instruction.
It needs to keep scanning in case there is an addrmode 6 instruction which drops
the limit to 0.

A test case is very difficult to produce because it will only fail when the
scavenger is used.

rdar://problem/7894847

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103995 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG_SEQUENC...
Evan Cheng [Mon, 17 May 2010 23:24:12 +0000 (23:24 +0000)]
Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG_SEQUENCE instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103994 91177308-0d34-0410-b5e6-96231b3b80d8

14 years ago- Set the "HasCalls" flag after instruction selection is finished.
Bill Wendling [Mon, 17 May 2010 23:09:50 +0000 (23:09 +0000)]
- Set the "HasCalls" flag after instruction selection is finished.

- Change the logic DisableFramePointerElim() to check for the
  -disable-non-leaf-fp-elim before -disable-fp-elim.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103990 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdded support in MC for Directional Local Labels.
Kevin Enderby [Mon, 17 May 2010 23:08:19 +0000 (23:08 +0000)]
Added support in MC for Directional Local Labels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103989 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMore data/parsing support for tls directives. Add a few more testcases
Eric Christopher [Mon, 17 May 2010 22:53:55 +0000 (22:53 +0000)]
More data/parsing support for tls directives.  Add a few more testcases
and cleanup comments as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace it with...
Evan Cheng [Mon, 17 May 2010 22:09:49 +0000 (22:09 +0000)]
Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103984 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agovmov of immediates are trivially re-materializable.
Evan Cheng [Mon, 17 May 2010 21:54:50 +0000 (21:54 +0000)]
vmov of immediates are trivially re-materializable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103982 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/Mach-O/x86: Optimal nop sequences should only be used for the .text sections,...
Daniel Dunbar [Mon, 17 May 2010 21:54:30 +0000 (21:54 +0000)]
MC/Mach-O/x86: Optimal nop sequences should only be used for the .text sections, not all sections in the text segment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103981 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC: Add dyn_cast support to MCSection.
Daniel Dunbar [Mon, 17 May 2010 21:54:26 +0000 (21:54 +0000)]
MC: Add dyn_cast support to MCSection.
 - Of questionable utility, since in general anything which wants to do this should probably be within a target specific hook, which can rely on the sections being of the appropriate type. However, it can be useful for short term hacks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103980 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/Mach-O: Reverse order of SymbolData scanning when emitting instructions.
Daniel Dunbar [Mon, 17 May 2010 21:19:59 +0000 (21:19 +0000)]
MC/Mach-O: Reverse order of SymbolData scanning when emitting instructions.
 - This fixes a string table mismatch with 'as' when two new symbols are defined
   in a single instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103979 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoPull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
Jakob Stoklund Olesen [Mon, 17 May 2010 21:02:08 +0000 (21:02 +0000)]
Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103975 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAdd some section and constant support for darwin TLS.
Eric Christopher [Mon, 17 May 2010 21:02:07 +0000 (21:02 +0000)]
Add some section and constant support for darwin TLS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103974 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoCareful with reg_sequence coalescing to not to overwrite sub-register indices.
Evan Cheng [Mon, 17 May 2010 20:57:12 +0000 (20:57 +0000)]
Careful with reg_sequence coalescing to not to overwrite sub-register indices.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103971 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoFix a regression in 464.h264 for thumb1 and thumb2 nightly tests.
Bob Wilson [Mon, 17 May 2010 20:31:13 +0000 (20:31 +0000)]
Fix a regression in 464.h264 for thumb1 and thumb2 nightly tests.
Obvious in retrospect but not fun to debug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103969 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMC/Mach-O: Fix some differences in symbol flag handling.
Daniel Dunbar [Mon, 17 May 2010 20:12:31 +0000 (20:12 +0000)]
MC/Mach-O: Fix some differences in symbol flag handling.
 - Don't clear weak reference flag, 'as' was only "trying" to do this, it wasn't
   actually succeeding.
 - Clear the "lazy bound" bit when we mark something external. This corresponds
   roughly to the lazy clearing of the bit that 'as' implements in
   symbol_table_lookup.
 - The exact meaning of these flags appears pretty loose, since 'as' isn't very
   consistent. For now we just try to match 'as', we will clean this up one day
   hopefully.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103964 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoOptimize empty DenseMap iteration.
Jakob Stoklund Olesen [Mon, 17 May 2010 20:01:24 +0000 (20:01 +0000)]
Optimize empty DenseMap iteration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103962 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRemove debug option. Add comment on spill order determinism.
Jakob Stoklund Olesen [Mon, 17 May 2010 20:01:22 +0000 (20:01 +0000)]
Remove debug option. Add comment on spill order determinism.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103961 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoTurn on -neon-reg-sequence by default.
Evan Cheng [Mon, 17 May 2010 19:51:20 +0000 (19:51 +0000)]
Turn on -neon-reg-sequence by default.

Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103960 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agollvm-mc: Support reassignment of variables in one special case, when the
Daniel Dunbar [Mon, 17 May 2010 17:46:23 +0000 (17:46 +0000)]
llvm-mc: Support reassignment of variables in one special case, when the
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103950 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoAvoid allocating the same physreg to multiple virtregs in one instruction.
Jakob Stoklund Olesen [Mon, 17 May 2010 17:18:59 +0000 (17:18 +0000)]
Avoid allocating the same physreg to multiple virtregs in one instruction.

While that approach works wonders for register pressure, it tends to break
everything.

This should unbreak the arm-linux builder and fix a number of miscompilations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103946 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoMinor optimizations. DenseMap::begin() is surprisingly slow on an empty map.
Jakob Stoklund Olesen [Mon, 17 May 2010 15:30:37 +0000 (15:30 +0000)]
Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103940 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoExtract spill cost calculation to a new method, and use definePhysReg() to clear
Jakob Stoklund Olesen [Mon, 17 May 2010 15:30:32 +0000 (15:30 +0000)]
Extract spill cost calculation to a new method, and use definePhysReg() to clear
out aliases when allocating. Clean up allocVirtReg().

Use calcSpillCost() to allow more aggressive hinting. Now the hint is always
taken unless blocked by a reserved register. This leads to more coalescing,
lower register pressure, and less spilling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103939 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoRemove unused member variable.
Zhongxing Xu [Mon, 17 May 2010 09:47:55 +0000 (09:47 +0000)]
Remove unused member variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103936 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoOnly use clairvoyance when defining a register, and then only if it has one use.
Jakob Stoklund Olesen [Mon, 17 May 2010 04:50:57 +0000 (04:50 +0000)]
Only use clairvoyance when defining a register, and then only if it has one use.
This makes allocation independent on the ordering of use-def chains.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103935 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoEliminate a hash table probe when killing virtual registers.
Jakob Stoklund Olesen [Mon, 17 May 2010 03:26:09 +0000 (03:26 +0000)]
Eliminate a hash table probe when killing virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103934 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoExecute virtreg kills immediately instead of after processing all uses.
Jakob Stoklund Olesen [Mon, 17 May 2010 03:26:06 +0000 (03:26 +0000)]
Execute virtreg kills immediately instead of after processing all uses.

This is safe to do because the physreg has been marked UsedInInstr and the kill flag will be set on the last operand using the virtreg if there are more then one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103933 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoSprinkle superregister <imp-def> and <imp-kill> operands when dealing with subregiste...
Jakob Stoklund Olesen [Mon, 17 May 2010 02:49:21 +0000 (02:49 +0000)]
Sprinkle superregister <imp-def> and <imp-kill> operands when dealing with subregister indices.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103931 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoNow that we don't keep live registers across calls, there is not reason to go
Jakob Stoklund Olesen [Mon, 17 May 2010 02:49:18 +0000 (02:49 +0000)]
Now that we don't keep live registers across calls, there is not reason to go
through the very long list of call-clobbered registers. We just assume all
registers are clobbered.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103930 91177308-0d34-0410-b5e6-96231b3b80d8

14 years agoBoldly attempt consistent capitalization. Functional changes unintended.
Jakob Stoklund Olesen [Mon, 17 May 2010 02:49:15 +0000 (02:49 +0000)]
Boldly attempt consistent capitalization. Functional changes unintended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103929 91177308-0d34-0410-b5e6-96231b3b80d8