Chad Rosier [Mon, 17 Dec 2012 22:35:29 +0000 (22:35 +0000)]
[arm fast-isel] Minor cleanup. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170379
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Nick Kledzik [Mon, 17 Dec 2012 22:11:17 +0000 (22:11 +0000)]
Fix some integer constant warnings by using a suffix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170376
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Chandler Carruth [Mon, 17 Dec 2012 21:44:50 +0000 (21:44 +0000)]
Add a triple to this test -- it has to be an ELF platform...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170374
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Chandler Carruth [Mon, 17 Dec 2012 21:32:42 +0000 (21:32 +0000)]
Prepare LLVM to fix PR14625, exposing a hook in MCContext to manage the
compilation directory.
This defaults to the current working directory, just as it always has,
but now an assembler can choose to override it with a custom directory.
I've taught llvm-mc about this option and added a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170371
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Nick Kledzik [Mon, 17 Dec 2012 20:43:53 +0000 (20:43 +0000)]
re-enable test cases now that traits work with g++. Fix some g++ warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170369
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Michael Ilseman [Mon, 17 Dec 2012 20:40:14 +0000 (20:40 +0000)]
Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170368
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Michael Ilseman [Mon, 17 Dec 2012 20:37:55 +0000 (20:37 +0000)]
Removed trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170367
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Chad Rosier [Mon, 17 Dec 2012 19:59:43 +0000 (19:59 +0000)]
[arm fast-isel] Fast-isel only handles simple VTs, so make sure the necessary
checks are in place. Some minor cleanup as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170360
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Nick Kledzik [Mon, 17 Dec 2012 19:02:05 +0000 (19:02 +0000)]
Use different trait techniques to be compatible with g++
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170355
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Chandler Carruth [Mon, 17 Dec 2012 18:48:07 +0000 (18:48 +0000)]
Fix another SROA crasher, PR14601.
This was a silly oversight, we weren't pruning allocas which were used
by variable-length memory intrinsics from the set that could be widened
and promoted as integers. Fix that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170353
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Tim Northover [Mon, 17 Dec 2012 17:59:35 +0000 (17:59 +0000)]
Query section for whether it should be executable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170350
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Tim Northover [Mon, 17 Dec 2012 17:59:32 +0000 (17:59 +0000)]
Teach MachO which sections contain code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170349
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Evgeniy Stepanov [Mon, 17 Dec 2012 16:30:05 +0000 (16:30 +0000)]
[msan] Fix lint warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170347
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Richard Osborne [Mon, 17 Dec 2012 16:28:02 +0000 (16:28 +0000)]
Add instruction encodings / disassembly support for l2r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170345
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Tom Stellard [Mon, 17 Dec 2012 15:14:56 +0000 (15:14 +0000)]
R600: enable S_*N2_* instructions
They seem to work fine.
Patch by: Christian König
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170343
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Tom Stellard [Mon, 17 Dec 2012 15:14:54 +0000 (15:14 +0000)]
R600: BB operand support for SI
Patch by: Christian König
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170342
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Tom Stellard [Mon, 17 Dec 2012 15:14:53 +0000 (15:14 +0000)]
R600: remove nonsense setPrefLoopAlignment
The Align parameter is a power of two, so 16 results in 64K
alignment. Additional to that even 16 byte alignment doesn't
make any sense, so just remove it.
Patch by: Christian König
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170341
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Chandler Carruth [Mon, 17 Dec 2012 14:51:24 +0000 (14:51 +0000)]
Teach the rewriting of memcpy calls to support subvector copies.
This also cleans up a bit of the memcpy call rewriting by sinking some
irrelevant code further down and making the call-emitting code a bit
more concrete.
Previously, memcpy of a subvector would actually miscompile (!!!) the
copy into a single vector element copy. I have no idea how this ever
worked. =/ This is the memcpy half of PR14478 which we probably weren't
noticing previously because it didn't actually assert.
The rewrite relies on the newly refactored insert- and extractVector
functions to do the heavy lifting, and those are the same as used for
loads and stores which makes the test coverage a bit more meaningful
here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170338
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Patrik Hagglund [Mon, 17 Dec 2012 14:30:06 +0000 (14:30 +0000)]
Revert/correct some FastISel changes in r170104 (EVT->MVT for
TargetLowering::getRegClassFor).
Some isSimple() guards were missing, or getSimpleVT() were hoisted too
far, resulting in asserts on valid LLVM assembly input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170336
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Evgeniy Stepanov [Mon, 17 Dec 2012 14:28:00 +0000 (14:28 +0000)]
Optimize tree walking in markAliveBlocks.
Check whether a BB is known as reachable before adding it to the worklist.
This way BB's with multiple predecessors are added to the list no more than
once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170335
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Richard Osborne [Mon, 17 Dec 2012 14:23:54 +0000 (14:23 +0000)]
Add instruction encodings for PEEK and ENDIN.
Previously these were marked with the wrong format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170334
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Chandler Carruth [Mon, 17 Dec 2012 14:03:01 +0000 (14:03 +0000)]
Fix a secondary bug I introduced while fixing the first part of PR14478.
The first half of fixing this bug was actually in r170328, but was
entirely coincidental. It did however get me to realize the nature of
the bug, and adapt the test case to test more interesting behavior. In
turn, that uncovered the rest of the bug which I've fixed here.
This should fix two new asserts that showed up in the vectorize nightly
tester.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170333
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Richard Osborne [Mon, 17 Dec 2012 13:55:49 +0000 (13:55 +0000)]
Fix parameter name in prototypes in XCoreDisassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170332
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Chandler Carruth [Mon, 17 Dec 2012 13:51:03 +0000 (13:51 +0000)]
Hoist a convertValue call to the two paths where it is needed.
I noticed this while looking at r170328. We only ever do a vector
rewrite when the alloca *is* the vector type, so it's good to not paper
over bugs here by doing a convertValue that isn't needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170331
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Richard Osborne [Mon, 17 Dec 2012 13:50:04 +0000 (13:50 +0000)]
Add instruction encodings / disassembly support for rus instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170330
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Chandler Carruth [Mon, 17 Dec 2012 13:41:21 +0000 (13:41 +0000)]
Hoist the insertVector helper to be a static helper.
This will allow its use inside of memcpy rewriting as well. This routine
is more complex than extractVector, and some of its uses are not 100%
where I want them to be so there is still some work to do here.
While this can technically change the output in some cases, it shouldn't
be a change that matters -- IE, it can leave some dead code lying around
that prior versions did not, etc.
Yet another step in the refactorings leading up to the solution to the
last component of PR14478.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170328
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Richard Osborne [Mon, 17 Dec 2012 13:20:37 +0000 (13:20 +0000)]
Add instruction encodings for ZEXT and SEXT.
Previously these were marked with the wrong format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170327
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Chandler Carruth [Mon, 17 Dec 2012 13:07:30 +0000 (13:07 +0000)]
Lift the extractVector helper all the way out to a static helper function.
The method helpers all implicitly act upon the alloca, and what we
really want is a fully generic helper. Doing memcpy rewrites is more
special than all other rewrites because we are at times rewriting
instructions which touch pointers *other* than the alloca. As
a consequence all of the helpers needed by memcpy rewriting of
sub-vector copies will need to be generalized fully.
Note that all of these helpers ({insert,extract}{Integer,Vector}) are
woefully uncommented. I'm going to go back through and document them
once I get the factoring correct.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170325
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Chandler Carruth [Mon, 17 Dec 2012 12:50:21 +0000 (12:50 +0000)]
Factor the vector load rewriting into a more generic form.
This makes it suitable for use in rewriting memcpy in the presence of
subvector memcpy intrinsics.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170324
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Richard Osborne [Mon, 17 Dec 2012 12:29:31 +0000 (12:29 +0000)]
Add instruction encodings / disassembly support for 2r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170323
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Richard Osborne [Mon, 17 Dec 2012 12:26:29 +0000 (12:26 +0000)]
Add instruction encodings / disassembly support for 0r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170322
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Richard Osborne [Mon, 17 Dec 2012 12:13:46 +0000 (12:13 +0000)]
Simplify assertion in XCoreInstPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170321
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Richard Osborne [Mon, 17 Dec 2012 12:13:41 +0000 (12:13 +0000)]
Update comments to match recommended doxygen style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170320
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Richard Osborne [Mon, 17 Dec 2012 12:13:32 +0000 (12:13 +0000)]
Remove unnecessary include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170319
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Duncan Sands [Mon, 17 Dec 2012 12:02:36 +0000 (12:02 +0000)]
Fix typo that results in new landing pads not getting a name, fixing PR14617.
Patch by Chris Toshok.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170318
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Duncan Sands [Mon, 17 Dec 2012 11:43:15 +0000 (11:43 +0000)]
Fix comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170317
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Craig Topper [Mon, 17 Dec 2012 06:13:48 +0000 (06:13 +0000)]
Remove EFLAGS from the BLSI/BLSMSK/BLSR patterns. The nodes created by DAG combine don't contain an EFLAGS def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170308
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Craig Topper [Mon, 17 Dec 2012 05:12:30 +0000 (05:12 +0000)]
Simplify BMI ANDN matching to use patterns instead of a DAG combine. Also add ANDN to isDefConvertible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170305
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Craig Topper [Mon, 17 Dec 2012 05:02:29 +0000 (05:02 +0000)]
Add rest of BMI/BMI2 instructions to the folding tables as well as popcnt and lzcnt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170304
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Craig Topper [Mon, 17 Dec 2012 04:55:07 +0000 (04:55 +0000)]
Remove store forms of DEC/INC from isDefConvertible. Since they are stores they don't have a register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170303
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Chandler Carruth [Mon, 17 Dec 2012 04:07:37 +0000 (04:07 +0000)]
Fix the first part of PR14478: memset now works.
PR14478 highlights a serious problem in SROA that simply wasn't being
exercised due to a lack of vector input code mixed with C-library
function calls. Part of SROA was written carefully to handle subvector
accesses via memset and memcpy, but the rewriter never grew support for
this. Fixing it required refactoring the subvector access code in other
parts of SROA so it could be shared, and then fixing the splat formation
logic and using subvector insertion (this patch).
The PR isn't quite fixed yet, as memcpy is still broken in the same way.
I'm starting on that series of patches now.
Hopefully this will be enough to bring the bullet benchmark back to life
with the bb-vectorizer enabled, but that may require fixing memcpy as
well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170301
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Chandler Carruth [Mon, 17 Dec 2012 04:07:35 +0000 (04:07 +0000)]
Extract the logic for inserting a subvector into a vector alloca.
No functionality changed. Another step of refactoring toward solving
PR14487.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170300
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Chandler Carruth [Mon, 17 Dec 2012 04:07:30 +0000 (04:07 +0000)]
Lift the integer splat computation into a helper function.
No functionality changed. Refactoring leading up to the fix for PR14478
which requires some significant changes to the memset and memcpy
rewriting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170299
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Craig Topper [Mon, 17 Dec 2012 03:56:00 +0000 (03:56 +0000)]
Add debug prints for when optimizeLoadInstr folds a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170298
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Richard Osborne [Sun, 16 Dec 2012 18:06:30 +0000 (18:06 +0000)]
Add tests for disassembly of 1r XCore instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170295
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Richard Osborne [Sun, 16 Dec 2012 17:37:34 +0000 (17:37 +0000)]
Add instruction encodings and disassembly for 1r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170293
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Richard Osborne [Sun, 16 Dec 2012 17:29:14 +0000 (17:29 +0000)]
Add XCore disassembler.
Currently there is no instruction encoding info and
XCoreDisassembler::getInstruction() always returns Fail. I intend to add
instruction encodings and tests in follow on commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170292
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Richard Osborne [Sun, 16 Dec 2012 16:46:31 +0000 (16:46 +0000)]
Remove invalid instruction encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170291
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Richard Osborne [Sun, 16 Dec 2012 16:46:28 +0000 (16:46 +0000)]
Mark anything deriving from PseudoInstXCore as a pseudo instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170290
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Richard Osborne [Sun, 16 Dec 2012 16:46:24 +0000 (16:46 +0000)]
Set instruction size correctly in XCoreInstrFormats.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170289
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Richard Osborne [Sun, 16 Dec 2012 16:20:48 +0000 (16:20 +0000)]
Change XCoreAsmPrinter to lower MachineInstrs to MCInsts before emission.
This change adds XCoreMCInstLower to do the lowering to MCInst and
XCoreInstPrinter to print the MCInsts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170288
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Richard Osborne [Sun, 16 Dec 2012 15:59:02 +0000 (15:59 +0000)]
Replace ${:comment} with the comment symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170286
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Dmitri Gribenko [Sun, 16 Dec 2012 12:57:36 +0000 (12:57 +0000)]
Declare class DwarfDebug before use instead of relying on a forward declaration
from some other unrelated header.
Patch by Kai.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170284
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NAKAMURA Takumi [Sun, 16 Dec 2012 04:23:20 +0000 (04:23 +0000)]
MCPureStreamer.cpp: Try to fix build, pruning EmitDebugLabel().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170280
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Reed Kotler [Sun, 16 Dec 2012 04:00:45 +0000 (04:00 +0000)]
This patch is needed to make c++ exceptions work for mips16.
Mips16 is really a processor decoding mode (ala thumb 1) and in the same
program, mips16 and mips32 functions can exist and can call each other.
If a jal type instruction encounters an address with the lower bit set, then
the processor switches to mips16 mode (if it is not already in it). If the
lower bit is not set, then it switches to mips32 mode.
The linker knows which functions are mips16 and which are mips32.
When relocation is performed on code labels, this lower order bit is
set if the code label is a mips16 code label.
In general this works just fine, however when creating exception handling
tables and dwarf, there are cases where you don't want this lower order
bit added in.
This has been traditionally distinguished in gas assembly source by using a
different syntax for the label.
lab1: ; this will cause the lower order bit to be added
lab2=. ; this will not cause the lower order bit to be added
In some cases, it does not matter because in dwarf and debug tables
the difference of two labels is used and in that case the lower order
bits subtract each other out.
To fix this, I have added to mcstreamer the notion of a debuglabel.
The default is for label and debug label to be the same. So calling
EmitLabel and EmitDebugLabel produce the same result.
For various reasons, there is only one set of labels that needs to be
modified for the mips exceptions to work. These are the "$eh_func_beginXXX"
labels.
Mips overrides the debug label suffix from ":" to "=." .
This initial patch fixes exceptions. More changes most likely
will be needed to DwarfCFException to make all of this work
for actual debugging. These changes will be to emit debug labels in some
places where a simple label is emitted now.
Some historical discussion on this from gcc can be found at:
http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html
http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170279
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Benjamin Kramer [Sat, 15 Dec 2012 16:47:44 +0000 (16:47 +0000)]
X86: Add a couple of target-specific dag combines that turn VSELECTS into psubus if possible.
We match the pattern "x >= y ? x-y : 0" into "subus x, y" and two special cases
if y is a constant. DAGCombiner canonicalizes those so we first have to undo the
canonicalization for those cases. The pattern occurs in gzip when the loop
vectorizer is enabled. Part of PR14613.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170273
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Chandler Carruth [Sat, 15 Dec 2012 09:31:54 +0000 (09:31 +0000)]
Add a corollary test for PR14572. We got this code path correct already.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170271
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Chandler Carruth [Sat, 15 Dec 2012 09:26:06 +0000 (09:26 +0000)]
Relax an overly aggressive assert to fix PR14572.
The alloca width is based on the alloc size, not the type size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170270
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Chandler Carruth [Sat, 15 Dec 2012 09:01:13 +0000 (09:01 +0000)]
Make '-mtune=x86_64' assume fast unaligned memory accesses.
Not all chips targeted by x86_64 have this feature, but a dramatically
increasing number do. Specifying a chip-specific tuning parameter will
continue to turn the feature on or off as appropriate for that
particular chip, but the generic flag should try to achieve the best
performance on the most widely available hardware. Today, the number of
chips with fast UA access dwarfs those without in the x86-64 space.
Note that this also brings LLVM's code generation for this '-march' flag
more in line with that of modern GCCs. Reviewed by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170269
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Chandler Carruth [Sat, 15 Dec 2012 08:56:20 +0000 (08:56 +0000)]
Actually update the grammar of this sentence to reflect the removal of CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170268
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NAKAMURA Takumi [Sat, 15 Dec 2012 06:11:13 +0000 (06:11 +0000)]
Revert r170246, "Enable the loop vectorizer by default."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170267
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Reed Kotler [Sat, 15 Dec 2012 00:20:05 +0000 (00:20 +0000)]
This code implements most of mips16 hardfloat as it is done by gcc.
In this case, essentially it is soft float with different library routines.
The next step will be to make this fully interoperational with mips32 floating
point and that requires creating stubs for functions with signatures that
contain floating point types.
I have a more sophisticated design for mips16 hardfloat which I hope to
implement at a later time that directly does floating point without the need
for function calls.
The mips16 encoding has no floating point instructions so one needs to
switch to mips32 mode to execute floating point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170259
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Eric Christopher [Sat, 15 Dec 2012 00:04:07 +0000 (00:04 +0000)]
To simplify some code move the unit emission into the holders.
Make emitDIE public accordingly. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170258
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Eric Christopher [Sat, 15 Dec 2012 00:04:04 +0000 (00:04 +0000)]
Use begin and end label names from the section for info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170257
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Kevin Enderby [Fri, 14 Dec 2012 23:04:25 +0000 (23:04 +0000)]
Make sure the alternate PC+imm syntax of LDR instruction with a small
immediate generates the narrow version. Needed when doing round-trip
assemble/disassemble testing using the alternate syntax that specifies
'pc' directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170255
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Michael Ilseman [Fri, 14 Dec 2012 22:08:26 +0000 (22:08 +0000)]
Add back FoldOpIntoPhi optimizations with fix. Included test cases to help catch these errors and to test the presence of the optimization itself
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170248
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Nadav Rotem [Fri, 14 Dec 2012 21:30:23 +0000 (21:30 +0000)]
Enable the loop vectorizer by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170246
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Nadav Rotem [Fri, 14 Dec 2012 21:20:37 +0000 (21:20 +0000)]
TypeLegalizer: Do not generate target specific nodes with illegal types, because we cant type-legalize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170245
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Duncan Sands [Fri, 14 Dec 2012 21:10:59 +0000 (21:10 +0000)]
Release notes for dragonegg 3.2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170243
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Nadav Rotem [Fri, 14 Dec 2012 20:43:49 +0000 (20:43 +0000)]
Fix a crash in ValueTracking on vectors of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170240
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Bill Schmidt [Fri, 14 Dec 2012 20:28:38 +0000 (20:28 +0000)]
This patch removes some nondeterminism from direct object file output
for TLS dynamic models on 64-bit PowerPC ELF. The default sort routine
for relocations only sorts on the r_offset field; but with TLS, there
can be two relocations with the same r_offset. For PowerPC, this patch
sorts secondarily on descending r_type, which matches the behavior
expected by the linker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170237
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Pedro Artigas [Fri, 14 Dec 2012 18:52:11 +0000 (18:52 +0000)]
Add more reset methods to make all objects that the backend may use for outputting code have a reset, some are not used but were declared for completeness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170227
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Shuxin Yang [Fri, 14 Dec 2012 18:46:06 +0000 (18:46 +0000)]
rdar://
12753946
Implement rule : "x * (select cond 1.0, 0.0) -> select cond x, 0.0"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170226
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NAKAMURA Takumi [Fri, 14 Dec 2012 18:30:20 +0000 (18:30 +0000)]
[CMake] Move libxml2 stuff from clang to llvm/cmake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170225
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Bill Schmidt [Fri, 14 Dec 2012 17:02:38 +0000 (17:02 +0000)]
This patch improves the 64-bit PowerPC InitialExec TLS support by providing
for a wider range of GOT entries that can hold thread-relative offsets.
This matches the behavior of GCC, which was not documented in the PPC64 TLS
ABI. The ABI will be updated with the new code sequence.
Former sequence:
ld 9,x@got@tprel(2)
add 9,9,x@tls
New sequence:
addis 9,2,x@got@tprel@ha
ld 9,x@got@tprel@l(9)
add 9,9,x@tls
Note that a linker optimization exists to transform the new sequence into
the shorter sequence when appropriate, by replacing the addis with a nop
and modifying the base register and relocation type of the ld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170209
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Evgeniy Stepanov [Fri, 14 Dec 2012 13:48:31 +0000 (13:48 +0000)]
Fix lint warnings in MemorySanitizer.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170203
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Chandler Carruth [Fri, 14 Dec 2012 13:44:05 +0000 (13:44 +0000)]
The CellSPU backend is more than experimental, it's dead now...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170201
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Chandler Carruth [Fri, 14 Dec 2012 13:43:59 +0000 (13:43 +0000)]
Remove a section that was in 3.1's notes.
Just give a shout if this was actually still important....
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170200
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Evgeniy Stepanov [Fri, 14 Dec 2012 13:43:11 +0000 (13:43 +0000)]
[msan] Origin stores and loads do not need explicit alignment.
Origin address is always 4 byte aligned, and the access type is always i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170199
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Chandler Carruth [Fri, 14 Dec 2012 13:41:02 +0000 (13:41 +0000)]
Remove several entries from the 3.2 release notes that were in the 3.1
release notes already. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170198
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Chandler Carruth [Fri, 14 Dec 2012 13:37:18 +0000 (13:37 +0000)]
Fix the order of these sections of the release notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170197
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Chandler Carruth [Fri, 14 Dec 2012 13:37:17 +0000 (13:37 +0000)]
Add a rough draft of some content about the new SROA. I'll try to proof
read this and clean it up tomorrow, but hopefully it's a good
placeholder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170196
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Chandler Carruth [Fri, 14 Dec 2012 13:37:12 +0000 (13:37 +0000)]
Delete a long-stale "if its ready" comment. All indications is that this
will look a bit different when we have time to get it ready to turn on,
and we won't likely need this reminder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170195
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Chandler Carruth [Fri, 14 Dec 2012 13:22:57 +0000 (13:22 +0000)]
Provide some actual highlight bullets for Clang.
If anyone has better highlights (I'm obviously biased by the things that
I'm excited about) jump in and add them!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170194
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Evgeniy Stepanov [Fri, 14 Dec 2012 12:54:18 +0000 (12:54 +0000)]
[msan] Refactor default shadow propagation and origin tracking.
This change moves the code for default shadow propagaition (handleShadowOr)
and origin tracking (setOriginForNaryOp) into a new builder-like class. Also
gets rid of handleShadowOrBinary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170192
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Patrik Hagglund [Fri, 14 Dec 2012 09:05:13 +0000 (09:05 +0000)]
Change TargetLowering::getLoadExtAction to take an MVT, instead of
EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170183
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Nadav Rotem [Fri, 14 Dec 2012 01:57:00 +0000 (01:57 +0000)]
revert r170166 - disable the loop vectorizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170172
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Nadav Rotem [Fri, 14 Dec 2012 00:30:34 +0000 (00:30 +0000)]
Enable the loop vectorizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170166
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Nadav Rotem [Fri, 14 Dec 2012 00:02:07 +0000 (00:02 +0000)]
Disable the loop vectorizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170162
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Jakob Stoklund Olesen [Thu, 13 Dec 2012 23:23:46 +0000 (23:23 +0000)]
Use the new MI bundling API in MachineInstrBundle itself.
The new API is higher level than just manipulating the bundle flags
directly, and the setIsInsideBundle() function will disappear soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170159
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Shuxin Yang [Thu, 13 Dec 2012 23:16:19 +0000 (23:16 +0000)]
Remove two popcount patterns which we are already able to recognize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170158
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Nadav Rotem [Thu, 13 Dec 2012 23:11:54 +0000 (23:11 +0000)]
Enable the Loop Vectorizer by default for O2 and O3. Disable if-conversion by default. I plan to revert this patch later today.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170157
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David Blaikie [Thu, 13 Dec 2012 22:43:07 +0000 (22:43 +0000)]
Debug Info: add support to mark member variables as artificial
This is the LLVM portion of r170154.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170156
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Chris Lattner [Thu, 13 Dec 2012 22:34:43 +0000 (22:34 +0000)]
fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170155
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Bill Schmidt [Thu, 13 Dec 2012 20:57:10 +0000 (20:57 +0000)]
This is another cleanup patch for 64-bit PowerPC TLS processing. I had
some hackery in place that hid my poor use of TblGen, which I've now sorted
out and cleaned up. No change in observable behavior, so no new test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170149
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Patrik Hagglund [Thu, 13 Dec 2012 20:42:43 +0000 (20:42 +0000)]
Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170148
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Sean Silva [Thu, 13 Dec 2012 20:14:25 +0000 (20:14 +0000)]
docs: Improve discussion of syntax highlighting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170145
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Dmitri Gribenko [Thu, 13 Dec 2012 20:02:11 +0000 (20:02 +0000)]
Documentation: CompilerWriterInfo.rst: update link to Intel documentation
Replaces old Pentium 4 documentation link with generic current documentation link.
Patch by Kevin Schoedel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170144
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Tom Stellard [Thu, 13 Dec 2012 19:38:52 +0000 (19:38 +0000)]
Fix warnings with -DNDEBUG
Patch by: NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170142
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Bill Schmidt [Thu, 13 Dec 2012 18:45:54 +0000 (18:45 +0000)]
This is just a clean-up patch that simplifies the initial-exec TLS logic by
avoiding use of machine operand flags. No change in observable behavior, so
no new test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170141
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