oota-llvm.git
11 years agoPut HasAVX512 predicate on some patterns to properly disable them when AVX512 isn...
Craig Topper [Fri, 27 Sep 2013 07:20:47 +0000 (07:20 +0000)]
Put HasAVX512 predicate on some patterns to properly disable them when AVX512 isn't enabled. Currently it works simply because the SSE and AVX version of the same patterns are checked first in the DAG isel table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191490 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSwitch HasAVX to UseAVX in one spot to ensure that AVX512 form of VINSERTPS is used...
Craig Topper [Fri, 27 Sep 2013 07:16:24 +0000 (07:16 +0000)]
Switch HasAVX to UseAVX in one spot to ensure that AVX512 form of VINSERTPS is used in AVX512 mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191489 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemoval some duplicate patterns.
Craig Topper [Fri, 27 Sep 2013 07:11:17 +0000 (07:11 +0000)]
Removal some duplicate patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191488 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixing Intel format of the vshufpd instruction.
Yunzhong Gao [Fri, 27 Sep 2013 01:44:23 +0000 (01:44 +0000)]
Fixing Intel format of the vshufpd instruction.
Phabricator code review is located at: http://llvm-reviews.chandlerc.com/D1759

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191481 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert "llvm-objdump: Dump COFF import table if -private-headers option is given."
Rui Ueyama [Fri, 27 Sep 2013 01:29:36 +0000 (01:29 +0000)]
Revert "llvm-objdump: Dump COFF import table if -private-headers option is given."

This reverts commit r191472 because it's failing on BE machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191480 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix another -Wnon-pod-varargs error in r191472.
Rui Ueyama [Fri, 27 Sep 2013 00:53:07 +0000 (00:53 +0000)]
Fix another -Wnon-pod-varargs error in r191472.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191474 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix -Wnon-pod-varargs error in r191472.
Rui Ueyama [Fri, 27 Sep 2013 00:20:53 +0000 (00:20 +0000)]
Fix -Wnon-pod-varargs error in r191472.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191473 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm-objdump: Dump COFF import table if -private-headers option is given.
Rui Ueyama [Fri, 27 Sep 2013 00:07:01 +0000 (00:07 +0000)]
llvm-objdump: Dump COFF import table if -private-headers option is given.

This is a patch to add capability to llvm-objdump to dump COFF Import Table
entries, so that we can write tests for LLD checking Import Table contents.

llvm-objdump did not print anything but just file name if the format is COFF
and -private-headers option is given. This is a patch adds capability for
dumping DLL Import Table, which is specific to the COFF format.

In this patch I defined a new iterator to iterate over import table entries.
Also added a few functions to COFFObjectFile.cpp to access fields of the entry.

Differential Revision: http://llvm-reviews.chandlerc.com/D1719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191472 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMCParser/Debug info: Accept line number 0 as a legitimate value, since
Adrian Prantl [Thu, 26 Sep 2013 23:37:11 +0000 (23:37 +0000)]
MCParser/Debug info: Accept line number 0 as a legitimate value, since
CFE produces it to indicate artificial locations.
c.f.: DWARF standard, Table 6.2:
line -- An unsigned integer indicating a source line number. Lines are numbered beginning at 1. The compiler may emit the value 0 in cases where an instruction cannot be attributed to any source line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191471 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Direct Object Emission for 3RF instructions.
Jack Carter [Thu, 26 Sep 2013 21:31:43 +0000 (21:31 +0000)]
[mips][msa] Direct Object Emission for 3RF instructions.

Patch by Matheus Almeida

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191461 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Updates encoding of 3RF instructions to match the latest revision of...
Jack Carter [Thu, 26 Sep 2013 21:18:57 +0000 (21:18 +0000)]
[mips][msa] Updates encoding of 3RF instructions to match the latest revision of the MSA spec (1.06).

This does not affect any of the existing output.

Patch by Matheus Almeida

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191460 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix PR 17372: Emitting PLD for stack address for ARM Thumb2
Weiming Zhao [Thu, 26 Sep 2013 17:25:10 +0000 (17:25 +0000)]
Fix PR 17372: Emitting PLD for stack address for ARM Thumb2

t2PLDi12, t2PLDi8, t2PLDs was omitted in Thumb2InstrInfo.
This patch fixes it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191441 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Fix PR17354: Generate nop after local calls for PIC code.
Bill Schmidt [Thu, 26 Sep 2013 17:09:28 +0000 (17:09 +0000)]
[PowerPC] Fix PR17354: Generate nop after local calls for PIC code.

When generating code for shared libraries, even local calls may be
intercepted, so we need a nop after the call for the linker to fix up the
TOC.  Test case adapted from the one provided in PR17354.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191440 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r191393 since it caused pr17380.
Andrea Di Biagio [Thu, 26 Sep 2013 16:54:01 +0000 (16:54 +0000)]
Revert r191393 since it caused pr17380.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191438 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Sparc] Implements exception handling in SPARC with DwarfCFI.
Venkatraman Govindaraju [Thu, 26 Sep 2013 15:11:00 +0000 (15:11 +0000)]
[Sparc] Implements exception handling in SPARC with DwarfCFI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191432 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplements parsing and emitting of .cfi_window_save in MC.
Venkatraman Govindaraju [Thu, 26 Sep 2013 14:49:40 +0000 (14:49 +0000)]
Implements parsing and emitting of .cfi_window_save in MC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191431 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[ARM] Use the load-acquire/store-release instructions optimally in AArch32.
Amara Emerson [Thu, 26 Sep 2013 12:22:36 +0000 (12:22 +0000)]
[ARM] Use the load-acquire/store-release instructions optimally in AArch32.

Patch by Artyom Skrobov.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191428 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC: Allow partial fills in writeNopData()
David Majnemer [Thu, 26 Sep 2013 09:18:48 +0000 (09:18 +0000)]
PPC: Allow partial fills in writeNopData()

When asked to pad an irregular number of bytes, we should fill with
zeros.  This is consistent with the behavior specified in the AIX
Assembler Language Reference as well as other LLVM and binutils
assemblers.

N.B. There is a small deviation from binutils' PPC assembler:
when handling pads which are greater than 4 bytes but not mod 4,
binutils will not emit any NOP sequences at all and only use zeros.
This may or may not be a bug but there is no excellent rationale as to
why that behavior is important to emulate.  If that behavior is needed,
we can change writeNopData() to behave in the same way.

This fixes PR17352.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191426 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd links to cross-compilation docs from getting started
Renato Golin [Thu, 26 Sep 2013 08:57:07 +0000 (08:57 +0000)]
Add links to cross-compilation docs from getting started

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191425 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdded temp flag -misched-bench for staging in default changes.
Andrew Trick [Thu, 26 Sep 2013 05:53:35 +0000 (05:53 +0000)]
Added temp flag -misched-bench for staging in default changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191423 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agowhitespace
Andrew Trick [Thu, 26 Sep 2013 05:53:31 +0000 (05:53 +0000)]
whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191422 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC: Do not introduce ISD nodes for fctid and fctiw
David Majnemer [Thu, 26 Sep 2013 05:22:11 +0000 (05:22 +0000)]
PPC: Do not introduce ISD nodes for fctid and fctiw

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191421 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC: Add support for fctid and fctiw
David Majnemer [Thu, 26 Sep 2013 04:11:24 +0000 (04:11 +0000)]
PPC: Add support for fctid and fctiw

Encodings were checked against the Power ISA documents and double
checked against binutils.

This fixes PR17350.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191419 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Direct Object Emission for 3R instructions.
Jack Carter [Thu, 26 Sep 2013 00:09:46 +0000 (00:09 +0000)]
[mips][msa] Direct Object Emission for 3R instructions.

This is the first set of instructions with a ".b" modifier thus we need to add the required code to disassemble a MSA128B register class.

Patch by Matheus Almeida

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191415 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Updates encoding of 3R instructions to match the latest revision of the...
Jack Carter [Thu, 26 Sep 2013 00:02:44 +0000 (00:02 +0000)]
[mips][msa] Updates encoding of 3R instructions to match the latest revision of the MSA spec (1.06).

Internal changes only.

Patch by Matheus Almeida

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191414 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Direct Object Emission for 2RF instructions.
Jack Carter [Wed, 25 Sep 2013 23:56:25 +0000 (23:56 +0000)]
[mips][msa] Direct Object Emission for 2RF instructions.

Patch by Matheus Almeida

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191413 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Direct Object Emission support for the MSA instruction set.
Jack Carter [Wed, 25 Sep 2013 23:50:44 +0000 (23:50 +0000)]
[mips][msa] Direct Object Emission support for the MSA instruction set.

In more detail, this patch adds the ability to parse, encode and decode MSA registers ($w0-$w31). The format of 2RF instructions (MipsMSAInstrFormat.td) was updated so that we could attach a test case to this patch i.e., the test case parses, encodes and decodes 2 MSA instructions. Following patches will add the remainder of the instructions.

Note that DecodeMSA128BRegisterClass is missing from MipsDisassembler.td because it's not yet required at this stage and having it would cause a compiler warning (unused function).

Patch by Matheus Almeida

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191412 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Updates encoding of 2RF instructions to match the latest revision of...
Jack Carter [Wed, 25 Sep 2013 23:42:03 +0000 (23:42 +0000)]
[mips][msa] Updates encoding of 2RF instructions to match the latest revision of the MSA spec (1.06).

This only changes internal encodings and doesn't affect output.

Patch by Matheus Almeida

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191411 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix PR 17368: disable vector mul distribution for square of add/sub for ARM
Weiming Zhao [Wed, 25 Sep 2013 23:12:06 +0000 (23:12 +0000)]
Fix PR 17368: disable vector mul distribution for square of add/sub for ARM

Generally, it is desirable to distribute (a + b) * c to a*c + b*c for
ARM with VMLx forwarding, where a, b and c are vectors.
However, for (a + b)*(a + b), distribution will result in one extra
instruction.
With distribution:
  x = a + b (add)
  y = a * x (mul)
  z = y + b * y (mla)

Without distribution:
  x = a + b (add)
  z = x * x (mul)

This patch checks if a mul is a square of add/sub. If yes, skip
distribution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191410 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd gnu pubsections as options to llvm-dwarfdump.
Eric Christopher [Wed, 25 Sep 2013 23:02:44 +0000 (23:02 +0000)]
Add gnu pubsections as options to llvm-dwarfdump.

Argument spelling feedback welcome.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191409 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDump the normal dwarf pubtypes section as well.
Eric Christopher [Wed, 25 Sep 2013 23:02:41 +0000 (23:02 +0000)]
Dump the normal dwarf pubtypes section as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191408 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUnify pubsection/gnu pubsection printing.
Eric Christopher [Wed, 25 Sep 2013 23:02:36 +0000 (23:02 +0000)]
Unify pubsection/gnu pubsection printing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191407 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTest commit. Removed trailing whitespace.
Josh Magee [Wed, 25 Sep 2013 22:07:48 +0000 (22:07 +0000)]
Test commit.  Removed trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191402 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSlight formatting change for pubnames/pubtypes output.
Eric Christopher [Wed, 25 Sep 2013 21:17:37 +0000 (21:17 +0000)]
Slight formatting change for pubnames/pubtypes output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191401 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a bad typo in the inline assembly code for mips16 pic fp stubs
Reed Kotler [Wed, 25 Sep 2013 20:58:50 +0000 (20:58 +0000)]
Fix a bad typo in the inline assembly code for mips16 pic fp stubs
and make one cosmetic cleanup to make it look the same as gcc
in this area; adjusting test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191400 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach DAGCombiner how to canonicalize dags according to the rule
Andrea Di Biagio [Wed, 25 Sep 2013 19:01:01 +0000 (19:01 +0000)]
Teach DAGCombiner how to canonicalize dags according to the rule
 (shl (zext (shr A, X)), X) => (zext (shl (shr A, X), X)).

The rule only triggers when there are no other uses of the
zext to avoid materializing more instructions.

This helps the DAGCombiner understand that the shl/shr
sequence can then be converted into an and instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191393 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMark the x86 machine model as incomplete. PR17367.
Andrew Trick [Wed, 25 Sep 2013 18:14:12 +0000 (18:14 +0000)]
Mark the x86 machine model as incomplete. PR17367.

Ideally, the machinel model is added at the time the instructions are
defined. But many instructions in X86InstrSSE.td still need a model.

Without this workaround the scheduler asserts because x86 already has
itinerary classes for these instructions, indicating they should be
modeled by the scheduler. Since we use the new machine model for other
instructions, it expects a new machine model for these too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191391 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUndefine NetBSD, it may have been defined by an earlier include of
Joerg Sonnenberger [Wed, 25 Sep 2013 17:49:57 +0000 (17:49 +0000)]
Undefine NetBSD, it may have been defined by an earlier include of
sys/param.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191384 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSet the minimal stack size with msvc when using cmake >= 2.8.11.
Rafael Espindola [Wed, 25 Sep 2013 14:06:55 +0000 (14:06 +0000)]
Set the minimal stack size with msvc when using cmake >= 2.8.11.

This makes sure we get the same behavior with all supported cmake versions. Once
we support only versions >= 2.8.11 we can experiment with other values or just
setting it for some binaries.

Patch by Greg Bedwell.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191372 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSLPVectorize: Put horizontal reductions feeding a store under separate flag
Arnold Schwaighofer [Wed, 25 Sep 2013 14:02:32 +0000 (14:02 +0000)]
SLPVectorize: Put horizontal reductions feeding a store under separate flag

Put them under a separate flag for experimentation. They are more likely to
interfere with loop vectorization which happens later in the pass pipeline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191371 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Define the GR64 low-word logic instructions as pseudo aliases.
Richard Sandiford [Wed, 25 Sep 2013 11:11:53 +0000 (11:11 +0000)]
[SystemZ] Define the GR64 low-word logic instructions as pseudo aliases.

Another patch to avoid duplication of encoding information.  Things like
NILF, NILL and NILH are used as both 32-bit and 64-bit instructions.
Here the 64-bit versions are defined as aliases of the 32-bit ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191369 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC: Add support for treating $ as a reference to the PC
David Majnemer [Wed, 25 Sep 2013 10:47:21 +0000 (10:47 +0000)]
MC: Add support for treating $ as a reference to the PC

The binutils assembler supports a mode called DOLLAR_DOT which treats
the dollar sign token as a reference to the current program counter if
the dollar sign doesn't precede a constant or identifier.

This commit adds a new MCAsmInfo flag stating whether or not a given
target supports this interpretation of the dollar sign token; by
default, this flag is not enabled.

Further, enable this flag for PPC. The system assembler for AIX and
binutils both support using the dollar sign in this manner.

This fixes PR17353.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191368 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Define the call instructions as pseudo aliases.
Richard Sandiford [Wed, 25 Sep 2013 10:37:17 +0000 (10:37 +0000)]
[SystemZ] Define the call instructions as pseudo aliases.

Similar to r191364, but for calls.  This patch also removes the shortening
of BRASL to BRAS within a TU.  Doing that was a bit controversial internally,
since there's a strong expectation with the z assembler that WYWIWYG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191366 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Use subregs for 64-bit truncating stores
Richard Sandiford [Wed, 25 Sep 2013 10:29:47 +0000 (10:29 +0000)]
[SystemZ] Use subregs for 64-bit truncating stores

Another patch to reduce the duplication of encoding information.
Rather than define separate patterns for truncating 64-bit stores,
use the 32-bit stores with a subreg.  No behavioral changed intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191365 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Define the return instruction as a pseudo alias of BR
Richard Sandiford [Wed, 25 Sep 2013 10:20:08 +0000 (10:20 +0000)]
[SystemZ] Define the return instruction as a pseudo alias of BR

This is the first of a few patches to reduce the dupliation of encoding
information.  The return instruction is a normal BR in which one of the
registers is fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191364 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Add instruction-shortening pass
Richard Sandiford [Wed, 25 Sep 2013 10:11:07 +0000 (10:11 +0000)]
[SystemZ] Add instruction-shortening pass

When loading immediates into a GR32, the port prefered LHI, followed by
LLILH or LLILL, followed by IILF.  LHI and IILF are natural 32-bit
operations, but LLILH and LLILL also clear the upper 32 bits of the register.
This was represented as taking a 32-bit subreg of a 64-bit assignment.

Using subregs for something as simple as a move immediate was probably
a bad idea.  Also, I have patches to add support for the high-word facility,
and we don't want something like LLILH and LLILL to stop the high word of
the same GPR from being used.

This patch therefore uses LHI and IILF to begin with and adds a late
machine-specific pass to use LLILH and LLILL if the other half of the
register is not live.  The high-word patches extend this behavior to
IIHF, LLIHL and LLIHH.

No behavioral change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191363 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC: Remove vestigial PCSymbol field from AsmInfo
David Majnemer [Wed, 25 Sep 2013 09:36:11 +0000 (09:36 +0000)]
MC: Remove vestigial PCSymbol field from AsmInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191362 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[msan] Fix -Wreturn-type warnings in non-self-hosted build.
Evgeniy Stepanov [Wed, 25 Sep 2013 08:56:00 +0000 (08:56 +0000)]
[msan] Fix -Wreturn-type warnings in non-self-hosted build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191361 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTry again to fix the MSVC build.
Peter Collingbourne [Wed, 25 Sep 2013 07:52:21 +0000 (07:52 +0000)]
Try again to fix the MSVC build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191359 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoWrap the #include of <stdbool.h> in an #ifndef __cplusplus.
Peter Collingbourne [Wed, 25 Sep 2013 07:11:58 +0000 (07:11 +0000)]
Wrap the #include of <stdbool.h> in an #ifndef __cplusplus.

This should fix the MSVC build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191357 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix doxygen comments to use correct function name.
Craig Topper [Wed, 25 Sep 2013 06:40:22 +0000 (06:40 +0000)]
Fix doxygen comments to use correct function name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191356 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReplace EVT with MVT in CodeGenDAGAPatterns.cpp.
Craig Topper [Wed, 25 Sep 2013 06:37:18 +0000 (06:37 +0000)]
Replace EVT with MVT in CodeGenDAGAPatterns.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191355 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r191350.
Akira Hatanaka [Wed, 25 Sep 2013 00:52:34 +0000 (00:52 +0000)]
Revert r191350.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191353 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Move public functions to the beginning of the class definition.
Akira Hatanaka [Wed, 25 Sep 2013 00:34:42 +0000 (00:34 +0000)]
[mips] Move public functions to the beginning of the class definition.

No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191352 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Define getTargetNode as a template function.
Akira Hatanaka [Wed, 25 Sep 2013 00:30:25 +0000 (00:30 +0000)]
[mips] Define getTargetNode as a template function.

No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191350 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PR16882] Ignore noreturn definitions when setting isPhysRegUsed.
Quentin Colombet [Wed, 25 Sep 2013 00:26:17 +0000 (00:26 +0000)]
[PR16882] Ignore noreturn definitions when setting isPhysRegUsed.

PEI inserts a save/restore sequence for the link register, according to the
information it gets from the MachineRegisterInfo.
MachineRegisterInfo is populated by the VirtRegMap pass.
This pass was not aware of noreturn calls and was registering the definitions of
these calls the same way as regular operations.

Modify VirtRegPass so that it does not set the isPhysRegUsed information for
registers only defined by noreturn calls.
The rational is that a noreturn call is the "last instruction" of the program
(if it returns the behavior is undefined), so everything that is defined by it
cannot be used and will not interfere with anything else. Therefore, it is
pointless to account for then.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191349 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCriticalAntiDepBreaker is no longer needed for armv7 scheduling.
Andrew Trick [Wed, 25 Sep 2013 00:26:16 +0000 (00:26 +0000)]
CriticalAntiDepBreaker is no longer needed for armv7 scheduling.

This is being disabled because it is no longer needed for
performance. It is only used by postRAscheduler which is also planned
for removal, and it is implemented with an out-dated view of register
liveness. It consideres aliases instead of register units, assumes
valid kill flags, and assumes implicit uses on partial register
defs. Kill flags and implicit operands are error prone and impossible
to verify. We should gradually eliminate dependence on them in the
postRA phases.

Targets that still benefit from this should move to the MI
scheduler. If that doesn't solve the problem, then we should add a
hook to regalloc to optimize reload placement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191348 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMachO: Improve backend diagnostic for overalignment.
Jim Grosbach [Tue, 24 Sep 2013 23:56:31 +0000 (23:56 +0000)]
MachO: Improve backend diagnostic for overalignment.

Give the symbol's name and disengage the enchanced crash reporting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191344 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove LTO support library to a component, allowing it to be tested
Peter Collingbourne [Tue, 24 Sep 2013 23:52:22 +0000 (23:52 +0000)]
Move LTO support library to a component, allowing it to be tested
more reliably across platforms.  Patch by Tom Roeder!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191343 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd missing check to SETCC optimization.
Eli Friedman [Tue, 24 Sep 2013 22:50:14 +0000 (22:50 +0000)]
Add missing check to SETCC optimization.

PR17338.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191337 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm-dwarfdump: add missing opening quotation mark lost in r191330
David Blaikie [Tue, 24 Sep 2013 20:23:36 +0000 (20:23 +0000)]
llvm-dwarfdump: add missing opening quotation mark lost in r191330

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191333 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPatch that forces MergeFunctions pass for clang.
Stepan Dyatkovskiy [Tue, 24 Sep 2013 20:06:31 +0000 (20:06 +0000)]
Patch that forces MergeFunctions pass for clang.
It is temporary patch. We need to keep it in trunk, since it makes easer to test it on buildbots on different platforms.
Once we see stable MergeFunctions behaviour with satisfied perfomance, this patch will be removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191331 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm-dwarfdump: re-add field formatting for the entry kind lost in r191329
David Blaikie [Tue, 24 Sep 2013 19:56:27 +0000 (19:56 +0000)]
llvm-dwarfdump: re-add field formatting for the entry kind lost in r191329

CR feedback from Eric Christopher

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191330 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm-dwarfdump support for gnu_pubtypes
David Blaikie [Tue, 24 Sep 2013 19:50:00 +0000 (19:50 +0000)]
llvm-dwarfdump support for gnu_pubtypes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191329 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTest case for r191314.
Yi Jiang [Tue, 24 Sep 2013 19:33:53 +0000 (19:33 +0000)]
Test case for r191314.

Some supplemental information for r191314: We would like to make sure SLP Vectorizer will not try to vectorize tiny trees even with a negative threshold so we set the cost to INT_MAX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191327 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoVerify that we don't optimize null return checks to the nothrow_t version of operator...
Benjamin Kramer [Tue, 24 Sep 2013 18:37:49 +0000 (18:37 +0000)]
Verify that we don't optimize null return checks to the nothrow_t version of operator new.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191325 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdding a feature flag to the llvm backend for x86 TBM instruction set.
Yunzhong Gao [Tue, 24 Sep 2013 18:21:52 +0000 (18:21 +0000)]
Adding a feature flag to the llvm backend for x86 TBM instruction set.
Adding TBM feature to bdver2 processor; piledriver supports this instruction set
according to the following document:
http://developer.amd.com/wordpress/media/2012/10/New-Bulldozer-and-Piledriver-Instructions.pdf

Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1692

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191324 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMemoryBuiltins: Remove posix_memalign from the list and replace it with a TODO.
Benjamin Kramer [Tue, 24 Sep 2013 17:49:08 +0000 (17:49 +0000)]
MemoryBuiltins: Remove posix_memalign from the list and replace it with a TODO.

This code isn't ready to deal with allocation functions where the return is not
the allocated pointer. The checks below will reject posix_memalign anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191319 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake the size and expr arguments of .fill directive optional.
Roman Divacky [Tue, 24 Sep 2013 17:44:41 +0000 (17:44 +0000)]
Make the size and expr arguments of .fill directive optional.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191318 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMemoryBuiltins: Reinstate optimizing (uninitialized) loads from operator new.
Benjamin Kramer [Tue, 24 Sep 2013 17:34:29 +0000 (17:34 +0000)]
MemoryBuiltins: Reinstate optimizing (uninitialized) loads from operator new.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191315 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoset the cost of tiny trees to INT_MAX in SLP vectorizer to disable vectorization...
Yi Jiang [Tue, 24 Sep 2013 17:26:43 +0000 (17:26 +0000)]
set the cost of tiny trees to INT_MAX in SLP vectorizer to disable vectorization on them

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191314 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMemoryBuiltins: Fix operator new bits.
Benjamin Kramer [Tue, 24 Sep 2013 17:15:14 +0000 (17:15 +0000)]
MemoryBuiltins: Fix operator new bits.

We really don't want to optimize malloc return value checks away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191313 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoComment typo.
Andrew Trick [Tue, 24 Sep 2013 17:11:19 +0000 (17:11 +0000)]
Comment typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191312 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach MemoryBuiltins and InstructionSimplify that operator new never returns NULL.
Benjamin Kramer [Tue, 24 Sep 2013 16:37:51 +0000 (16:37 +0000)]
Teach MemoryBuiltins and InstructionSimplify that operator new never returns NULL.

This is safe per C++11 18.6.1.1p3: [operator new returns] a non-null pointer to
suitably aligned storage (3.7.4), or else throw a bad_alloc exception. This
requirement is binding on a replacement version of this function.

Brings us a tiny bit closer to eliminating more vector push_backs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191310 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPush analysis passes to InstSimplify when they're around anyways.
Benjamin Kramer [Tue, 24 Sep 2013 16:37:40 +0000 (16:37 +0000)]
Push analysis passes to InstSimplify when they're around anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191309 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching pckev, and pckod from normal IR (i.e. not...
Daniel Sanders [Tue, 24 Sep 2013 14:53:25 +0000 (14:53 +0000)]
[mips][msa] Added support for matching pckev, and pckod from normal IR (i.e. not intrinsics)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191306 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching ilv[lr], ilvod, and ilvev from normal IR ...
Daniel Sanders [Tue, 24 Sep 2013 14:36:12 +0000 (14:36 +0000)]
[mips][msa] Added support for matching ilv[lr], ilvod, and ilvev from normal IR (i.e. not intrinsics)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191304 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDAGCombiner: Unify rotate matching for extended and unextended amounts.
Benjamin Kramer [Tue, 24 Sep 2013 14:21:28 +0000 (14:21 +0000)]
DAGCombiner: Unify rotate matching for extended and unextended amounts.

No functionality change, lots of indentation changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191303 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics)
Daniel Sanders [Tue, 24 Sep 2013 14:20:00 +0000 (14:20 +0000)]
[mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191302 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching vshf from normal IR (i.e. not intrinsics)
Daniel Sanders [Tue, 24 Sep 2013 14:02:15 +0000 (14:02 +0000)]
[mips][msa] Added support for matching vshf from normal IR (i.e. not intrinsics)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191301 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_VECTOR.
Daniel Sanders [Tue, 24 Sep 2013 13:33:07 +0000 (13:33 +0000)]
[mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_VECTOR.

Most constant BUILD_VECTOR's are matched using ComplexPatterns which cover
bitcasted as well as normal vectors. However, it doesn't seem to be possible to
match ldi.[bhwd] in a type-agnostic manner (e.g. to support the widest range of
immediates, it should be possible to use ldi.b to load v2i64) using TableGen so
ldi.[bhwd] is matched using custom code in MipsSEISelDAGToDAG.cpp

This made the majority of the constant splat BUILD_VECTOR lowering redundant.
The only transformation remaining for constant splats is when an (up-to) 32-bit
constant splat is possible but the value does not fit into a 10-bit signed
integer. In this case, the BUILD_VECTOR is transformed into a bitcasted
BUILD_VECTOR so that fill.[bhw] can be used to splat the vector from a GPR32
register (which is initialized using the usual lui/addui sequence).

There are no additional tests since this is a re-implementation of previous
functionality. The change is intended to make it easier to implement some of
the upcoming instruction selection patches since they can rely on existing
support for BUILD_VECTOR's in the DAGCombiner.

compare_float.ll changed slightly because a BITCAST is no longer
introduced during legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191299 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Non-constant BUILD_VECTOR's should be expanded to INSERT_VECTOR_ELT inste...
Daniel Sanders [Tue, 24 Sep 2013 13:16:15 +0000 (13:16 +0000)]
[mips][msa] Non-constant BUILD_VECTOR's should be expanded to INSERT_VECTOR_ELT instead of memory operations.

The resulting code is the same length, but doesnt cause memory traffic or latency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191297 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added partial support for matching fmax_a from normal IR (i.e. not intrin...
Daniel Sanders [Tue, 24 Sep 2013 13:02:08 +0000 (13:02 +0000)]
[mips][msa] Added partial support for matching fmax_a from normal IR (i.e. not intrinsics)

This covers the case where fmax_a can be used to implement ISD::FABS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191296 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Line wrapping.
Daniel Sanders [Tue, 24 Sep 2013 12:45:36 +0000 (12:45 +0000)]
[mips][msa] Line wrapping.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191295 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching andi, ori, nori, and xori from normal IR ...
Daniel Sanders [Tue, 24 Sep 2013 12:32:47 +0000 (12:32 +0000)]
[mips][msa] Added support for matching andi, ori, nori, and xori from normal IR (i.e. not intrinsics)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191293 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching max, maxi, min, mini from normal IR (i.e....
Daniel Sanders [Tue, 24 Sep 2013 12:18:31 +0000 (12:18 +0000)]
[mips][msa] Added support for matching max, maxi, min, mini from normal IR (i.e. not intrinsics)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191291 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching bsel and bseli from normal IR (i.e. not intrin...
Daniel Sanders [Tue, 24 Sep 2013 12:04:44 +0000 (12:04 +0000)]
[mips][msa] Added support for matching bsel and bseli from normal IR (i.e. not intrinsics)

This required correcting the definition of the bsel and bseli intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191290 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove error output from configure if CFLAGS is set (r174313).
Patrik Hagglund [Tue, 24 Sep 2013 11:38:45 +0000 (11:38 +0000)]
Remove error output from configure if CFLAGS is set (r174313).

This fixes PR16724.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191289 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[msan] Handling of atomic load/store, atomic rmw, cmpxchg.
Evgeniy Stepanov [Tue, 24 Sep 2013 11:20:27 +0000 (11:20 +0000)]
[msan] Handling of atomic load/store, atomic rmw, cmpxchg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191287 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching comparisons from normal IR (i.e. not intrinsics)
Daniel Sanders [Tue, 24 Sep 2013 10:46:19 +0000 (10:46 +0000)]
[mips][msa] Added support for matching comparisons from normal IR (i.e. not intrinsics)

MIPS SelectionDAG changes:
* Added VCEQ, VCL[ET]_[SU] nodes to represent vector comparisons that produce a bitmask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191286 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added support for matching slli, srai, and srli from normal IR (i.e....
Daniel Sanders [Tue, 24 Sep 2013 10:28:18 +0000 (10:28 +0000)]
[mips][msa] Added support for matching slli, srai, and srli from normal IR (i.e. not intrinsics)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191285 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFollowup to r191252.
Bill Wendling [Tue, 24 Sep 2013 07:19:30 +0000 (07:19 +0000)]
Followup to r191252.

Make sure that the code that handles the constant addresses is run for the
GEPs. This just refactors that code and then calls it for the GEPs that are
collected during the iteration.

<rdar://problem/12445434>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191281 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix formatting to match coding standards.
Craig Topper [Tue, 24 Sep 2013 06:21:04 +0000 (06:21 +0000)]
Fix formatting to match coding standards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191280 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach6...
NAKAMURA Takumi [Tue, 24 Sep 2013 04:14:29 +0000 (04:14 +0000)]
llvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach64-pecoff might be misassumed on win32 hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191275 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDWARFTypeUnit::dump(): Use PRIx64 to format uint64_t.
NAKAMURA Takumi [Tue, 24 Sep 2013 03:23:07 +0000 (03:23 +0000)]
DWARFTypeUnit::dump(): Use PRIx64 to format uint64_t.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191266 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoInitial support for Neon scalar instructions.
Jiangning Liu [Tue, 24 Sep 2013 02:47:27 +0000 (02:47 +0000)]
Initial support for Neon scalar instructions.

Patch by Ana Pazos.

1.Added support for v1ix and v1fx types.
2.Added Scalar Pairwise Reduce instructions.
3.Added initial implementation of Scalar Arithmetic instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191263 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Forgot to add in PR number to test case.
Michael Gottesman [Tue, 24 Sep 2013 02:10:55 +0000 (02:10 +0000)]
[stackprotector] Forgot to add in PR number to test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191261 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Allow for copies from vreg -> vreg to be in a terminator sequence.
Michael Gottesman [Tue, 24 Sep 2013 01:50:26 +0000 (01:50 +0000)]
[stackprotector] Allow for copies from vreg -> vreg to be in a terminator sequence.

Sometimes a copy from a vreg -> vreg sneaks into the middle of a terminator
sequence. It is safe to slice this into the stack protector success bb.

This fixes PR16979.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191260 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMisc fixes for cpp backend.
Eli Friedman [Tue, 24 Sep 2013 00:36:09 +0000 (00:36 +0000)]
Misc fixes for cpp backend.

PR17317.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191258 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd namespaces to the list of items that we expose via pubnames.
Eric Christopher [Tue, 24 Sep 2013 00:17:57 +0000 (00:17 +0000)]
Add namespaces to the list of items that we expose via pubnames.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191257 91177308-0d34-0410-b5e6-96231b3b80d8