Programming Languages Research Group: Git

[Statepoints][NFC] Rename variables to llvm style.

Summary:
(I don't think this change needs review, this was uploaded to
phabricator to provide context for later dependent changes.)

Differential Revision: http://reviews.llvm.org/D10630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241233 91177308-0d34-0410-b5e6-96231b3b80d8

[Statepoints][NFC] Add Statepoint::operator bool()

Summary:
This allows the "if (Statepoint SP = Statepoint(I))" idiom.

(I don't think this change needs review, this was uploaded to
phabricator to provide context for later dependent changes.)

Differential Revision: http://reviews.llvm.org/D10629

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241232 91177308-0d34-0410-b5e6-96231b3b80d8

[Statepoints][NFC] Add Statepoint::getGCResult.

Summary:
Introduce a simple accessor to get the gc_result hanging off of a
statepoint.

(I don't think this change needs review, this was uploaded to
phabricator to provide context for later dependent changes.)

Differential Revision: http://reviews.llvm.org/D10627

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241231 91177308-0d34-0410-b5e6-96231b3b80d8

[LazyCallGraph] Port test case from r240039 to LCG.

Summary:
r240039 adds a test case to check that CallGraph does the right thing
with respect to non-leaf intrinsics like statepoint and patchpoint.
This ports the same test case to LazyCallGraph. LazyCallGraph already
does the right thing with respect to escaping function pointers so there
is no need to change any code.

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10582

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241226 91177308-0d34-0410-b5e6-96231b3b80d8

Make an X86 specific directory and put the recent X86 tti specific
inlining test into it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241223 91177308-0d34-0410-b5e6-96231b3b80d8

Implement TargetTransformInfo::hasCompatibleFunctionAttributes for X86.

This checks subtarget feature compatibility for inlining by verifying
that the callee is a strict subset of the caller's features. This includes
the cpu as part of the subtarget we can get via the incoming functions as
the backend takes CPUs as feature sets.

This allows us to inline things like:

int foo() { return baz(); }

int __attribute__((target("sse4.2"))) bar() {
return foo();
}

so that generic code can be inlined into specialized functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241221 91177308-0d34-0410-b5e6-96231b3b80d8

Add a routine to TargetTransformInfo that will allow targets to look
at the attributes on a function to determine whether or not to allow
inlining.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241220 91177308-0d34-0410-b5e6-96231b3b80d8

WebAssembly: start instructions

Summary:
* Add 64-bit address space feature.
* Rename SIMD feature to SIMD128.
* Handle single-thread model with an IR pass (same way ARM does).
* Rename generic processor to MVP, to follow design's lead.
* Add bleeding-edge processors, with all features included.
* Fix a few DEBUG_TYPE to match other backends.

Test Plan: ninja check

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D10880

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241211 91177308-0d34-0410-b5e6-96231b3b80d8

[TwoAddressInstructionPass] Try 3 Addr Conversion After Commuting.

TwoAddressInstructionPass stops after a successful commuting but 3 Addr
conversion might be good for some cases.

Consider:

int foo(int a, int b) {
return a + b;
}

Before this commit, we emit:

addl %esi, %edi
movl %edi, %eax
ret

After this commit, we try 3 Addr conversion:

leal (%rsi,%rdi), %eax
ret

Patch by Volkan Keles <vkeles@apple.com>!

Differential Revision: http://reviews.llvm.org/D10851

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241206 91177308-0d34-0410-b5e6-96231b3b80d8

Change APInt comparison with uint64_t.

Summary:
This patch changes the way APInt is compared with a value of type uint64_t.
Before the uint64_t value was truncated to the size of APInt before comparison.
Now the comparison takes into account full 64-bit precision.

Test Plan: Unit tests added. No regressions. Self-hosted check-all done as well.

Reviewers: chandlerc, dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10655

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241204 91177308-0d34-0410-b5e6-96231b3b80d8

Test for specific output in lit test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241200 91177308-0d34-0410-b5e6-96231b3b80d8

[LoopVectorize] Use ReplaceInstWithInst() helper where appropriate.

This is mostly an NFC, which increases code readability (instead of
saving old terminator, generating new one in front of old, and deleting
old, we just call a function). However, it would additionaly copy
the debug location from old instruction to replacement, which
would help PR23837.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241197 91177308-0d34-0410-b5e6-96231b3b80d8

[WebAssembly] Define separate Target instances for 32-bit and 64-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241193 91177308-0d34-0410-b5e6-96231b3b80d8

[NVPTX] expand extload/truncstore for vectors of floats

Summary:
According to PTX ISA:

For convenience, ld, st, and cvt instructions permit source and destination data operands to be wider than the instruction-type size, so that narrow values may be loaded, stored, and converted using regular-width registers. For example, 8-bit or 16-bit values may be held directly in 32-bit or 64-bit registers when being loaded, stored, or converted to other types and sizes. The operand type checking rules are relaxed for bit-size and integer (signed and unsigned) instruction types; floating-point instruction types still require that the operand type-size matches exactly, unless the operand is of bit-size type.

So, the ISA does not support load with extending/store with truncatation for floating numbers. This is reflected in setting the loadext/truncstore actions to expand in the code for floating numbers, but vectors of floating numbers are not taken care of.

As a result, loading a vector of floats followed by a fp_extend may be combined by DAGCombiner to a extload, and the extload may be lowered to NVPTXISD::LoadV2 with extending information. However, NVPTXISD::LoadV2 does not perform extending, and no extending instructions are inserted. Finally, PTX instructions with mismatched types are generated, like
ld.v2.f32 {%fd3, %fd4}, [%rd2]

This patch adds the correct actions for vectors of floats, so DAGCombiner would not create loads with extending, and correct code is generated.

Patched by Gang Hu.

Test Plan: Test case attached.

Reviewers: jingyue

Reviewed By: jingyue

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D10876

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241191 91177308-0d34-0410-b5e6-96231b3b80d8

Encode MCSymbol alignment as log2(align).

Given that alignments are always powers of 2, just encode it this way.

This matches how we encode alignment on IR GlobalValue's for example.

This compresses the CommonAlign member down to 5 bits which allows it
to pack better with the surrounding fields.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241189 91177308-0d34-0410-b5e6-96231b3b80d8

[WinEH] Use llvm.x86.seh.recoverfp in WinEHPrepare

Don't pattern match for frontend outlined finally calls on non-x64
platforms. The 32-bit runtime uses a different funclet prototype. Now,
the frontend is pre-outlining the finally bodies so that it ends up
doing most of the heavy lifting for variable capturing. We're just
outlining the callsite, and adapting the frameaddress(0) call to line up
the frame pointer recovery.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241186 91177308-0d34-0410-b5e6-96231b3b80d8

[NVPTX] Move NVPTXPeephole after NVPTXPrologEpilogPass

Summary:
Offset of frame index is calculated by NVPTXPrologEpilogPass. Before
that the correct offset of stack objects cannot be obtained, which
leads to wrong offset if there are more than 2 frame objects. This patch
move NVPTXPeephole after NVPTXPrologEpilogPass. Because the frame index
is already replaced by %VRFrame in NVPTXPrologEpilogPass, we check
VRFrame register instead, and try to remove the VRFrame if there
is no usage after NVPTXPeephole pass.

Patched by Xuetian Weng.

Test Plan:
Strengthened test/CodeGen/NVPTX/local-stack-frame.ll to check the
offset calculation based on SP and SPL.

Reviewers: jholewinski, jingyue

Reviewed By: jingyue

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10853

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241185 91177308-0d34-0410-b5e6-96231b3b80d8

[PPC64LE] Enable missing lxvdsx optimization, and related swap optimization

When adding little-endian vector support for PowerPC last year, I
inadvertently disabled an optimization that recognizes a load-splat
idiom and generates the lxvdsx instruction.  This patch moves the
offending logic so lxvdsx is once again generated.

This pattern is frequently generated by the vectorizer for scalar
loads of an effective constant.  Previously the lxvdsx instruction was
wrongly listed as lane-sensitive for the VSX swap optimization (since
both doublewords are identical, swaps are safe).  This patch fixes
this as well, so that vectorized code using lxvdsx can now have swaps
removed from the computation.

There is an existing test (@test50) in test/CodeGen/PowerPC/vsx.ll
that checks for the missing optimization.  However, vsx.ll was only
being tested for POWER7 with big-endian code generation.  I've added
a little-endian RUN statement and expected LE code generation for all
the tests in vsx.ll to give us a bit better VSX coverage, including
what's needed for this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241183 91177308-0d34-0410-b5e6-96231b3b80d8

add a cl::opt override for TargetLoweringBase's JumpIsExpensive

This patch is not intended to change existing codegen behavior for any target.
It just exposes the JumpIsExpensive setting on the command-line to allow for
easier testing and emergency overrides.

Also, change the existing regression test to use FileCheck, explicitly specify
the jump-is-expensive option, and use more precise checks.

Differential Revision: http://reviews.llvm.org/D10846

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241179 91177308-0d34-0410-b5e6-96231b3b80d8

Disallow in-source builds (as we already do for the cmake build).

http://reviews.llvm.org/D10614

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241178 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[DWARF] Fix debug info generation for function static variables, typedefs, and records"

Caused PR24008

This reverts commit 37cb5f1c2db9f42d29f26b215585f56bb64ae4f5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241176 91177308-0d34-0410-b5e6-96231b3b80d8

fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241175 91177308-0d34-0410-b5e6-96231b3b80d8

fix typos in comment; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241174 91177308-0d34-0410-b5e6-96231b3b80d8

LivePhysRegs: Add support to add pristine registers when populating with live-in/live-out registers.

Differential Revision: http://reviews.llvm.org/D10139

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241172 91177308-0d34-0410-b5e6-96231b3b80d8

[SEH] Don't assert if the parent function lacks a personality

The EH code might have been deleted as unreachable and the personality
pruned while the filter is still present. Currently I'm hitting this at
-O0 due to the clang bug PR24009.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241170 91177308-0d34-0410-b5e6-96231b3b80d8

[AsmPrinter] Hide implementation details

NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241169 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64] Implement add/adds/sub/subs/cmp/cmn with negative immediate aliases

This patch teaches the AsmParser to accept add/adds/sub/subs/cmp/cmn
with a negative immediate operand and convert them as shown:

  add  Rd, Rn, -imm -> sub  Rd, Rn, imm
  sub  Rd, Rn, -imm -> add  Rd, Rn, imm
  adds Rd, Rn, -imm -> subs Rd, Rn, imm
  subs Rd, Rn, -imm -> adds Rd, Rn, imm
  cmp  Rn, -imm     -> cmn  Rn, imm
  cmn  Rn, -imm     -> cmp  Rn, imm

Those instructions are an alternate syntax available to assembly coders,
and are needed in order to support code already compiling with some other
assemblers (gas). They are documented in the "ARMv8 Instruction Set
Overview", in the "Arithmetic (immediate)" section. This makes llvm-mc
a programmer-friendly assembler !

This also fixes PR20978: "Assembly handling of adding negative numbers
not as smart as gas".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241166 91177308-0d34-0410-b5e6-96231b3b80d8

[SDAG] Give InstrEmitter hidden visibility

NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241165 91177308-0d34-0410-b5e6-96231b3b80d8

[CodeGen] Reduce visibility of implementation details

NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241164 91177308-0d34-0410-b5e6-96231b3b80d8

[Sparc] Rearrange SparcInstrInfo, no change.

Move some instructions into order of sections in the spec, as the rest
already were.

Differential Revision: http://reviews.llvm.org/D9102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241163 91177308-0d34-0410-b5e6-96231b3b80d8

Test committed in r241153 is more target-specific than I thought.
Moving the (original, x86-only) test to the X86 directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241162 91177308-0d34-0410-b5e6-96231b3b80d8

Expand Phabricator docs slightly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241161 91177308-0d34-0410-b5e6-96231b3b80d8

AVX-512: Implemented missing encoding for FMA scalar instructions
Added tests for encoding

Differential Revision: http://reviews.llvm.org/D10865

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241159 91177308-0d34-0410-b5e6-96231b3b80d8

Fix non-target-specific test not to use the x86 triple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241158 91177308-0d34-0410-b5e6-96231b3b80d8

Return ErrorOr from getSection.

This also improves the logic of what is an error:

* getSection(uint_32): only return an error if the index is out of bounds. The
index 0 corresponds to a perfectly valid entry.
* getSection(Elf_Sym): Returns null for symbols that normally don't have
sections and error for out of bound indexes.

In many places this just moves the report_fatal_error up the stack, but those
can then be fixed in smaller patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241156 91177308-0d34-0410-b5e6-96231b3b80d8

[DWARF] Fix debug info generation for function static variables, typedefs, and records

Function static variables, typedefs and records (class, struct or union) declared inside
a lexical scope were associated with the function as their parent scope, rather than the
lexical scope they are defined or declared in.

This fixes PR19238

Patch by: amjad.aboud@intel.com
Differential Revision: http://reviews.llvm.org/D9758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241153 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Avoid over-relaxation of 8-bit immediates in integer arithmetic instructions.

Only consider an instruction a candidate for relaxation if the last operand of the
instruction is an expression. We previously checked whether any operand is an expression,
which is useless, since for all instructions concerned, the only operand that may be
affected by relaxation is the last one.
In addition, this removes the check for having RIP as an argument, since it was
plain wrong - even when one of the arguments is RIP, relaxation may still be needed.

This fixes PR9807.

Patch by: david.l.kreitzer@intel.com
Differential Revision: http://reviews.llvm.org/D10766

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241152 91177308-0d34-0410-b5e6-96231b3b80d8

Revert part of r241149, "Fix PR23872: Integrated assembler error message when using .type directive with @ in AArch32 assembly."

The test should be split among targets. llvm/test/MC/ELF/ is assumed as X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241151 91177308-0d34-0410-b5e6-96231b3b80d8

[mips][microMIPS] Implement SLL and NOP instructions
http://reviews.llvm.org/D10474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241150 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR23872: Integrated assembler error message when using .type directive with @ in AArch32 assembly.

The AArch32 assembler parses the '@' as a comment symbol, so the error message shouldn't suggest
that '@<type>' is a valid replacement when assembling for AArch32 target.

Differential Revision: http://reviews.llvm.org/D10651

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241149 91177308-0d34-0410-b5e6-96231b3b80d8

[LoopUnroll] Use undef for phis with no value live

We would create a phi node with a zero initialized operand instead of
undef in the case where no value was originally available. This was
problematic for x86_mmx which has no null value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241143 91177308-0d34-0410-b5e6-96231b3b80d8

[SCCP] Turn loads of null into undef instead of zero initialized values

Surprisingly, this is a correctness issue: the mmx type exists for
calling convention purposes, LLVM doesn't have a zero representation for
them.

This partially fixes PR23999.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241142 91177308-0d34-0410-b5e6-96231b3b80d8

[NaryReassociate] enhances nsw by leveraging @llvm.assume

Summary:
nsw are flaky and can often be removed by optimizations. This patch enhances
nsw by leveraging @llvm.assume in the IR. Specifically, NaryReassociate now
understands that

assume(a + b >= 0) && assume(a >= 0) ==> a +nsw b

As a result, it can split more sext(a + b) into sext(a) + sext(b) for CSE.

Test Plan: nary-gep.ll

Reviewers: broune, meheff

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10822

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241139 91177308-0d34-0410-b5e6-96231b3b80d8

Getting started docs: https, and check signature

Summary: Download should be over https, not insecure ftp at least for the signature and key files. The signature should also get verified.

Test Plan: None

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10845

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241138 91177308-0d34-0410-b5e6-96231b3b80d8

[SanitizerCoverage] Don't add instrumentation to unreachable blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241127 91177308-0d34-0410-b5e6-96231b3b80d8

Fix several typos in LangRef.rst related to loop unrolling metadata.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241126 91177308-0d34-0410-b5e6-96231b3b80d8

[SEH] Add new intrinsics for recovering and restoring parent frames

The incoming EBP value established by the runtime is actually a pointer
to the end of the EH registration object, and not the true parent
function frame pointer. Clang doesn't need llvm.x86.seh.exceptioninfo
anymore because we know that the exception info pointer is at a fixed
offset from this incoming EBP.

The llvm.x86.seh.recoverfp intrinsic takes an EBP value provided by the
EH runtime and returns a pointer that is usable with llvm.framerecover.

The llvm.x86.seh.restoreframe intrinsic is inserted by the 32-bit
specific preparation pass in blocks targetted by the EH runtime. It
re-establishes any physical registers used by the parent function to
address the stack, such as the frame, base, and stack pointers.

Neither of these intrinsics correctly handle stack realignment prologues
yet, but it's possible to add that later.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D10848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241125 91177308-0d34-0410-b5e6-96231b3b80d8

[IRBuilder] Delete unused constructor and SetInsertPoint overload.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241124 91177308-0d34-0410-b5e6-96231b3b80d8

Fix memory leak in unittest added in r241101.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241123 91177308-0d34-0410-b5e6-96231b3b80d8

[Cloning] Teach CloneModule about personality functions

CloneModule didn't take into account that it needed to remap the value
using values in the module.

This fixes PR23992.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241122 91177308-0d34-0410-b5e6-96231b3b80d8

[NVPTX] cleanups and refacotring in NVPTXFrameLowering.cpp

Summary: NFC

Test Plan: no regression

Reviewers: wengxt

Reviewed By: wengxt

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10849

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241118 91177308-0d34-0410-b5e6-96231b3b80d8

[FaultMaps] Let the frontend pre-select implicit null check candidates.

Summary:
This change introduces a !make.implicit metadata that allows the
frontend to pre-select the set of explicit null checks that will be
considered for transformation into implicit null checks.

The reason for not using profiling data instead of !make.implicit is
explained in the change to `FaultMaps.rst`.

Reviewers: atrick, reames, pgavlin, JosephTremoulet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10824

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241116 91177308-0d34-0410-b5e6-96231b3b80d8

Pack MCSymbol::HasName in to a spare bit in the section/fragment union.

This is part of an effort to pack the average MCSymbol down to 24 bytes.

The HasName bit was pushing the size of the bitfield over to another word,
so this change uses a PointerIntPair to fit in it to unused bits of a
PointerUnion.

Reviewed by Rafael Espíndola

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241115 91177308-0d34-0410-b5e6-96231b3b80d8

Use ErrorOr in getRelocationAdress.

We can probably do better in this method, but this is an improvement and
enables further ErrorOr cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241114 91177308-0d34-0410-b5e6-96231b3b80d8

Implement containsSymbol with other lower level methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241112 91177308-0d34-0410-b5e6-96231b3b80d8

Modified a comment about the reason for the patch (removed commented code).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241110 91177308-0d34-0410-b5e6-96231b3b80d8

Remove Elf_Shdr_Iter. Diagnose files with invalid section header sizes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241109 91177308-0d34-0410-b5e6-96231b3b80d8

Fixes a bug with __builtin_vsx_lxvdw4x on Little Endian systems

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241108 91177308-0d34-0410-b5e6-96231b3b80d8

Use range loops. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241105 91177308-0d34-0410-b5e6-96231b3b80d8

Use range loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241104 91177308-0d34-0410-b5e6-96231b3b80d8

COFF: Do not assign linker-weak symbols to selectany comdat sections.

It is mandatory to specify a comdat in order to receive comdat semantics
for a symbol. We were previously getting this wrong in -function-sections
mode; linker-weak symbols were being emitted in a selectany comdat. This
change causes such symbols to use a noduplicates comdat instead, fixing
the inconsistency.

Also correct an inaccuracy in the docs.

Differential Revision: http://reviews.llvm.org/D10828

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241103 91177308-0d34-0410-b5e6-96231b3b80d8

[DebugInfo] Let IRBuilder::SetInsertPoint(BB::iterator) update current debug location.

IRBuilder::SetInsertPoint(BB, BB::iterator) is an older version of
IRBuilder::SetInsertPoint(Instruction). However, the latter updates
the current debug location of emitted instruction, while the former
doesn't, which is confusing.

Unify the behavior of these methods: now they both set current debug
location to the debug location of instruction at insertion point.

The callers of IRBuilder::SetInsertPoint(BB, BB::iterator) doesn't
seem to depend on the old behavior (keeping the original debug info
location). On the contrary, sometimes they (e.g. SCEV) *should* be
updating debug info location, but don't. I'll look at gdb bots after
the commit to check that we don't regress on debug info somewhere.

This change may make line table more fine-grained, thus increasing
debug info size. I haven't observed significant increase, though:
it varies from negligible to 0.3% on several binaries and self-hosted
Clang.

This is yet another change targeted at resolving PR23837.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241101 91177308-0d34-0410-b5e6-96231b3b80d8

Use range loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241100 91177308-0d34-0410-b5e6-96231b3b80d8

[NVPTX] Fix issue introduced in D10321

Summary:
Really check if %SP is not used in other places, instead of checking only exact
one non-dbg use.

Patched by Xuetian Weng.

Test Plan:
@foo4 in test/CodeGen/NVPTX/local-stack-frame.ll, create a case that
SP will appear twice.

Reviewers: jholewinski, jingyue

Reviewed By: jingyue

Subscribers: llvm-commits, sfantao, jholewinski

Differential Revision: http://reviews.llvm.org/D10844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241099 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a fixme and make DICompileUnit a distinct node. Tested via clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241097 91177308-0d34-0410-b5e6-96231b3b80d8

Fix compilation failure introduced in r241093.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241096 91177308-0d34-0410-b5e6-96231b3b80d8

Add a test of an elf file with an invalid section index.

We were already checking, but were missing a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241094 91177308-0d34-0410-b5e6-96231b3b80d8

MIR Serialization: Serialize MBB successors.

This commit implements serialization of the machine basic block successors. It
uses a YAML flow sequence that contains strings that have the MBB references.
The MBB references in those strings use the same syntax as the MBB machine
operands in the machine instruction strings.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10699

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241093 91177308-0d34-0410-b5e6-96231b3b80d8

MIR Printer: extract the code that prints MBB references into a new method. NFC.

This commit enables the MIR printer to reuse the code that prints MBB
references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241087 91177308-0d34-0410-b5e6-96231b3b80d8

MIR Parser: refactor error reporting for machine instruction parser errors. NFC.

This commit extracts the code that reports an error that's produced by the
machine instruction parser into a new method that can be reused in other places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241086 91177308-0d34-0410-b5e6-96231b3b80d8

MIR Parser: make the machine instruction parsing interface more consistent. NFC.

This commit refactors the interface for machine instruction parser. It adopts
the pattern of returning a bool and passing in the result in the first argument
that is used by the other parsing methods for the the method 'parse' and the
function 'parseMachineInstr'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241085 91177308-0d34-0410-b5e6-96231b3b80d8

Force relocation mode to be default, regardless of what is passed to the backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241081 91177308-0d34-0410-b5e6-96231b3b80d8

[CMake] Make the CMake files (LLVMConfig.cmake and LLVMExports.cmake)
generated by the Autoconf/Makefile build system relocatable.

Previously the generated CMake files contained hardcoded paths which
prevented a binary installation from being relocated to a different
place in the file system. This problem was most noticeable in LLVM's
official binary releases which were completely unusable by a downstream
project trying to import the CMake targets.

Package maintainers who choose to modify the install location of the
CMake directory without using the ``PROJ_cmake`` Makefile variable
override will need to patch the generated``LLVMConfig.cmake`` so that
``LLVM_INSTALL_PREFIX`` and ``_LLVM_CMAKE_DIR`` variables are set
correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241080 91177308-0d34-0410-b5e6-96231b3b80d8

MIR Parser: adopt the 'maybeLex...' pattern. NFC.

This commit refactors the machine instruction lexer so that the lexing
functions use the 'maybeLex...' pattern, where they determine if they
can lex the current token by themselves.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D10817

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use range-based for loops; NFCI

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Fix the name of the iterator functions to match the coding standards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241074 91177308-0d34-0410-b5e6-96231b3b80d8

Report an error on invalid sh_entsize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241070 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Fix a bug in WIN_FTOL_32/64 handling.

Duplicating an FP register "as itself" is a bad idea, since it violates the
invariant that every FP register is mapped to at most one FPU stack slot.
Use the scratch FP register instead.

This fixes PR23957.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241069 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] [IAS] Add support for the .module softfloat/hardfloat directives.

These directives are used to set the default value of the SoftFloat feature.
They have the same effect as setting -m{soft, hard}-float from the command line.

Differential Revision: http://reviews.llvm.org/D9073

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[mips] [IAS] Make .module directives change AssemblerOptions->front().

Differential Revision: http://reviews.llvm.org/D10643

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241062 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting r241058 because it's causing buildbot failures.

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There are a few places where subtarget features are still
represented by uint64_t, this patch replaces these
usages with the FeatureBitset (std::bitset) type.

Differential Revision: http://reviews.llvm.org/D10542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241058 91177308-0d34-0410-b5e6-96231b3b80d8

Correct a typo for a LoopVectorize test

I forgot to specify the correct pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241054 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] [IAS] Add support for the .set oddspreg/nooddspreg directives.

Differential Revision: http://reviews.llvm.org/D10657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241052 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add FXSR intrinsics

Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241049 91177308-0d34-0410-b5e6-96231b3b80d8

ELF.h: Prune obsolete comments removed in r240996. [-Wdocumentation]

FIXME: Should they be moved onto Elf_Sym_Impl::getNmae()?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241044 91177308-0d34-0410-b5e6-96231b3b80d8

Don't return error_code from a function that doesn't fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241042 91177308-0d34-0410-b5e6-96231b3b80d8

Drop the OS from the WebAssembly target triple for now.

This unbreaks TripleTest.Normalization. We'll have to come up with a new
plan for the OS component of the target triple for WebAssembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241041 91177308-0d34-0410-b5e6-96231b3b80d8

Move function to the only file that uses it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241040 91177308-0d34-0410-b5e6-96231b3b80d8

Don't return error_code from a function that doesn't fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241039 91177308-0d34-0410-b5e6-96231b3b80d8

Debug info: Add dwarf backend support for DIModule.

rdar://problem/20965932

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Don't return error_code from a function that doesn't fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241033 91177308-0d34-0410-b5e6-96231b3b80d8

Fix LastArchType to point to the new last arch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241030 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup getRelocationAddend.

Realistically, this will be returning ErrorOr for some time as refactoring the
user code to check once per section will take some time.

Given that, use it for checking if a relocation has addend or not.

While at it, add ELFRelocationRef to simplify the users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241028 91177308-0d34-0410-b5e6-96231b3b80d8

RegisterCoalescer: Cleanup empty subranges after shrinkToUses()

A call to removeEmptySubranges() is necessary after every operation that
potentially removes all segments from a subregister range; this case in
the register coalescer was missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241027 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-bcanalyzer: Add a field that was missed in r241016.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241026 91177308-0d34-0410-b5e6-96231b3b80d8

Object/COFF: Define coff_symbol_generic.

If you only need Name and Value fields in the COFF symbol,
you don't need to distinguish 32 bit and 64 bit COFF symbols.
These fields start at the same offsets and have the same size.

This data strucutre is one pointer smaller than COFFSymbolRef
thus slightly efficient. I'll use this class in LLD as we create
millions of LLD symbol objects that currently contain COFFSymbolRef.
Shaving off 8 byte (or 4 byte on 32 bit) from that class actually
matters becasue of the number of objects we create in LLD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241024 91177308-0d34-0410-b5e6-96231b3b80d8

Use asserts for checks that should never fail.

If a section is not SHT_REL or SHT_RELA, we never create a valid iterator,
so the getRelocation* methods should always see a section with the correct type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241023 91177308-0d34-0410-b5e6-96231b3b80d8

[WebAssembly] Initial WebAssembly backend

This WebAssembly backend is just a skeleton at this time and is not yet
functional.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241022 91177308-0d34-0410-b5e6-96231b3b80d8