FIX PR 4459.

Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74446 91177308-0d34-0410-b5e6-96231b3b80d8

Add some tests of advanced TableGen list functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74445 91177308-0d34-0410-b5e6-96231b3b80d8

Implement !cast<string>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74444 91177308-0d34-0410-b5e6-96231b3b80d8

Improve TableGen error reporting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74443 91177308-0d34-0410-b5e6-96231b3b80d8

Initialize CurSection in constructor.
Not doing so causes some unittests to fail, because CurSection is uninitialized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74442 91177308-0d34-0410-b5e6-96231b3b80d8

Fix order of arguments to EXPECT_EQ

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74441 91177308-0d34-0410-b5e6-96231b3b80d8

Rename MCValue::getCst to getConstant and add MCValue::isConstant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74440 91177308-0d34-0410-b5e6-96231b3b80d8

Relax LDA memory instruction checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74439 91177308-0d34-0410-b5e6-96231b3b80d8

Call doInitialization(), releaseMemory(), and doFinalization() for on-the-fly passes as well.
Also don't call finalizers for LoopPass if initialization was not called.
Add a unittest that tests that these methods are called, in the proper
order, and the correct number of times.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74438 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify this code, and avoid using APInt(). This fixes
(otherwise harmless) uninitialized value warnings that
Duncan found with gcc-4.4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74437 91177308-0d34-0410-b5e6-96231b3b80d8

Add a target-specific DAG combine on X86 to fold the common pattern of
fence-atomic-fence down to just the atomic op.  This is possible thanks to
X86's relatively strong memory model, which guarantees that locked instructions
(which are used to implement atomics) are implicit fences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74435 91177308-0d34-0410-b5e6-96231b3b80d8

Fix three MSVC 2008 warnings that completely clutter the build output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74430 91177308-0d34-0410-b5e6-96231b3b80d8

Add processor descriptions for Istanbul and Shanghai.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74429 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a subtarget feature bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74428 91177308-0d34-0410-b5e6-96231b3b80d8

Add more vector ValueTypes for AVX and other extended vector instruction
sets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74427 91177308-0d34-0410-b5e6-96231b3b80d8

Fix CMake checks for pthread_getspecific and pthread_rwlock_init, from Xerxes Ranby

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74426 91177308-0d34-0410-b5e6-96231b3b80d8

Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8

Add triple for OpenBSD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74422 91177308-0d34-0410-b5e6-96231b3b80d8

Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt
to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74421 91177308-0d34-0410-b5e6-96231b3b80d8

Implement Thumb2 ldr.

After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8

Make dynamic LLVMC plugins work on Windows (finally!).

Implemented by making lib/CompilerDriver a shared library that holds all the
global static data (CommandLine options, plugin registry) that we unfortunately
have to live with.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74417 91177308-0d34-0410-b5e6-96231b3b80d8

Missed one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74416 91177308-0d34-0410-b5e6-96231b3b80d8

Fix case in LDA util function names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74415 91177308-0d34-0410-b5e6-96231b3b80d8

Print pairwise dependence results, add testcases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74402 91177308-0d34-0410-b5e6-96231b3b80d8

Minimal LDA interface, maximally conservative tester.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74401 91177308-0d34-0410-b5e6-96231b3b80d8

LDA analysis output scaffolding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74400 91177308-0d34-0410-b5e6-96231b3b80d8

Don't try to split a loop when the controlling icmp instruction
doesn't have an IV-based operand. This fixes PR4471.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74399 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the block from the LoopInfo, rather than just the Loop.
LoopInfo will handle removing it from the Loop, as well as updating
its own tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74398 91177308-0d34-0410-b5e6-96231b3b80d8

Teach LoopSimplify how to merge multiple loop exits into a single exit,
when one of them can be converted to a trivial icmp and conditional
branch.

This addresses what is essentially a phase ordering problem.
SimplifyCFG knows how to do this transformation, but it doesn't do so
if the primary block has any instructions in it other than an icmp and
a branch. In the given testcase, the block contains other instructions,
however they are loop-invariant and can be hoisted. SimplifyCFG doesn't
have LoopInfo though, so it can't hoist them. And, it's important that
the blocks be merged before LoopRotation, as it doesn't support
multiple-exit loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74396 91177308-0d34-0410-b5e6-96231b3b80d8

More minor code simplifications.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74395 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate a layer of indirection in LoopInfo and MachineLoopInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74394 91177308-0d34-0410-b5e6-96231b3b80d8

Convert ScalarEvolution to use BumpPtrAllocator and FoldingSet, instead
of a team of individual allocations and a team of std::maps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74393 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a redundant #include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74392 91177308-0d34-0410-b5e6-96231b3b80d8

Change SCEVExpander to use an IRBuilder to emit instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74391 91177308-0d34-0410-b5e6-96231b3b80d8

Add a 'const' in a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74389 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify a bit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74385 91177308-0d34-0410-b5e6-96231b3b80d8

ARM refactoring. Step 2: split RegisterInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74384 91177308-0d34-0410-b5e6-96231b3b80d8

Add ThumbInstrInfo.cpp to the CMake makefiles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74382 91177308-0d34-0410-b5e6-96231b3b80d8

remove a bunch of fixmes (old checking code) and commonize all the
target-specific operand printing functionality.  Yay.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74379 91177308-0d34-0410-b5e6-96231b3b80d8

pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74378 91177308-0d34-0410-b5e6-96231b3b80d8

simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74377 91177308-0d34-0410-b5e6-96231b3b80d8

When a value is used multiple times within a single PHI, instructions
inserted to replace that value must dominate all of of the basic
blocks associated with the uses of the value in the PHI, not just
one of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74376 91177308-0d34-0410-b5e6-96231b3b80d8

fix clang/test/CodeGenObjC/try.m, a basereg doesn't mean no global anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74375 91177308-0d34-0410-b5e6-96231b3b80d8

fix a bunch of failures in the X86-64 JIT by tolerating RIP as
a base register.  We just ignore it for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8

factor some logic out into a helper function, allow remat of loads from constant
globals.  This implements remat-constant.ll even without aggressive-remat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74373 91177308-0d34-0410-b5e6-96231b3b80d8

Reimplement rip-relative addressing in the X86-64 backend.  The new
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8

remove some unneeded eh info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74371 91177308-0d34-0410-b5e6-96231b3b80d8

When doing remat, don't consider uses of non-allocatable physregs.  Patch
by Evan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74370 91177308-0d34-0410-b5e6-96231b3b80d8

Renaming for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74368 91177308-0d34-0410-b5e6-96231b3b80d8

testcase for PR4466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74367 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR4466 by making fastisel set operand flags correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74366 91177308-0d34-0410-b5e6-96231b3b80d8

fix a typo that GCC should have caught that causes crashes with -view-*-dags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74364 91177308-0d34-0410-b5e6-96231b3b80d8

Remove outdated comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74357 91177308-0d34-0410-b5e6-96231b3b80d8

When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8

Add some testcases for some of the recent ScalarEvolution bug fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74353 91177308-0d34-0410-b5e6-96231b3b80d8

Incorporate the insertion point into the key of SCEVExpander's CSE map.
This helps it avoid reusing an instruction that doesn't dominate all
of the users, in cases where the original instruction was inserted
before all of the users were known.  This may result in redundant
expansions of sub-expressions that depend on loop-unpredictable values
in some cases, however this isn't very common, and it primarily impacts
IndVarSimplify, so GVN can be expected to clean these up.

This eliminates the need for IndVarSimplify's FixUsesBeforeDefs,
which fixes several bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74352 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unused routines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74351 91177308-0d34-0410-b5e6-96231b3b80d8

Add feature flags for AVX and FMA and fix some SSE4A feature flag
initialization problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74350 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb-2 tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74345 91177308-0d34-0410-b5e6-96231b3b80d8

Fix ScalarEvolution::getAddRecExpr's code which canonicalized the
nesting order of nested AddRec expressions to skip the transformation
if it would introduce an AddRec with operands not loop-invariant
with respect to its loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74343 91177308-0d34-0410-b5e6-96231b3b80d8

NewNightlyTest.pl: Support -submit-aux with -no-submit (run that aux script,
instead of skipping).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74341 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing argument for vtbx intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74340 91177308-0d34-0410-b5e6-96231b3b80d8

Fix SCEVAddRecExpr::isLoopInvariant to test if all of its operands
are loop invariant, not just the start operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74338 91177308-0d34-0410-b5e6-96231b3b80d8

remove unwind info, add test for asmprinting of jump table labels with (%rip)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74337 91177308-0d34-0410-b5e6-96231b3b80d8

Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8

simplify printing of MO_ExternalSymbol in a non-pcrel context.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74334 91177308-0d34-0410-b5e6-96231b3b80d8

Add intrinsics for ARM NEON vtbl and vtbx operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74333 91177308-0d34-0410-b5e6-96231b3b80d8

Privatize some data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74332 91177308-0d34-0410-b5e6-96231b3b80d8

Constify this value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74330 91177308-0d34-0410-b5e6-96231b3b80d8

Split thumb-related stuff into separate classes.
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74329 91177308-0d34-0410-b5e6-96231b3b80d8

add %rip to the GR64 register class.  Lets avoid allocating it to anything though! :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74328 91177308-0d34-0410-b5e6-96231b3b80d8

Move all the TLS processing logic into isel, don't do it in asmprinter at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74327 91177308-0d34-0410-b5e6-96231b3b80d8

make sure to propagate operand flags in SelectTLSADDRAddr properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74326 91177308-0d34-0410-b5e6-96231b3b80d8

fix a really subtle bug in the cross section of aliases and TLS:
the SelectionDAG::getGlobalAddress function properly looks through
aliases to determine thread-localness, but then passes the GV* down
to GlobalAddressSDNode::GlobalAddressSDNode which does not.  Instead
of passing down isTarget, just pass down the predetermined node
opcode.  This fixes some assertions with out of tree changes I'm
working on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74325 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb-2 has CLZ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74322 91177308-0d34-0410-b5e6-96231b3b80d8

Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74321 91177308-0d34-0410-b5e6-96231b3b80d8

Delete LoopPass::runOnFunctionBody.  It was never used or implemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74320 91177308-0d34-0410-b5e6-96231b3b80d8

Get rid of these cache variables, which are a holdover from the days when
we had multiple type planes and these lookups were expensive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74319 91177308-0d34-0410-b5e6-96231b3b80d8

Make this const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74317 91177308-0d34-0410-b5e6-96231b3b80d8

minor cleanup/framework changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74316 91177308-0d34-0410-b5e6-96231b3b80d8

Privatize some variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74315 91177308-0d34-0410-b5e6-96231b3b80d8

move magic for PIC constantpool references from asmprinter to isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74313 91177308-0d34-0410-b5e6-96231b3b80d8

implement DOTGraphTraits<SelectionDAG*>::getNodeLabel in terms of
SDNode::print_details to eliminate a ton of near-duplicate code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74311 91177308-0d34-0410-b5e6-96231b3b80d8

use jump table operand flags in asm printer instead of "magic predicates"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74310 91177308-0d34-0410-b5e6-96231b3b80d8

More spelling Count as count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74306 91177308-0d34-0410-b5e6-96231b3b80d8

Swap order of arguments to vst[34]* intrinsics.  This matches the order
used by both the user-visible intrinsics defined by ARM and the
corresponding GCC builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74300 91177308-0d34-0410-b5e6-96231b3b80d8

Spell Count as count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74298 91177308-0d34-0410-b5e6-96231b3b80d8

Add Thumb-2 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74295 91177308-0d34-0410-b5e6-96231b3b80d8

Use atomic operations for accessing this global counter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74294 91177308-0d34-0410-b5e6-96231b3b80d8

ADC used to implement adde should use "adcs" opcode instead of "adc".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74293 91177308-0d34-0410-b5e6-96231b3b80d8

Get rid of unnecessary global variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74291 91177308-0d34-0410-b5e6-96231b3b80d8

ORN and BIC tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74289 91177308-0d34-0410-b5e6-96231b3b80d8

Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288 91177308-0d34-0410-b5e6-96231b3b80d8

Fix linking of llvm-ld and lli with CMake, from Xerxes Rånby

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74285 91177308-0d34-0410-b5e6-96231b3b80d8

CMake: add configure checks for pthread_rwlock_init and pthread_getspecific

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74284 91177308-0d34-0410-b5e6-96231b3b80d8

Fix compilation without pthreads.

Patch by Xerxes Ranby.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74283 91177308-0d34-0410-b5e6-96231b3b80d8

Fix tests: Count -> count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74282 91177308-0d34-0410-b5e6-96231b3b80d8

Indentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74281 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify predicate CarryDefIsUsed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74277 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's looking for duplicates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74276 91177308-0d34-0410-b5e6-96231b3b80d8