Jakob Stoklund Olesen [Mon, 13 Jun 2011 03:26:42 +0000 (03:26 +0000)]
Include callee-saved registers in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132899
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Rafael Espindola [Mon, 13 Jun 2011 03:09:13 +0000 (03:09 +0000)]
Fix invalid uses of Twine. Hopefully this fixes the problem that Takumi is
having.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132898
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Benjamin Kramer [Sun, 12 Jun 2011 22:48:00 +0000 (22:48 +0000)]
InstCombine: Shrink ((zext X) & C1) == C2 to fold away the cast if the "zext" and the "and" have one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132897
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Benjamin Kramer [Sun, 12 Jun 2011 22:47:53 +0000 (22:47 +0000)]
Simplify code. No functionality changes, name changes aside.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132896
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Benjamin Kramer [Sun, 12 Jun 2011 15:26:54 +0000 (15:26 +0000)]
Happy new year.
Only 163 days late!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132895
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Nadav Rotem [Sun, 12 Jun 2011 14:56:55 +0000 (14:56 +0000)]
Fix a bug in the calculation of the vectorTypeBreakdown into registers. Odd
types such as i33 were rounded to i32. Originated from Duncan's testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132893
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Nadav Rotem [Sun, 12 Jun 2011 14:49:38 +0000 (14:49 +0000)]
Improve the generated code by getCopyFromPartsVector for promoted integer types.
Instead of scalarizing, and doing an element-by-element truncat, use vector
truncate.
Add support for scalarization of vectors: i8 -> <1 x i1> (from Duncan's
testcase).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132892
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Nadav Rotem [Sun, 12 Jun 2011 14:40:30 +0000 (14:40 +0000)]
Bugfix: When looking for a legal vector type, stop looking when a non-simple
element type is found.
This fix addresses some of the tests in Duncan's testcase (forthcoming).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132891
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Jakob Stoklund Olesen [Sun, 12 Jun 2011 07:04:32 +0000 (07:04 +0000)]
Tweak hash function and compress hash tables.
Make the hash tables as small as possible while ensuring that all
lookups can be done in less than 8 probes.
Cut the aliases hash table in half by only storing a < b pairs - it
is a symmetric relation.
Use larger multipliers on the initial hash function to ensure that it
properly covers the whole table, and to resolve some clustering in the
very regular ARM register bank.
This reduces the size of most of these tables by 4x - 8x. For instance,
the ARM tables shrink from 48 KB to 8 KB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132888
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Jakob Stoklund Olesen [Sun, 12 Jun 2011 07:04:28 +0000 (07:04 +0000)]
Remove now dead code.
These computations have been moved to CodeGenRegisters.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132887
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Jakob Stoklund Olesen [Sun, 12 Jun 2011 07:04:26 +0000 (07:04 +0000)]
Extract the generateHashTable function.
The constant hash tables for sub-registers and overlaps are generated
the same way, so extract a function to generate and print the hash
table.
Also use the information computed by CodeGenRegisters.cpp instead of the
locally data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132886
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Rafael Espindola [Sun, 12 Jun 2011 05:57:01 +0000 (05:57 +0000)]
Really fix the fall-through logic.
Add a triple to the tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132885
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Rafael Espindola [Sun, 12 Jun 2011 05:35:39 +0000 (05:35 +0000)]
Test for the previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132884
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Rafael Espindola [Sun, 12 Jun 2011 05:26:32 +0000 (05:26 +0000)]
Fix silly bug I introduce in the previous commit. Fixes debug builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132883
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Rafael Espindola [Sun, 12 Jun 2011 03:20:32 +0000 (03:20 +0000)]
AnalyzeBranch doesn't change which successors a bb has, just the order
we try to branch to them.
Before we were creating successor lists with duplicated entries. Fixing that
found a bug in isBlockOnlyReachableByFallthrough that would causes it to
return the wrong answer for
-----------
...
jne foo
jmp bar
foo:
----------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132882
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Jakob Stoklund Olesen [Sun, 12 Jun 2011 03:05:52 +0000 (03:05 +0000)]
Compute lists of sub-regs, super-regs, and overlapping regs.
Besides moving structural computations to CodeGenRegisters.cpp, this
also well-defines the order of these lists:
- Sub-register lists come from a pre-order traversal of the graph
defined by the SubRegs lists in the .td files.
- Super-register lists are topologically ordered so no register comes
before any of its sub-registers. When the sub-register graph is not a
tree, independent super-registers appear in numerical order.
- Lists of overlapping registers are ordered according to register
number.
This reverses the order of the super-regs lists, but nobody was
depending on that. The previous order of the overlaps lists was odd, and
it may have depended on the precise behavior of std::stable_sort.
The old computations are still there, but will be removed shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132881
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Charles Davis [Sun, 12 Jun 2011 01:45:54 +0000 (01:45 +0000)]
Put FrameSetup flag on x86 instructions that set up the call frame. No
functionality change.
Later on, we'll use the flag to emit SEH pseudo-ops that describe how the
call frame was built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132880
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Bill Wendling [Sat, 11 Jun 2011 11:37:49 +0000 (11:37 +0000)]
Reformatting. Moving class definitions to more natural places. No functionalogical changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132876
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Chad Rosier [Sat, 11 Jun 2011 02:27:46 +0000 (02:27 +0000)]
Revert r132871.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132872
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Chad Rosier [Sat, 11 Jun 2011 02:16:36 +0000 (02:16 +0000)]
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132871
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Eli Friedman [Sat, 11 Jun 2011 01:55:07 +0000 (01:55 +0000)]
Make sure to pass OpFlags into MachineInstrBuilder::addExternalSymbol; the
memcpy/memset symbol doesn't get marked up correctly in PIC modes otherwise.
Should fix llvm-x86_64-linux-checks buildbot. Followup to r132864.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132869
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Andrew Trick [Sat, 11 Jun 2011 01:05:22 +0000 (01:05 +0000)]
Branch profiling: floating-point avoidance.
Patch by: Jakub Staszak!
Introduces BranchProbability. Changes unsigned to uint32_t all over and
uint64_t only when overflow is expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132867
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Jakob Stoklund Olesen [Sat, 11 Jun 2011 00:28:06 +0000 (00:28 +0000)]
Move the list of registers into CodeGenRegBank.
Also move the sub-register index computations from RegisterInfoEmitter
into CodeGenRegBank.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132865
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Eli Friedman [Fri, 10 Jun 2011 23:39:36 +0000 (23:39 +0000)]
Add full x86 fast-isel support for memcpy and memset.
rdar://
9431466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132864
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Eric Christopher [Fri, 10 Jun 2011 23:05:08 +0000 (23:05 +0000)]
80-col cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132863
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Dan Gohman [Fri, 10 Jun 2011 22:30:30 +0000 (22:30 +0000)]
Initialize BasicAA's AliasCache to set it to use fewer buckets by
default, since it usually has very few elements. This speeds up
alias queries in many cases, because AliasCache.clear() doesn't
have to visit as many buckets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132862
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Bill Wendling [Fri, 10 Jun 2011 21:47:14 +0000 (21:47 +0000)]
Install libprofile_rt.dylib where it's more available for gcov support.
<rdar://problem/
9583891>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132860
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Rafael Espindola [Fri, 10 Jun 2011 21:01:53 +0000 (21:01 +0000)]
Removed tabs. Also fixed my editor...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132857
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Cameron Zwarich [Fri, 10 Jun 2011 20:59:24 +0000 (20:59 +0000)]
Provide an ARMCCState subclass of CCState so that ARM clients will always set
CallOrPrologue correctly and eliminate the existing setter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132856
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Cameron Zwarich [Fri, 10 Jun 2011 20:37:36 +0000 (20:37 +0000)]
Rename the ParmContext enum values to make a bit more sense and add a small
comment on their meaning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132854
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Cameron Zwarich [Fri, 10 Jun 2011 20:31:39 +0000 (20:31 +0000)]
Remove tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132853
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Cameron Zwarich [Fri, 10 Jun 2011 20:30:08 +0000 (20:30 +0000)]
Remove a pointless const_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132852
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Rafael Espindola [Fri, 10 Jun 2011 20:08:23 +0000 (20:08 +0000)]
Remove duplicated test.
Thanks Bob Wilson for noticing it!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132851
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Jakob Stoklund Olesen [Fri, 10 Jun 2011 18:40:00 +0000 (18:40 +0000)]
Move some sub-register index calculations to CodeGenRegisters.cpp
Create a new CodeGenRegBank class that will eventually hold all the code
that computes the register structure from Records.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132849
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Richard Osborne [Fri, 10 Jun 2011 12:28:24 +0000 (12:28 +0000)]
Fix example code in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132844
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Eli Friedman [Fri, 10 Jun 2011 08:26:26 +0000 (08:26 +0000)]
Add -mattr=+sse2 to make the buildbots happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132839
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Galina Kistanova [Fri, 10 Jun 2011 05:35:25 +0000 (05:35 +0000)]
Reverted r132785. It seems this test needs more research.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132836
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Galina Kistanova [Fri, 10 Jun 2011 03:57:02 +0000 (03:57 +0000)]
Changed condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132834
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Chad Rosier [Fri, 10 Jun 2011 02:44:19 +0000 (02:44 +0000)]
Adding a test case for revision 132825.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132830
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Eli Friedman [Fri, 10 Jun 2011 01:13:01 +0000 (01:13 +0000)]
PR10092 (second try): Don't crash on a load without a momoperand; fast-isel creates loads like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132826
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Chad Rosier [Fri, 10 Jun 2011 00:53:15 +0000 (00:53 +0000)]
Ensure that EmitGlobalVariable is correctly differentiating between declarations
and definitions when emitting global variables. This was causing global
declarations to be emitted as if they were definitions.
Fixes <rdar://problem/
9429892>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132825
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Eli Friedman [Fri, 10 Jun 2011 00:30:08 +0000 (00:30 +0000)]
Add a simple test which makes sure folding immediate float zero to a memory operand works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132824
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Rafael Espindola [Thu, 9 Jun 2011 23:55:56 +0000 (23:55 +0000)]
Make the optional verification step more strict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132822
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Rafael Espindola [Thu, 9 Jun 2011 23:51:45 +0000 (23:51 +0000)]
Avoid a gcc warning about multiline comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132821
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Rafael Espindola [Thu, 9 Jun 2011 23:22:56 +0000 (23:22 +0000)]
On last fix to the early tail duplication.
With this I am able to bootstrap clang with early tail duplication enabled
for any small bb and setting tail-dup-size to a relatively large value(8) to
stress this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132816
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Eli Friedman [Thu, 9 Jun 2011 23:02:19 +0000 (23:02 +0000)]
Chris fixed this README a while back by changing how clang generates code for structs like the given struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132815
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Rafael Espindola [Thu, 9 Jun 2011 22:53:47 +0000 (22:53 +0000)]
Also consider phi nodes when deciding if a register is live out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132814
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Cameron Zwarich [Thu, 9 Jun 2011 22:30:07 +0000 (22:30 +0000)]
A CCState was being created without setting whether it is in the Call or Prologue state,
causing an assertion failure downstream. This fixes <rdar://problem/
9562908>.
This really seems like it should always be set at CCState creation time, so mistakes like
this can never happen. I'll take a look at doing that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132811
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Eli Friedman [Thu, 9 Jun 2011 22:14:44 +0000 (22:14 +0000)]
Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://
9562809.
The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132809
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Rafael Espindola [Thu, 9 Jun 2011 21:43:25 +0000 (21:43 +0000)]
AnalyzeBranch modifies the bb, but we don't want to modify a bb with
eh edges. Swap the order of the checks to avoid it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132806
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Rafael Espindola [Thu, 9 Jun 2011 20:55:41 +0000 (20:55 +0000)]
A PHI in this basic block is a use in another basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132805
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John McCall [Thu, 9 Jun 2011 20:31:09 +0000 (20:31 +0000)]
When deleting a basic block, remove call edges only for non-intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132803
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Roman Divacky [Thu, 9 Jun 2011 20:25:38 +0000 (20:25 +0000)]
Fix emission of PPC64 assembler on non-darwin platforms by splitting
VK_PPC_{HA,LO}16 into darwin and gas variants.
Darwin wants {ha,lo}16(symbol) while gnu as wants symbol@{ha,l}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132802
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Johnny Chen [Thu, 9 Jun 2011 20:11:46 +0000 (20:11 +0000)]
Modify comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132800
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John McCall [Thu, 9 Jun 2011 20:06:24 +0000 (20:06 +0000)]
SplitCriticalEdge can sometimes split the edge from an invoke to a landing
pad, separating the exception and selector calls from the new lpad. Teaching
it not to do that, or to properly adjust the CFG afterwards, is out of
scope because it would require the other edges to the landing pad to be split
as well (effectively). Instead, just recover from the most likely cases
during inlining. The best long-term solution is to change the exception
representation and commit to either requiring or not requiring the more
complex edge-splitting logic; this is just a shorter-term hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132799
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Rafael Espindola [Thu, 9 Jun 2011 19:54:42 +0000 (19:54 +0000)]
Refactor some checks into shouldTailDuplicate. Update comments.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132798
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John McCall [Thu, 9 Jun 2011 19:46:27 +0000 (19:46 +0000)]
Teach the CallGraph to ignore calls to intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132797
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Eli Friedman [Thu, 9 Jun 2011 19:33:30 +0000 (19:33 +0000)]
Revert 132789; it breaks tests. My mistake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132795
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Jason W Kim [Thu, 9 Jun 2011 19:13:45 +0000 (19:13 +0000)]
Remove an uneeded switch - Turns out reloc results are identical w/o the switch. (face+palm)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132790
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Eli Friedman [Thu, 9 Jun 2011 18:55:00 +0000 (18:55 +0000)]
Add a check to make sure we don't crash with strange configurations where we do fast-isel, then try to fold instructions. PR10092.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132789
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Jakob Stoklund Olesen [Thu, 9 Jun 2011 18:42:07 +0000 (18:42 +0000)]
Move TableGen's register bank classes to their own source file.
I'll be moving some more code there to gather all of the
register-specific stuff in one place. Currently it is shared between
CodeGenTarget and RegisterInfoEmitter.
The plan is that CodeGenRegisters can compute the full register bank
structure while RegisterInfoEmitter only will handle the printing part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132788
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Galina Kistanova [Thu, 9 Jun 2011 17:18:37 +0000 (17:18 +0000)]
Added dg.exp to run FrontendC ARM-dependent tests; updated inline-asm-multichar.c test per this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132785
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Bob Wilson [Thu, 9 Jun 2011 16:57:29 +0000 (16:57 +0000)]
Add special-case range checking for VCVT_N intrinsic immediate operands.
Radar
9558930.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132782
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Jakob Stoklund Olesen [Thu, 9 Jun 2011 16:56:59 +0000 (16:56 +0000)]
Remove custom allocation order boilerplate that is no longer needed.
The register allocators automatically filter out reserved registers and
place the callee saved registers last in the allocation order, so custom
methods are no longer necessary just for that.
Some targets still use custom allocation orders:
ARM/Thumb: The high registers are removed from GPR in thumb mode. The
NEON allocation orders prefer to use non-VFP2 registers first.
X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble.
SystemZ: Some of the allocation orders are omitting R12 aliases without
explanation. I don't understand this target well enough to fix that. It
looks like all the boilerplate could be removed by reserving the right
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132781
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Eric Christopher [Thu, 9 Jun 2011 16:03:19 +0000 (16:03 +0000)]
Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132777
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Eric Christopher [Thu, 9 Jun 2011 15:39:01 +0000 (15:39 +0000)]
Recommit r132764 since it didn't cause the windows buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132776
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Rafael Espindola [Thu, 9 Jun 2011 14:38:09 +0000 (14:38 +0000)]
Improve the handling of available_externally and llvm.global_ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132775
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Duncan Sands [Thu, 9 Jun 2011 11:11:45 +0000 (11:11 +0000)]
Enable printf() to iprintf() optimization for the TCE target.
Patch by Pekka Jaaskelainen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132774
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Chris Lattner [Thu, 9 Jun 2011 06:38:17 +0000 (06:38 +0000)]
add another sandybridge alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132772
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Eric Christopher [Thu, 9 Jun 2011 06:29:54 +0000 (06:29 +0000)]
Temporarily revert 132764 to see if it fixes the Windows buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132771
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Eric Christopher [Thu, 9 Jun 2011 05:58:50 +0000 (05:58 +0000)]
Have the JIT tutorial use IRBuilder for the IR.
Patch by Jake Waskett!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132770
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Akira Hatanaka [Thu, 9 Jun 2011 03:31:05 +0000 (03:31 +0000)]
Initial support for inline asm memory operand constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132768
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Cameron Zwarich [Thu, 9 Jun 2011 01:52:44 +0000 (01:52 +0000)]
Remove a vacuous condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132767
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Cameron Zwarich [Thu, 9 Jun 2011 01:45:33 +0000 (01:45 +0000)]
Fix PR10104 by adding a bounds check on a vector element access check. It was
assuming that all offsets are legal vector accesses, and thus trying to access
the float member of { <2 x float>, float } as the 3rd element of the first
member.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132766
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Eric Christopher [Thu, 9 Jun 2011 00:15:19 +0000 (00:15 +0000)]
If the alignment of the byval argument is greater than the alignment
of the frame then increase the maximum alignment of the frame to
match.
Fixes PR6965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132764
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Eric Christopher [Wed, 8 Jun 2011 23:55:35 +0000 (23:55 +0000)]
Add a parameter to CCState so that it can access the MachineFunction.
No functional change.
Part of PR6965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763
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Cameron Zwarich [Wed, 8 Jun 2011 22:08:31 +0000 (22:08 +0000)]
Fix an assymmetry between ConvertScalar_ExtractValue and ConvertScalar_InsertValue. The
former was using the size of the entire alloca, whereas the latter was correctly using
the allocated size of the immediate type being converted (which may differ from the size
of the alloca). This fixes PR10082.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132759
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Akira Hatanaka [Wed, 8 Jun 2011 21:28:09 +0000 (21:28 +0000)]
Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the
dynamically allocated stack area was not set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132758
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Akira Hatanaka [Wed, 8 Jun 2011 17:39:33 +0000 (17:39 +0000)]
Reorganize code in MipsTargetLowering::LowerCall to improve readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132756
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Andrew Trick [Wed, 8 Jun 2011 15:19:49 +0000 (15:19 +0000)]
Remove a temporary test case probe in CheckForLiveRegDef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132751
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Rafael Espindola [Wed, 8 Jun 2011 14:23:19 +0000 (14:23 +0000)]
Fix count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132749
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Rafael Espindola [Wed, 8 Jun 2011 14:13:31 +0000 (14:13 +0000)]
Count how many phis we are creating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132748
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Cameron Zwarich [Tue, 7 Jun 2011 23:54:00 +0000 (23:54 +0000)]
Fix an issue where the two-address conversion pass incorrectly rewrites untied
operands to an early clobber register. This fixes <rdar://problem/
9566076>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132738
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Rafael Espindola [Tue, 7 Jun 2011 23:26:45 +0000 (23:26 +0000)]
Fix a silly error I introduce in r131951.
Fixes PR10095.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132735
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Eric Christopher [Tue, 7 Jun 2011 22:20:13 +0000 (22:20 +0000)]
Create a new ARM directory for FrontendC tests and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132734
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Chad Rosier [Tue, 7 Jun 2011 20:41:31 +0000 (20:41 +0000)]
Fixed a few illegal paths with llvm_unreachable. Patch by Cameron McInally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132732
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Chad Rosier [Tue, 7 Jun 2011 20:03:13 +0000 (20:03 +0000)]
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132730
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Akira Hatanaka [Tue, 7 Jun 2011 19:28:39 +0000 (19:28 +0000)]
Refactor MipsTargetLowering::EmitInstrWithCustomInserter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132726
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Akira Hatanaka [Tue, 7 Jun 2011 19:03:14 +0000 (19:03 +0000)]
Put back removed line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132725
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Akira Hatanaka [Tue, 7 Jun 2011 18:58:42 +0000 (18:58 +0000)]
Coding style fixes.
- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132724
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Akira Hatanaka [Tue, 7 Jun 2011 18:16:51 +0000 (18:16 +0000)]
Use tabs to separate opcode and operand strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132718
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Akira Hatanaka [Tue, 7 Jun 2011 18:00:14 +0000 (18:00 +0000)]
Add comments for wrapper node patterns in MipsInstrInfo.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132717
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Roman Divacky [Tue, 7 Jun 2011 17:32:17 +0000 (17:32 +0000)]
Test that ".byte 1, 2, 3, 4" does the right thing.
Requested by nbjoerg!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132716
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Roman Divacky [Tue, 7 Jun 2011 17:31:02 +0000 (17:31 +0000)]
Make EmitIntValue() work properly on big-endian targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132715
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Stuart Hastings [Tue, 7 Jun 2011 15:23:11 +0000 (15:23 +0000)]
Tweak this test for ARM-hosted 'bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132711
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Lang Hames [Tue, 7 Jun 2011 06:05:58 +0000 (06:05 +0000)]
Switched to DenseMap for allowed sets in PBQP. Reduces total LLC time by 15% on CINT2006 for x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132707
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Nadav Rotem [Tue, 7 Jun 2011 05:23:58 +0000 (05:23 +0000)]
Move the legalizer tests to the X86 directory because the test uses the x86
codegen. Thanks Galina.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132706
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Akira Hatanaka [Tue, 7 Jun 2011 02:17:21 +0000 (02:17 +0000)]
Add test case for C++ exception handling and fix the following mistakes in MipsFrameLowering::emitPrologue:
- cfi directives are not inserted at the right location or in the right order.
- The source MachineLocation for the cfi directive that changes the cfa register
to $fp should be MachineLocation::VirtualFP.
- A PROLOG_LABEL that marks the beginning of cfi_offset directives for
callee-saved register is emitted even when no callee-saved registers are
saved.
- When a callee-saved double precision register is saved, two cfi_offset
directives, one for each of the paired single precision registers, should be
emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132703
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Andrew Trick [Tue, 7 Jun 2011 00:38:12 +0000 (00:38 +0000)]
Fix a merge bug in preRAsched for handling physreg aliases.
I've been sitting on this long enough trying to find a test case. I
think the fix should go in now, but I'll keep working on the test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132701
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Andrew Trick [Tue, 7 Jun 2011 00:08:49 +0000 (00:08 +0000)]
Fix for setjmp/longjmp exception handling on ARM. setjmp clobbers CPSR.
rdar://problem/
9556069
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132699
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