Akira Hatanaka [Thu, 20 Dec 2012 04:06:06 +0000 (04:06 +0000)]
[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
physical register $r1 to $r0.
GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.
Original patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655
91177308-0d34-0410-b5e6-
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Richard Smith [Thu, 20 Dec 2012 04:04:17 +0000 (04:04 +0000)]
Fix use-before-construction of X86TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170654
91177308-0d34-0410-b5e6-
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Richard Smith [Thu, 20 Dec 2012 04:02:58 +0000 (04:02 +0000)]
Don't use -1 as a value of an unsigned 7-bit enumeration; that has undefined
behavior and violates the !range constraints we put on loads of this enum.
Found by clang -fsanitize=enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170653
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Richard Smith [Thu, 20 Dec 2012 03:59:24 +0000 (03:59 +0000)]
Don't leave IsUnsigned uninitialized in a default-constructed APSInt. Copying
such a structure has undefined behavior. Caught by -fsanitize=bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170652
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Akira Hatanaka [Thu, 20 Dec 2012 03:52:08 +0000 (03:52 +0000)]
[mips] Change the order of template parameters. Move the default parameters to
the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170651
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Akira Hatanaka [Thu, 20 Dec 2012 03:48:24 +0000 (03:48 +0000)]
[mips] Refactor shift instructions with register operands. Separate encoding
information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650
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Akira Hatanaka [Thu, 20 Dec 2012 03:44:41 +0000 (03:44 +0000)]
[mips] Refactor shift immediate instructions. Separate encoding information
from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649
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Akira Hatanaka [Thu, 20 Dec 2012 03:40:03 +0000 (03:40 +0000)]
[mips] Refactor arithmetic and logic instructions with immediate operands.
Separate encoding information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Thu, 20 Dec 2012 03:34:05 +0000 (03:34 +0000)]
[mips] Refactor arithmetic and logic instructions. Separate encoding
information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170647
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Sean Silva [Thu, 20 Dec 2012 03:32:39 +0000 (03:32 +0000)]
docs: Show TOC for GettingStarted.rst.
This is a pretty lengthy document, so put the table of contents in your
face so that it's easier to scope out the content.
This document is a mess currently and needs to be
refactored/revised/split-up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170646
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Akira Hatanaka [Thu, 20 Dec 2012 03:00:16 +0000 (03:00 +0000)]
[mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and
ArithLogicI as the instruction base classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170642
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Sean Silva [Thu, 20 Dec 2012 02:40:45 +0000 (02:40 +0000)]
docs: Clean up adornments.
For whatever reason the usage of '^^^' and '---' adornments were
reversed compared to the "canonical" style of the LLVM docs (which is
currently "the style used in SphinxQuickstartTemplate.rst"). This change
doesn't affect the document structure at all, I'm just doing it for
trivial stylistic consistency (the document content is *much* more
important---thanks Nadav for writing this up!).
Also, trim the adornments to be the same length as the section names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170638
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Sean Silva [Thu, 20 Dec 2012 02:23:25 +0000 (02:23 +0000)]
docs: ASCII-fy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170637
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Nadav Rotem [Thu, 20 Dec 2012 02:00:02 +0000 (02:00 +0000)]
Loop Vectorizer: Enable if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170632
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Bill Wendling [Thu, 20 Dec 2012 01:36:59 +0000 (01:36 +0000)]
s/AttributesImpl/AttributeImpl/g This is going to apply to Attribute, not Attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170631
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Bob Wilson [Thu, 20 Dec 2012 01:36:20 +0000 (01:36 +0000)]
Do not introduce vector operations in functions marked with noimplicitfloat.
<rdar://problem/
12879313>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170630
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Jim Grosbach [Thu, 20 Dec 2012 01:14:48 +0000 (01:14 +0000)]
Clean up some DOxygen comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170629
91177308-0d34-0410-b5e6-
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Jim Grosbach [Thu, 20 Dec 2012 01:14:45 +0000 (01:14 +0000)]
Clean up some DOxygen comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170628
91177308-0d34-0410-b5e6-
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Richard Smith [Thu, 20 Dec 2012 01:05:39 +0000 (01:05 +0000)]
Fix an uninitialized member variable, found by -fsanitize=bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170627
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Nadav Rotem [Thu, 20 Dec 2012 00:49:56 +0000 (00:49 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170626
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Nadav Rotem [Thu, 20 Dec 2012 00:29:18 +0000 (00:29 +0000)]
doc: resize the image.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170622
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NAKAMURA Takumi [Thu, 20 Dec 2012 00:22:11 +0000 (00:22 +0000)]
Target/R600: Update MIB according to r170588.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170620
91177308-0d34-0410-b5e6-
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Nadav Rotem [Thu, 20 Dec 2012 00:03:36 +0000 (00:03 +0000)]
Doc: update the chart.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170618
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Bill Wendling [Wed, 19 Dec 2012 23:55:43 +0000 (23:55 +0000)]
Add a context so that once we uniquify strings we can access them easily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170615
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Jim Grosbach [Wed, 19 Dec 2012 23:38:53 +0000 (23:38 +0000)]
MC: Add MCInstrDesc::mayAffectControlFlow() method.
MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610
91177308-0d34-0410-b5e6-
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Jim Grosbach [Wed, 19 Dec 2012 23:38:49 +0000 (23:38 +0000)]
Add isSubRegisterEq() and isSuperRegisterEq().
isSub and isSuper return false if RegA == RegB. Add variants which also
include the identity function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170609
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Jim Grosbach [Wed, 19 Dec 2012 23:38:46 +0000 (23:38 +0000)]
Move isSubRegister() and isSuperRegister to MCRegisterInfo.
These were defined on TargetRegisterInfo, but they don't use any information
that's not available in MCRegisterInfo, so sink them down to be available
at the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170608
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Jim Grosbach [Wed, 19 Dec 2012 23:38:44 +0000 (23:38 +0000)]
Fix doc comment. '///' not '//'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170607
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Michael Ilseman [Wed, 19 Dec 2012 23:17:20 +0000 (23:17 +0000)]
Refactor isIntrinsic() to be quicker, and change classof() (and thus, isa<IntrinsicInst>()) to use it. This decreases the number of occurrences of the slow-path string matching performed by getIntrinsicID().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170602
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Bill Wendling [Wed, 19 Dec 2012 22:42:22 +0000 (22:42 +0000)]
s/AttributeListImpl/AttributeSetImpl/g to match the namechange of AttributeList.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170600
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Jakob Stoklund Olesen [Wed, 19 Dec 2012 22:35:46 +0000 (22:35 +0000)]
Always use addOperand(MF, MO) from MachineInstrBuilder.
The single-argument MachineInstr::addOperand(MO) will be removed soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170599
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Dmitri Gribenko [Wed, 19 Dec 2012 22:13:01 +0000 (22:13 +0000)]
Add a missing 'else'. Found by grep '} if'
No testcase because it is apparently not so trivial to construct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170595
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Tom Stellard [Wed, 19 Dec 2012 22:10:35 +0000 (22:10 +0000)]
R600: Add entry in CODE_OWNERS.TXT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170594
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Tom Stellard [Wed, 19 Dec 2012 22:10:34 +0000 (22:10 +0000)]
R600: Remove unecessary VREG alignment.
Unlike SGPRs VGPRs doesn't need to be aligned.
Patch by: Christian König
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170593
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Tom Stellard [Wed, 19 Dec 2012 22:10:33 +0000 (22:10 +0000)]
R600: control flow optimization
Branch if we have enough instructions so that it makes sense.
Also remove branches if they don't make sense.
Patch by: Christian König
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170592
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Tom Stellard [Wed, 19 Dec 2012 22:10:31 +0000 (22:10 +0000)]
R600: New control flow for SI v2
This patch replaces the control flow handling with a new
pass which structurize the graph before transforming it to
machine instruction. This has a couple of different advantages
and currently fixes 20 piglit tests without a single regression.
It is now a general purpose transformation that could be not
only be used for SI/R6xx, but also for other hardware
implementations that use a form of structurized control flow.
v2: further cleanup, fixes and documentation
Patch by: Christian König
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591
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Eric Christopher [Wed, 19 Dec 2012 22:02:53 +0000 (22:02 +0000)]
Split out abbreviations for the skeleton info from the rest of
the abbreviations. Part of implementing split dwarf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170589
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Jakob Stoklund Olesen [Wed, 19 Dec 2012 21:31:56 +0000 (21:31 +0000)]
Remove the explicit MachineInstrBuilder(MI) constructor.
Use the version that also takes an MF reference instead.
It would technically be possible to extract an MF reference from the MI
as MI->getParent()->getParent(), but that would not work for MIs that
are not inserted into any basic block.
Given the reasonably small number of places this constructor was used at
all, I preferred the compile time check to a run time assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170588
91177308-0d34-0410-b5e6-
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Nadav Rotem [Wed, 19 Dec 2012 20:47:04 +0000 (20:47 +0000)]
Fix a bug that was found by building clang with -fsanitize.
I introduced it in r166785. PR14291.
If TD is unavailable use getScalarSizeInBits, but don't optimize
pointers or vectors of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170586
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Meador Inge [Wed, 19 Dec 2012 20:16:40 +0000 (20:16 +0000)]
docs: Fix title underline warnings
Building Vectorizers.rst produces a few warnings of the form:
WARNING: Title underline too short.
Fixed by adding the extra needed dashes under the title.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170582
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Evan Cheng [Wed, 19 Dec 2012 20:16:09 +0000 (20:16 +0000)]
LLVM sdisel normalize bit extraction of the form:
((x & 0xff00) >> 8) << 2
to
(x >> 6) & 0x3fc
This is general goodness since it folds a left shift into the mask. However,
the trailing zeros in the mask prevents the ARM backend from using the bit
extraction instructions. And worse since the mask materialization may require
an addition instruction. This comes up fairly frequently when the result of
the bit twiddling is used as memory address. e.g.
= ptr[(x & 0xFF0000) >> 16]
We want to generate:
ubfx r3, r1, #16, #8
ldr.w r3, [r0, r3, lsl #2]
vs.
mov.w r9, #1020
and.w r2, r9, r1, lsr #14
ldr r2, [r0, r2]
Add a late ARM specific isel optimization to
ARMDAGToDAGISel::PreprocessISelDAG(). It folds the left shift to the
'base + offset' address computation; change the mask to one which doesn't have
trailing zeros and enable the use of ubfx.
Note the optimization has to be done late since it's target specific and we
don't want to change the DAG normalization. It's also fairly restrictive
as shifter operands are not always free. It's only done for lsh 1 / 2. It's
known to be free on some cpus and they are most common for address
computation.
This is a slight win for blowfish, rijndael, etc.
rdar://
12870177
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170581
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Benjamin Kramer [Wed, 19 Dec 2012 20:11:17 +0000 (20:11 +0000)]
Remove edis remnant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170580
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Roman Divacky [Wed, 19 Dec 2012 19:55:47 +0000 (19:55 +0000)]
Remove edis - the enhanced disassembler. Fixes PR14654.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170578
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Paul Redmond [Wed, 19 Dec 2012 19:47:13 +0000 (19:47 +0000)]
Transform (x&C)>V into (x&C)!=0 where possible
When the least bit of C is greater than V, (x&C) must be greater than V
if it is not zero, so the comparison can be simplified.
Although this was suggested in Target/X86/README.txt, it benefits any
architecture with a directly testable form of AND.
Patch by Kevin Schoedel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170576
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Jakob Stoklund Olesen [Wed, 19 Dec 2012 19:19:01 +0000 (19:19 +0000)]
Add an MF argument to MachineInstr::addOperand().
Just like for addMemOperand(), the function pointer provides a context
for allocating memory. This will make it possible to use a better memory
allocation strategy for the MI operand list, which is currently a slow
std::vector.
Most calls to addOperand() come from MachineInstrBuilder, so give that
class an MF reference as well. Code using BuildMI() won't need changing
at all since the MF reference is already required to allocate a
MachineInstr.
Future patches will fix code that calls MI::addOperand(Op) directly, as
well as code that uses the now deprecated MachineInstrBuilder(MI)
constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170574
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Chad Rosier [Wed, 19 Dec 2012 18:06:44 +0000 (18:06 +0000)]
Remove superfluous brief command from getAsString.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170569
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Nadav Rotem [Wed, 19 Dec 2012 18:04:44 +0000 (18:04 +0000)]
doc: add subsections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170568
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Nadav Rotem [Wed, 19 Dec 2012 18:02:36 +0000 (18:02 +0000)]
DOC: document the use of O2, O3 and Os with -fvectorize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170567
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Benjamin Kramer [Wed, 19 Dec 2012 15:49:14 +0000 (15:49 +0000)]
PowerPC: Expand VSELECT nodes.
There's probably a better expansion for those nodes than the default for
altivec, but this is better than crashing. VSELECTs occur in loop vectorizer
output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170551
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Patrik Hagglund [Wed, 19 Dec 2012 15:19:11 +0000 (15:19 +0000)]
Change AsmOperandInfo::ConstraintVT to MVT, instead of EVT.
Accordingly, add MVT::getVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170550
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Rafael Espindola [Wed, 19 Dec 2012 14:48:05 +0000 (14:48 +0000)]
Revert 170545 while I debug the ppc failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170547
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Benjamin Kramer [Wed, 19 Dec 2012 14:34:28 +0000 (14:34 +0000)]
Make TargetLowering::getTypeConversion more resilient against odd illegal MVTs.
- An MVT can become an EVT when being split (e.g. v2i8 -> v1i8, the latter doesn't exist)
- Return the scalar value when an MVT is scalarized (v1i64 -> i64)
Fixes PR14639ff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170546
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Rafael Espindola [Wed, 19 Dec 2012 14:15:04 +0000 (14:15 +0000)]
Add r170095 back.
I cannot reproduce it the failures locally, so I will keep an eye at the ppc
bots. This patch does add the change to the "Disassembly of section" message,
but that is not what was failing on the bots.
Original message:
Add a funciton to get the segment name of a section.
On MachO, sections also have segment names. When a tool looking at a .o file
prints a segment name, this is what they mean. In reality, a .o has only one
anonymous, segment.
This patch adds a MachO only function to fetch that segment name. I named it
getSectionFinalSegmentName since the main use for the name seems to be infor
the linker with segment this section should go to.
The patch also changes MachOObjectFile::getSectionName to return just the
section name instead of computing SegmentName,SectionName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170545
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Evgeniy Stepanov [Wed, 19 Dec 2012 13:55:51 +0000 (13:55 +0000)]
[msan] Add track-origins argument to the pass constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170544
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Dmitri Gribenko [Wed, 19 Dec 2012 12:51:48 +0000 (12:51 +0000)]
Documentation: add a missing space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170542
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Patrik Hagglund [Wed, 19 Dec 2012 12:33:30 +0000 (12:33 +0000)]
Split the usage of 'EVT PartVT' into 'MVT PartVT' and 'EVT PartEVT'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170540
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Alexey Samsonov [Wed, 19 Dec 2012 12:30:33 +0000 (12:30 +0000)]
CMake: factor out a function that returns the expected directory for unit test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170539
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Patrik Hagglund [Wed, 19 Dec 2012 12:23:01 +0000 (12:23 +0000)]
Change RegVT in BitTestBlock and RegsForValue, to contain MVTs,
instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170538
91177308-0d34-0410-b5e6-
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Patrik Hagglund [Wed, 19 Dec 2012 12:02:25 +0000 (12:02 +0000)]
Change TargetLowering::getTypeForExtArgOrReturn to take and return
MVTs, instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170537
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Patrik Hagglund [Wed, 19 Dec 2012 11:53:21 +0000 (11:53 +0000)]
Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170536
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Patrik Hagglund [Wed, 19 Dec 2012 11:48:16 +0000 (11:48 +0000)]
Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170535
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Patrik Hagglund [Wed, 19 Dec 2012 11:42:00 +0000 (11:42 +0000)]
Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170534
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Patrik Hagglund [Wed, 19 Dec 2012 11:37:12 +0000 (11:37 +0000)]
Change TargetLowering::getRepRegClassCostFor, getIndexedLoadAction,
getIndexedStoreAction, and addRegisterClass to take and MVT, instead
of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170533
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Patrik Hagglund [Wed, 19 Dec 2012 11:30:36 +0000 (11:30 +0000)]
Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170532
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Evgeniy Stepanov [Wed, 19 Dec 2012 11:22:04 +0000 (11:22 +0000)]
[msan] Heuristically instrument unknown intrinsics.
This changes adds shadow and origin propagation for unknown intrinsics
by examining the arguments and ModRef behaviour. For now, only 3 classes
of intrinsics are handled:
- those that look like simple SIMD store
- those that look like simple SIMD load
- those that don't have memory effects and look like arithmetic/logic/whatever
operation on simple types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170530
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Patrik Hagglund [Wed, 19 Dec 2012 11:21:04 +0000 (11:21 +0000)]
Change TargetLowering::getTypeToPromoteTo to take and return MVTs,
instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170529
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Benjamin Kramer [Wed, 19 Dec 2012 11:09:15 +0000 (11:09 +0000)]
LoopVectorize: Make iteration over induction variables not depend on pointer values.
MapVector is a bit heavyweight, but I don't see a simpler way. Also the
InductionList is unlikely to be large. This should help 3-stage selfhost
compares (PR14647).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170528
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Benjamin Kramer [Wed, 19 Dec 2012 11:08:33 +0000 (11:08 +0000)]
MapVector: Add lookup().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170527
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Patrik Hagglund [Wed, 19 Dec 2012 10:19:55 +0000 (10:19 +0000)]
Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170524
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NAKAMURA Takumi [Wed, 19 Dec 2012 10:12:48 +0000 (10:12 +0000)]
X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170523
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Patrik Hagglund [Wed, 19 Dec 2012 10:09:26 +0000 (10:09 +0000)]
Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170522
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Bill Wendling [Wed, 19 Dec 2012 09:15:11 +0000 (09:15 +0000)]
Inline hasFunctionOnlyAttrs into its only use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170518
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Bill Wendling [Wed, 19 Dec 2012 09:04:58 +0000 (09:04 +0000)]
Inline the only use of the hasParameterOnlyAttrs method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170517
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Bill Wendling [Wed, 19 Dec 2012 08:57:40 +0000 (08:57 +0000)]
Inline the 'hasIncompatibleWithVarArgsAttrs' method into its only uses. And some minor comment reformatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170516
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Nadav Rotem [Wed, 19 Dec 2012 08:43:05 +0000 (08:43 +0000)]
DOC: fix the url format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170513
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Patrik Hagglund [Wed, 19 Dec 2012 08:28:51 +0000 (08:28 +0000)]
Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170510
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Nadav Rotem [Wed, 19 Dec 2012 08:28:24 +0000 (08:28 +0000)]
DOC: add a benchmarks that compares us to gcc and icc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170509
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Elena Demikhovsky [Wed, 19 Dec 2012 07:50:20 +0000 (07:50 +0000)]
Optimized load + SIGN_EXTEND patterns in the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170506
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Nadav Rotem [Wed, 19 Dec 2012 07:39:08 +0000 (07:39 +0000)]
After reducing the size of an operation in the DAG we zero-extend the reduced
bitwidth op back to the original size. If we reduce ANDs then this can cause
an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits
are equal or smaller than the size of the reduced operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170505
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Nadav Rotem [Wed, 19 Dec 2012 07:36:35 +0000 (07:36 +0000)]
docs: fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170504
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Nadav Rotem [Wed, 19 Dec 2012 07:22:24 +0000 (07:22 +0000)]
DOC: Add a webpage that describes the loop and bb vectorizers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170503
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Bill Wendling [Wed, 19 Dec 2012 07:18:57 +0000 (07:18 +0000)]
Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502
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Craig Topper [Wed, 19 Dec 2012 06:43:58 +0000 (06:43 +0000)]
Remove more of 'else's after 'returns'. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170497
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Craig Topper [Wed, 19 Dec 2012 06:39:17 +0000 (06:39 +0000)]
Remove a bunch of 'else's after 'returns'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170496
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Craig Topper [Wed, 19 Dec 2012 06:12:28 +0000 (06:12 +0000)]
Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170495
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Reed Kotler [Wed, 19 Dec 2012 04:06:15 +0000 (04:06 +0000)]
Add some missing Defs and Uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170493
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Shuxin Yang [Wed, 19 Dec 2012 01:10:17 +0000 (01:10 +0000)]
Make sure the buffer, which containas an instance of APFloat, has proper alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170486
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Kevin Enderby [Tue, 18 Dec 2012 23:47:28 +0000 (23:47 +0000)]
Add to the disassembler C API an option to print the disassembled
instructions in the assembly code variant if one exists.
The intended use for this is so tools like lldb and darwin's otool(1)
can be switched to print Intel-flavored disassembly.
I discussed extensively this API with Jim Grosbach and we feel
while it may not be fully general, in reality there is only one syntax
for each assembly with the exception of X86 which has exactly
two for historical reasons.
rdar://
10989182
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170477
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Jakob Stoklund Olesen [Tue, 18 Dec 2012 23:40:14 +0000 (23:40 +0000)]
Remove MachineInstr::setIsInsideBundle().
The bundle flags are now maintained by the slightly higher-level
functions bundleWithPred() / bundleWithSucc() which enforce consistent
bundle flags between neighboring instructions.
See also MIBundleBuilder for an even higher-level approach to building
bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170475
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Jakob Stoklund Olesen [Tue, 18 Dec 2012 23:21:49 +0000 (23:21 +0000)]
Use bidirectional bundle flags to simplify important functions.
The bundle_iterator::operator++ function now doesn't need to dig out the
basic block and check against end(). It can use the isBundledWithSucc()
flag to find the last bundled instruction safely.
Similarly, MachineInstr::isBundled() no longer needs to look at
iterators etc. It only has to look at flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170473
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Shuxin Yang [Tue, 18 Dec 2012 23:10:12 +0000 (23:10 +0000)]
rdar://
12801297
InstCombine for unsafe floating-point add/sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170471
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Nadav Rotem [Tue, 18 Dec 2012 23:09:44 +0000 (23:09 +0000)]
Enable the loop vectorizer in clang and not in the pass manager, so that we can disable it in clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170470
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Jakob Stoklund Olesen [Tue, 18 Dec 2012 23:00:28 +0000 (23:00 +0000)]
Verify bundle flag consistency when setting them.
Now that the bundle flag aware APIs are all in place, it is possible to
continuously verify the flag consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170465
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Jakub Staszak [Tue, 18 Dec 2012 22:57:56 +0000 (22:57 +0000)]
Reverse order of checking SSE level when calculating compare cost, so we check
AVX2 before AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170464
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Jakob Stoklund Olesen [Tue, 18 Dec 2012 22:55:07 +0000 (22:55 +0000)]
Verify bundle flags for consistency in MachineVerifier.
The new bidirectional bundle flags are redundant, so inadvertent bundle
tearing can be detected in the machine code verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170463
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Quentin Colombet [Tue, 18 Dec 2012 22:47:16 +0000 (22:47 +0000)]
Disable ARM partial flag dependency optimization at -Oz
To not over constrain the scheduler for ARM in thumb mode, some optimizations for code size reduction, specific to ARM thumb, are blocked when they add a dependency (like write after read dependency).
Disables this check when code size is the priority, i.e., code is compiled with -Oz.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170462
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Jakob Stoklund Olesen [Tue, 18 Dec 2012 21:36:05 +0000 (21:36 +0000)]
Don't allow the automatically updated MI flags to be set directly.
The bundle-related MI flags need to be kept in sync with the neighboring
instructions. Don't allow the bulk flag-setting setFlags() function to
change them.
Also don't copy MI flags when cloning an instruction. The clone's bundle
flags will be set when it is explicitly inserted into a bundle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170459
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Jakob Stoklund Olesen [Tue, 18 Dec 2012 20:59:41 +0000 (20:59 +0000)]
Tighten up the splice() API for bundled instructions.
Remove the instr_iterator versions of the splice() functions. It doesn't
seem useful to be able to splice sequences of instructions that don't
consist of full bundles.
The normal splice functions that take MBB::iterator arguments are not
changed, and they can move whole bundles around without any problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170456
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Andrew Trick [Tue, 18 Dec 2012 20:53:01 +0000 (20:53 +0000)]
MISched: add dependence to ExitSU to model live-out latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170454
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Andrew Trick [Tue, 18 Dec 2012 20:52:58 +0000 (20:52 +0000)]
MISched: Cleanup, redundant statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170453
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