Use the AliasAnalysis interface to determine how a Function accesses
memory. This isn't a real improvement with present day AliasAnalysis
implementations; it's mainly for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118624 91177308-0d34-0410-b5e6-96231b3b80d8

VAArg doesn't capture its operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118623 91177308-0d34-0410-b5e6-96231b3b80d8

Translate IntrReadArgMem to AccessesArgumentsReadonly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118622 91177308-0d34-0410-b5e6-96231b3b80d8

Teach AliasAnalysis about AccessesArgumentsReadonly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118621 91177308-0d34-0410-b5e6-96231b3b80d8

Teach LICM and AliasSetTracker about AccessesArgumentsReadonly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118618 91177308-0d34-0410-b5e6-96231b3b80d8

Teach FunctionAttrs about AccessesArgumentsReadonly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118617 91177308-0d34-0410-b5e6-96231b3b80d8

Add a trivial virtual dtor to AbstractRegisterDescription to appease
-Wnon-virtual-dtor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118616 91177308-0d34-0410-b5e6-96231b3b80d8

AccessesArgumentsReadonly is read-only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118615 91177308-0d34-0410-b5e6-96231b3b80d8

Add a AccessesArgumentsReadonly ModRefBehavior value, so that the intrinsic
property IntrReadArgMem can be modeled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118614 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting r118604. Windows build broke.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118613 91177308-0d34-0410-b5e6-96231b3b80d8

Factor out the logic for onlyReadsMemory into a helper function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118611 91177308-0d34-0410-b5e6-96231b3b80d8

Delete AccessesArgumentsAndGlobals, which was unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118610 91177308-0d34-0410-b5e6-96231b3b80d8

Handle ARM constant pool values that need an explicit reference to the '.'
pseudo-label. (TLS stuff).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118609 91177308-0d34-0410-b5e6-96231b3b80d8

add a case we fail to devirt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118608 91177308-0d34-0410-b5e6-96231b3b80d8

Trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118606 91177308-0d34-0410-b5e6-96231b3b80d8

Adds RABasic verification and tracing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118604 91177308-0d34-0410-b5e6-96231b3b80d8

Further MCize ARM constant pool values. This allows basic PIC references for
object file emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118601 91177308-0d34-0410-b5e6-96231b3b80d8

Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118600 91177308-0d34-0410-b5e6-96231b3b80d8

Last try to get this reference counting right, I swear.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118589 91177308-0d34-0410-b5e6-96231b3b80d8

Really fix the leak in the attributes list.  Thanks to Benjamin Kramer for pointing out how I was being stupid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118588 91177308-0d34-0410-b5e6-96231b3b80d8

For ARM load/store instructions, encode [reg+reg] with no shifter immediate as
a left shift by zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118587 91177308-0d34-0410-b5e6-96231b3b80d8

ARM .word data fixups don't need an adjustment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118586 91177308-0d34-0410-b5e6-96231b3b80d8

Factorize code, no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118516 91177308-0d34-0410-b5e6-96231b3b80d8

Fix trailing whitespace and style, no functionality change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118515 91177308-0d34-0410-b5e6-96231b3b80d8

Add encoder method for ARM load/store shifted register offset operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118513 91177308-0d34-0410-b5e6-96231b3b80d8

Testcase for PR8211 (llc crash at -O0).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118509 91177308-0d34-0410-b5e6-96231b3b80d8

System/Path/Windows: Implement GetLLVMDefaultConfigDir.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118507 91177308-0d34-0410-b5e6-96231b3b80d8

System/Path/Windows: Generalize GetUserHomeDirectory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118506 91177308-0d34-0410-b5e6-96231b3b80d8

System/Path/Windows: Make GetSystemLibraryPaths more generic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118505 91177308-0d34-0410-b5e6-96231b3b80d8

System/Windows: Reduce dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118504 91177308-0d34-0410-b5e6-96231b3b80d8

System/Windows: Use normalized case and include method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118503 91177308-0d34-0410-b5e6-96231b3b80d8

System/Path/Windows: Change GetRootDirectory to return file:/// instead of C:/.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118502 91177308-0d34-0410-b5e6-96231b3b80d8

Update comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118501 91177308-0d34-0410-b5e6-96231b3b80d8

Fix leak in my recent fix for PR8442.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118490 91177308-0d34-0410-b5e6-96231b3b80d8

Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
in order to fold it into a load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118471 91177308-0d34-0410-b5e6-96231b3b80d8

Delete an extraneous svn:executable property.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118470 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for a few simple fixups to the ARM Darwin asm backend. This allows
constant pool references and global variable refernces to resolve properly
for object file generation. For example,

int x;
void foo(unsigned a, unsigned *p) {
  p[a] = x;
}

can now be successfully compiled directly to an (ARM mode) object file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118469 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an inline asm pasto from 117667; was preventing
{i64, i64} from matching i128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118465 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some places where error messages were being swallowed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118464 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR8441, a thread unsafe static variable in our dynamic library loading facilities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118463 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r118457 and r118458. These won't hold for GPRs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118462 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR8441, a race condition in the static attributes list.  While the reference counting was itself threadsafe,
the implicit removal of each object from the global list was not.  Make this operation atomic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118461 91177308-0d34-0410-b5e6-96231b3b80d8

Get the register and count from the register list operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118458 91177308-0d34-0410-b5e6-96231b3b80d8

reglist has two operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118457 91177308-0d34-0410-b5e6-96231b3b80d8

The "addRegListOperands()" function returns the start register and the total
number of registers in the list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118456 91177308-0d34-0410-b5e6-96231b3b80d8

Add some comments noting some correspondences between ModRefBehavior
values, LLVM IR function attributes, and LLVM intrinsic attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118455 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for ARM's specialized vector-compare-against-zero instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118453 91177308-0d34-0410-b5e6-96231b3b80d8

Initial support for Mips32 and Mips32r2. Patch contributed by Akira Hatanaka (ahatanaka@mips.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118447 91177308-0d34-0410-b5e6-96231b3b80d8

Add "write back" bit encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118446 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR8211

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118445 91177308-0d34-0410-b5e6-96231b3b80d8

Remove contributor names as per coding statndard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118442 91177308-0d34-0410-b5e6-96231b3b80d8

Add an additional test for icmp of select folding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118441 91177308-0d34-0410-b5e6-96231b3b80d8

Re-introduce the MaxLookup limit to BasicAliasAnalysis'
pointsToConstantMemory code to guard against possible
compile time slowdowns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118440 91177308-0d34-0410-b5e6-96231b3b80d8

Add a testcase for a call which BasicAA says only accesses memory through
its arguments and which TBAA says doesn't write to memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118439 91177308-0d34-0410-b5e6-96231b3b80d8

Adding working version of assembly parser for the MBlaze backend
Major cleanup of whitespace and formatting issues in MBlaze backend

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118434 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a thinko that Duncan spotted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118430 91177308-0d34-0410-b5e6-96231b3b80d8

Revert 118422 in search of bot verdancy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118429 91177308-0d34-0410-b5e6-96231b3b80d8

Document parameters. Fix typos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118424 91177308-0d34-0410-b5e6-96231b3b80d8

Adds support for spilling previously allocated live intervals to
handle cases in which a register is unavailable for spill code.
Adds LiveIntervalUnion::extract. While processing interferences on a
live virtual register, reuses the same Query object for each
physcial reg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118423 91177308-0d34-0410-b5e6-96231b3b80d8

Support -mcpu=cortex-a8 in ARM attributes - Has Fixme. 1 Test modified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118422 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118421 91177308-0d34-0410-b5e6-96231b3b80d8

Make FunctionAttrs TBAA-aware.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118417 91177308-0d34-0410-b5e6-96231b3b80d8

Implement getModRefBehavior for TypeBasedAliasAnalysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118416 91177308-0d34-0410-b5e6-96231b3b80d8

Complete listing of ARM/MC/ELF relocation enums

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118413 91177308-0d34-0410-b5e6-96231b3b80d8

Extend the AliasAnalysis::pointsToConstantMemory interface to allow it
to optionally look for constant or local (alloca) memory.

Teach BasicAliasAnalysis::pointsToConstantMemory to look through Select
and Phi nodes, and to support looking for local memory.

Remove FunctionAttrs' PointsToLocalOrConstantMemory function, now that
AliasAnalysis knows all the tricks that it knew.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118412 91177308-0d34-0410-b5e6-96231b3b80d8

Delete getIntrinsicModRefBehavior. Clients can just use the normal
getModRefBehavior now, since it now understands intrinsics as well
as normal functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118411 91177308-0d34-0410-b5e6-96231b3b80d8

Make FunctionAttrs use AliasAnalysis::getModRefBehavior, now that it
knows about intrinsic functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118410 91177308-0d34-0410-b5e6-96231b3b80d8

Teach BasicAliasAnalysis::getModRefBehavior(const Function *F)
to analyze intrinsic functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118409 91177308-0d34-0410-b5e6-96231b3b80d8

Add comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118408 91177308-0d34-0410-b5e6-96231b3b80d8

svn:ignore

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118405 91177308-0d34-0410-b5e6-96231b3b80d8

Add generating function declaration for PTX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118398 91177308-0d34-0410-b5e6-96231b3b80d8

Add physical register counting functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118397 91177308-0d34-0410-b5e6-96231b3b80d8

Add a dummy PTXMCAsmStreamer class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118396 91177308-0d34-0410-b5e6-96231b3b80d8

Set default flags for .rodata.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118395 91177308-0d34-0410-b5e6-96231b3b80d8

Add registry hook for assembly text output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118394 91177308-0d34-0410-b5e6-96231b3b80d8

Make RegList an ASM operand so that TableGen will generate code for it. This is
an initial implementation and may change once reglists are fully fleshed out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118390 91177308-0d34-0410-b5e6-96231b3b80d8

Revert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118389 91177308-0d34-0410-b5e6-96231b3b80d8

Add simplification of floating point comparisons with the result
of a select instruction, the same as already exists for integer
comparisons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118379 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a README item: when doing a comparison with the result
of a select instruction, see if doing the compare with the
true and false values of the select gives the same result.
If so, that can be used as the value of the comparison.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118378 91177308-0d34-0410-b5e6-96231b3b80d8

Speed up AddSectionToTheEnd. It was walking all fragments in all sections.
This is really slow with we have 1000s of sections each with a corresponding
relocation section. Also, it is only used by the ELF writer to add
basic data, so there is no need to force a new layout pass.

Should fix PR8563.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118377 91177308-0d34-0410-b5e6-96231b3b80d8

typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118376 91177308-0d34-0410-b5e6-96231b3b80d8

In this context, a reglist is a reg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118375 91177308-0d34-0410-b5e6-96231b3b80d8

Fix memory leak in StringRef::edit_distance().  'Allocated' could be leaked on an early return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118370 91177308-0d34-0410-b5e6-96231b3b80d8

Testcase for llvm-gcc 118368.  8629268.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118369 91177308-0d34-0410-b5e6-96231b3b80d8

Add method for checking if a path is a symbolic link.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118367 91177308-0d34-0410-b5e6-96231b3b80d8

Relax dwarf line fragments. This fixes a crash in the included testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118365 91177308-0d34-0410-b5e6-96231b3b80d8

implement aliases for div/idiv that have an explicit A register operand,
implementing rdar://8431864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118364 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for parsing register lists. We can't use a bitfield to keep track of
the registers, because the register numbers may be much greater than the number
of bits available in the machine's register.

I extracted the register list verification code out of the actual parsing of the
registers. This made checking for errors much easier. It also limits the number
of warnings that would be emitted for cascading infractions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118363 91177308-0d34-0410-b5e6-96231b3b80d8

add aliases for movs between seg registers and mem.  There are multiple
different forms of this instruction (movw/movl/movq) which we reported
as being ambiguous.  Since they all do the same thing, gas just picks the
one with the shortest encoding.  Follow its lead here.

This implements rdar://8208615

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118362 91177308-0d34-0410-b5e6-96231b3b80d8

move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118361 91177308-0d34-0410-b5e6-96231b3b80d8

Return the base register of a register list for the "getReg()" method. This is
to satisfy the ClassifyOperand method of the Asm matcher without having to add a
RegList type to every back-end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118360 91177308-0d34-0410-b5e6-96231b3b80d8

pass literals like $$1 through to the asm matcher.  This isn't right yet, but doesn't hurt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118359 91177308-0d34-0410-b5e6-96231b3b80d8

work-in-progress

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118358 91177308-0d34-0410-b5e6-96231b3b80d8

General cleanup:

- Make ARMOperand a class so that some things are internal to the class.
- Reformatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118357 91177308-0d34-0410-b5e6-96231b3b80d8

go to great lengths to work around a GAS bug my previous patch
exposed:

GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.

Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).

As such, switch the canonical form of this instruction to "pi" instead
of "ip".  This makes the code generator and disassembler generate pi,
avoiding the gas bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8

rework the rotate-by-1 instructions to be defined like the
shift-by-1 instructions, where the asmstring doesn't contain
the implicit 1.  It turns out that a bunch of these rotate
instructions were completely broken because they used 1
instead of $1.

This fixes assembly mismatches on "rclb $1, %bl" and friends,
where we used to generate the 3 byte form, we now generate the
proper 2-byte form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118355 91177308-0d34-0410-b5e6-96231b3b80d8

change the fp comparison instructions to not have %st0 explicitly
listed in its asm string, for consistency with the other similar
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118354 91177308-0d34-0410-b5e6-96231b3b80d8

move the plethora of fp stack aliases to the .td file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118353 91177308-0d34-0410-b5e6-96231b3b80d8

add (and document) the ability for alias results to have
fixed physical registers.  Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118352 91177308-0d34-0410-b5e6-96231b3b80d8

Add a RegList (register list) object to ARMOperand. It will be used soon to hold
(surprise!) a list of registers. Register lists are consecutive, so we only need
to record the start register plus the number of registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118351 91177308-0d34-0410-b5e6-96231b3b80d8