fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)
fix hack in division (clean up frcpa instruction)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21153 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: InstCombine/2005-05-07-UDivSelectCrash.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21152 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase that crashes the instcombiner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21151 91177308-0d34-0410-b5e6-96231b3b80d8

Optimized code sequences for setcc reg, 0
Optimized code sequence for (a < 0) ? b : 0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21150 91177308-0d34-0410-b5e6-96231b3b80d8

Alpha zero extends setcc results

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21149 91177308-0d34-0410-b5e6-96231b3b80d8

If a target zero or sign extends the result of its setcc, allow folding of
this into sign/zero extension instructions later.

On PPC, for example, this testcase:

%G = external global sbyte
implementation
void %test(int %X, int %Y) {
  %C = setlt int %X, %Y
  %D = cast bool %C to sbyte
  store sbyte %D, sbyte* %G
  ret void
}

Now codegens to:

        cmpw cr0, r3, r4
        li r3, 1
        li r4, 0
        blt .LBB_test_2 ;
.LBB_test_1:    ;
        or r3, r4, r4
.LBB_test_2:    ;
        addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
        lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
        stb r3, 0(r2)

instead of:

        cmpw cr0, r3, r4
        li r3, 1
        li r4, 0
        blt .LBB_test_2 ;
.LBB_test_1:    ;
        or r3, r4, r4
.LBB_test_2:    ;
***     rlwinm r3, r3, 0, 31, 31
        addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
        lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
        stb r3, 0(r2)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21148 91177308-0d34-0410-b5e6-96231b3b80d8

PowerPC zero extends setcc results

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21147 91177308-0d34-0410-b5e6-96231b3b80d8

X86 zero extends setcc results

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21146 91177308-0d34-0410-b5e6-96231b3b80d8

Allow targets which produce setcc results in non-MVT::i1 registers to describe
what the contents of the top bits of these registers are, in the common cases
of targets that sign and zero extend the results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21145 91177308-0d34-0410-b5e6-96231b3b80d8

Remove somethign I had for testing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21144 91177308-0d34-0410-b5e6-96231b3b80d8

fix a small optimization opertunity and make gcc happy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21143 91177308-0d34-0410-b5e6-96231b3b80d8

This patch does two things.  First, it canonicalizes 'X >= C' -> 'X > C-1'
(likewise for <= >=u >=u).

Second, it implements a special case hack to turn 'X gtu SINTMAX' -> 'X lt 0'

On powerpc, for example, this changes this:

        lis r2, 32767
        ori r2, r2, 65535
        cmplw cr0, r3, r2
        bgt .LBB_test_2

into:

        cmpwi cr0, r3, 0
        blt .LBB_test_2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21142 91177308-0d34-0410-b5e6-96231b3b80d8

match case change in codegen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21141 91177308-0d34-0410-b5e6-96231b3b80d8

fixup magic constant making code.  tested by thousands of random divisions.... by 10000.  ok, so random divisors would be good too, but this at least fixes some things

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21140 91177308-0d34-0410-b5e6-96231b3b80d8

lowercase instructions, makes diff happier

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21139 91177308-0d34-0410-b5e6-96231b3b80d8

Implement the following xforms:
(X-Y)-X --> -Y
A + (B - A) --> B
(B - A) + A --> B

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21138 91177308-0d34-0410-b5e6-96231b3b80d8

new test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21137 91177308-0d34-0410-b5e6-96231b3b80d8

Implement InstCombine/add.ll:test28, transforming C1-(X+C2) --> (C1-C2)-X.
This occurs several dozen times in specint2k, particularly in crafty and gcc
apparently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21136 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21135 91177308-0d34-0410-b5e6-96231b3b80d8

Transform X-(X+Y) == -Y and X-(Y+X) == -Y

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21134 91177308-0d34-0410-b5e6-96231b3b80d8

It wasn't happy about this either

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21133 91177308-0d34-0410-b5e6-96231b3b80d8

Yea, it wasn't happy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21132 91177308-0d34-0410-b5e6-96231b3b80d8

teach asmprinter to print s8/s14 operands

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21131 91177308-0d34-0410-b5e6-96231b3b80d8

codegen immediate forms of add/sub/shift

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21130 91177308-0d34-0410-b5e6-96231b3b80d8

add immediate forms of add, sub, shift

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21129 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a really scary bug that Nate found where we weren't deleting the right
elements auto of the autoCSE maps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21128 91177308-0d34-0410-b5e6-96231b3b80d8

Pattern match bitfield insert, which helps shift long by immediate, among
other things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21127 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some shift bugs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21126 91177308-0d34-0410-b5e6-96231b3b80d8

Make these 64 bit constants so that this compiles on x86-32 as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21125 91177308-0d34-0410-b5e6-96231b3b80d8

added sdiv by 2^k and works for neg divisors also

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21124 91177308-0d34-0410-b5e6-96231b3b80d8

Don't make this require loopsimplify.  It works BETTER with loop simplify
but should not require it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21123 91177308-0d34-0410-b5e6-96231b3b80d8

Teach ExpandShift how to handle shifts by a constant.  This allows targets
like PowerPC to codegen long shifts in many fewer instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21122 91177308-0d34-0410-b5e6-96231b3b80d8

fix copy/paste errors, and add imm support to SxADDQ and SxSUBQ

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21121 91177308-0d34-0410-b5e6-96231b3b80d8

Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not
properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21120 91177308-0d34-0410-b5e6-96231b3b80d8

simplified

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21119 91177308-0d34-0410-b5e6-96231b3b80d8

added first alpha codegen regression test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21117 91177308-0d34-0410-b5e6-96231b3b80d8

Added Nate's div by constant stuff, also scaled operations!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21116 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a namespace issue, reported by Vladimir Merzliakov!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21115 91177308-0d34-0410-b5e6-96231b3b80d8

steal sampo's div-by-constant-power-of-2 stuff
thanks sampo!!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21113 91177308-0d34-0410-b5e6-96231b3b80d8

add fms instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21112 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed version of optimized integer divide is now fixed.  Calculate the
quotient, not the remainder.  Also, make sure to remove the old div operand
from the ExprMap and let SelectExpr insert the new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21111 91177308-0d34-0410-b5e6-96231b3b80d8

lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take
care of this ourselves

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21110 91177308-0d34-0410-b5e6-96231b3b80d8

make sure 'special' registers don't get allocated

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21109 91177308-0d34-0410-b5e6-96231b3b80d8

document these nodes, as they are nonobvious

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21108 91177308-0d34-0410-b5e6-96231b3b80d8

Add (untested) support for MULHS and MULHU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21107 91177308-0d34-0410-b5e6-96231b3b80d8

add signed versions of the extra precision multiplies

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21106 91177308-0d34-0410-b5e6-96231b3b80d8

Turn off the div -> mul optimization until it works correctly 100% of the
time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21105 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for MULHS and MULHU nodes
Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21104 91177308-0d34-0410-b5e6-96231b3b80d8

Expand SREM and UREM for targets that claim not to have them, like PowerPC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21103 91177308-0d34-0410-b5e6-96231b3b80d8

Add MULHU and MULHS nodes for the high part of an (un)signed 32x32=64b
multiply.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21102 91177308-0d34-0410-b5e6-96231b3b80d8

added lowerargs support for varargs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21101 91177308-0d34-0410-b5e6-96231b3b80d8

Behold, rlwinm with certain immediate arguments is printed as the much more
readable slwi or srwi (shift left/right word immediate).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21099 91177308-0d34-0410-b5e6-96231b3b80d8

Fix cut & paste errors (32->64), and codegen float->int more optimally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21098 91177308-0d34-0410-b5e6-96231b3b80d8

Updated to use dep analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21097 91177308-0d34-0410-b5e6-96231b3b80d8

Remove 64 bit simple ISel, it never worked correctly
Add initial (buggy) implementation of 64 bit pattern ISel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21096 91177308-0d34-0410-b5e6-96231b3b80d8

Back out the previous change to SelectBranchCC, since there are cases it
could miscompile.  A correct solution will be found in the near future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21095 91177308-0d34-0410-b5e6-96231b3b80d8

Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better
  indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
  can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21094 91177308-0d34-0410-b5e6-96231b3b80d8

do not crash when using -debug

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21092 91177308-0d34-0410-b5e6-96231b3b80d8

Implement SDIV by power of 2 as srawi/addze rather than load imm, divw

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21091 91177308-0d34-0410-b5e6-96231b3b80d8

Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21090 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for multiply-add, multiply-sub, and their negated versions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21089 91177308-0d34-0410-b5e6-96231b3b80d8

do not dereference an extra layer of pointers to determine if an external
call can modify a memory location.  This fixes
test/Regression/Analysis/Andersens/modreftest.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21088 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21087 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure that arg regs used by the call instruction are marked as such, so
that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21086 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unnecessary register copy now that regalloc is fixed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21085 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure to notice that explicit physregs are used in the function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21084 91177308-0d34-0410-b5e6-96231b3b80d8

i1 loads should also be from the low byte of the argument word.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8

Fix i64 return, fix CopyFromReg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21076 91177308-0d34-0410-b5e6-96231b3b80d8

fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.

fixes multisource/obsequi (maybe others)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21075 91177308-0d34-0410-b5e6-96231b3b80d8

add implicit use op

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21074 91177308-0d34-0410-b5e6-96231b3b80d8

Handle expanding arguments to ISD::TRUNCATE.  This happens on PowerPC when
you have something like i16 = truncate i64.  This fixes Regression/C/casts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21073 91177308-0d34-0410-b5e6-96231b3b80d8

Fix sign_extend and zero_extend of promoted value types to expanded value
types.  This occurs when casting short to long on PPC for example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21072 91177308-0d34-0410-b5e6-96231b3b80d8

Full varargs support.  All of UnitTests now passes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8

Pass the correct value for the chain to the store

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21066 91177308-0d34-0410-b5e6-96231b3b80d8

Fix SHL_PARTS
Start implementation of integer varargs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21065 91177308-0d34-0410-b5e6-96231b3b80d8

is this simpler?  I think it is simpler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21064 91177308-0d34-0410-b5e6-96231b3b80d8

fix 101 regressions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21063 91177308-0d34-0410-b5e6-96231b3b80d8

a wise man once said:

"!!!!!!!! IF YOU CHANGE SPACES TO TABS, YOU WILL BE KILLED!!!!!!"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21062 91177308-0d34-0410-b5e6-96231b3b80d8

.bss is no problem here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21061 91177308-0d34-0410-b5e6-96231b3b80d8

Keeping up with the Joneses.
Implement not, nor, nand, and eqv

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21060 91177308-0d34-0410-b5e6-96231b3b80d8

Select optimization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21051 91177308-0d34-0410-b5e6-96231b3b80d8

Try several things.  1) drop /i from FP ops 2) factor out FP to Int moves and provide 21264 support for those 3) match not 4) match ornot andnot xornot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21046 91177308-0d34-0410-b5e6-96231b3b80d8

fix some VC compilation problems, thanks to Jeff C for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21044 91177308-0d34-0410-b5e6-96231b3b80d8

EquivClassGraphs is now in DataStructure.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21042 91177308-0d34-0410-b5e6-96231b3b80d8

merge EquivClassGraphs.h into DataStructure.h with the other DSA pass definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21041 91177308-0d34-0410-b5e6-96231b3b80d8

use a callee_iterator typedef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21038 91177308-0d34-0410-b5e6-96231b3b80d8

add and use a callee_iterator typedef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21037 91177308-0d34-0410-b5e6-96231b3b80d8

Change the ActualCallees callgraph from hash_multimap<Instruction,Function>
to std::set<std::pair<Inst,Func>> to avoid duplicate entries.

This speeds up the CompleteBU pass from 1.99s to .15s on povray and the
eqgraph passes from 1.5s to .16s on the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21031 91177308-0d34-0410-b5e6-96231b3b80d8

Change the ActualCallees callgraph from hash_multimap<Instruction,Function>
to std::set<std::pair<Inst,Func>> to avoid duplicate entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21030 91177308-0d34-0410-b5e6-96231b3b80d8

FNEG/FABS/UNDEF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21029 91177308-0d34-0410-b5e6-96231b3b80d8

FNEG/FABS

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21028 91177308-0d34-0410-b5e6-96231b3b80d8

this has now been fixed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21026 91177308-0d34-0410-b5e6-96231b3b80d8

ia64 asmprinter fixes:
  - turn off assembler's autoalignment
  - set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
    functions have their value wrapped in @fptr(), so that a function
    descriptor will be materialized for that function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21025 91177308-0d34-0410-b5e6-96231b3b80d8

add support for prefix/suffix strings to go around GlobalValue(s)
(which may or be function pointers) in the asmprinter. For the moment,
this changes nothing, except the IA64 backend which can use this to write:

  data8.ua  @fptr(blah__blah__mangled_function_name)

  (by setting FunctionAddrPrefix/Suffix to "@fptr(" / ")")

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21024 91177308-0d34-0410-b5e6-96231b3b80d8

support IDEF, fnegabs (thanks sampo)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21023 91177308-0d34-0410-b5e6-96231b3b80d8

add fnegabs op

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21022 91177308-0d34-0410-b5e6-96231b3b80d8

Set shift amount to Extend
Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21018 91177308-0d34-0410-b5e6-96231b3b80d8

don't forget to use the right code generator :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21017 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21016 91177308-0d34-0410-b5e6-96231b3b80d8

add support for FABS and FNEG

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21015 91177308-0d34-0410-b5e6-96231b3b80d8