Shawn Lin [Sun, 13 Mar 2016 04:13:22 +0000 (12:13 +0800)]
UPSTREAM: clk: rockchip: release io resource when failing to init clk
We should call iounmap to relase reg_base since it's not going
to be used any more if failing to init clk.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit
86609a6613c64ee9272da1fd2f578d4beab2174e)
Conflicts:
drivers/clk/rockchip/clk-rk3228.c
[zx: there is no rk3228 clock controller, and apply this patch for
clk-rk3366 manually.]
Change-Id: I2d73c90eb6f43150725c81417af37a6a562cd329
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Shawn Lin [Sat, 12 Mar 2016 16:25:53 +0000 (00:25 +0800)]
UPSTREAM: clk: rockchip: remove redundant checking of device_node
rockchip_clk_of_add_provider is used by sub-clk driver which
already call of_iomap before calling it. If device_node does
not exist, of_iomap returns NULL which will fail to init the
sub-clk driver. So really it's redundant.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit
a96edf5a5243e1bdf642492b783221aa498f1e49)
Change-Id: I9a51ed269fe26742da2ae84d99cf9689f49add1b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Shawn Lin [Sat, 12 Mar 2016 16:25:14 +0000 (00:25 +0800)]
UPSTREAM: clk: rockchip: fix warning reported by kernel-doc
./scripts/kernel-doc -man -v drivers/clk/rockchip/clk.h > /dev/null
drivers/clk/rockchip/clk.h:133: warning: missing initial short
description on line:
* struct rockchip_clk_provider: information about clock provider
drivers/clk/rockchip/clk.h:133: info: Scanning doc for struct
drivers/clk/rockchip/clk.h:164: warning: missing initial short
description on line:
* struct rockchip_pll_clock: information about pll clock
drivers/clk/rockchip/clk.h:164: info: Scanning doc for struct
drivers/clk/rockchip/clk.h:194: warning: No description found for
parameter 'parent_names'
drivers/clk/rockchip/clk.h:194: warning: No description found for
parameter 'num_parents'
drivers/clk/rockchip/clk.h:194: warning: Excess struct/union/enum/typedef
member 'parent_name' description in 'rockchip_pll_clock'
drivers/clk/rockchip/clk.h:235: warning: missing initial short
description on line:
* struct rockchip_cpuclk_reg_data: describes register offsets and
masks of the cpuclock
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit
1c908b320055e1ce706e91121dbb2ce7934c788f)
Change-Id: I18dbd45ebd528fe2a871c98a1561dd0c0bf41e13
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Shawn Lin [Sat, 12 Mar 2016 16:25:00 +0000 (00:25 +0800)]
UPSTREAM: clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_data
mux_core_reg isn't been used anywhere, let's remove it.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit
72478f190fec9f2358b62f32ce5e27e6f323fa53)
Change-Id: Ib6d8ee5bca61d1ada6215660862d2d728927a948
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Xing Zheng [Tue, 15 Mar 2016 04:49:56 +0000 (12:49 +0800)]
UPSTREAM: clk: rockchip: Add support for multiple clock providers
There are need to support Multi-CRUs probability in future, but
it is not supported on the current Rockchip Clock Framework.
Therefore, this patch add support a provider as the parameter
handler when we call the clock register functions for per CRU.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit
d509ddf2e57c99ae760d1a289b85f1e0d729f864)
Conflicts:
drivers/clk/rockchip/clk-rk3036.c
drivers/clk/rockchip/clk-rk3188.c
drivers/clk/rockchip/clk-rk3228.c
drivers/clk/rockchip/clk-rk3366.c
[zx: keep calling clk_register_fixed_factor previouslly, and there
is no rk3228 clock controller, add support for clk-rk3366 manually,
because it is not in the upstream codes.]
Change-Id: I94976f38fb6edd88f334479d6e44fef5bcdfc16a
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Xing Zheng [Wed, 9 Mar 2016 02:37:03 +0000 (10:37 +0800)]
UPSTREAM: clk: rockchip: allow varying mux parameters for cpuclk pll-sources
Thers are only two parent PLLs that APLL and GPLL for core on the
previous SoCs (RK3066/RK3188/RK3288/RK3368). Hence, we set fixed
GPLL as alternate parent when core is switching freq.
Since RK3399 big.LITTLE architecture, we need to select and adapt
more PLLs (ALPLL/ABPLL/DPLL/GPLL) sources.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.7-clk/next
commit
0fda2be634398f4b8d53c0436311f99557e56c4e)
Conflicts:
drivers/clk/rockchip/clk-rk3228.c
[zx: there is no rk3228 clock controller, apply this patch for
clk-rk3366.]
Change-Id: I48fde9facccd41585873c997b0b02a7a73972717
Heiko Stuebner [Fri, 18 Dec 2015 16:51:55 +0000 (17:51 +0100)]
UPSTREAM: clk: rockchip: only enter pll slow-mode directly before reboots on rk3288
As commit
1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.
The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.
Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.
This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.
For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.
With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.
Fixes: 1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288")
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
(cherry picked from commit
dfff24bde7fb8d57482e907d5dfb0be3a9e28119)
Conflicts:
drivers/clk/rockchip/clk-rk3228.c
[zx: there is no rk3228 clock controller, apply for clk-rk3366]
Change-Id: I2e91afd893c87eb3ab8a41db1fe81f5c43409951
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Chris Zhong [Fri, 27 Nov 2015 02:09:30 +0000 (10:09 +0800)]
UPSTREAM: clk: rockchip: switch PLLs to slow mode before reboot for rk3288
We've been seeing some crashes at reboot test on rk3288-based systems,
which boards have not reset pin connected to NPOR, they reboot by
setting 0xfdb9 to RK3288_GLB_SRST_FST register. If the APLL works in
a high frequency mode, some IPs might hang during soft reset.
It appears that we can fix the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
1d33929e2a2b69ae6d40e09ccfc8c7d705a543ba)
Change-Id: Ic01f80e6f33ae84cc87e954aae35f26b6f1a5434
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Frank Wang [Fri, 11 Mar 2016 01:49:31 +0000 (09:49 +0800)]
ARM64: dts: rockchip: rk3366: add usb2.0 phy node
Change-Id: Ib1bc0add32d99de9ed78e70c29526cef926c7cad
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Fri, 11 Mar 2016 01:20:26 +0000 (09:20 +0800)]
phy: rockchip-usb: support InnoSilicon usb2.0 phy
For InnoSilicon usb2.0 phy, there is no siddq bit for operating,
what is more, when we control usb phy to suspend, its Plls will
not be affected. So we can operate resume/suspend bits directly
when it is going to power on/off.
Change-Id: I6bfe6b1a90b1bdcb0b0d5b670d579a625b22c0ba
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Fri, 11 Mar 2016 02:34:21 +0000 (10:34 +0800)]
Documentation: bindings: add compatible entry for Rockchip USB2.0 PHY
Compatible "rockchip,rk336x-usb-phy" support to RK3368 & RK3366.
Change-Id: I435ecd0a9f1c2a50836f7e3c44b6089ba49d728a
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Xing Zheng [Wed, 9 Mar 2016 02:43:31 +0000 (10:43 +0800)]
UPSTREAM: clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type
Because there are some frac clock mux nodes don't have a gate node on
the RK3399.
Change-Id: I4791b90a08faab286743a5cba30738cfb046594c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.7-clk/next
commit
ffd9d4d39ef7ff90364d3abd6c39919e6582b605)
Feng Xiao [Mon, 14 Mar 2016 03:09:27 +0000 (11:09 +0800)]
clk: rockchip: add clock ids for mpll_src and 32k on RK3366
Set the newly added id for mpll_src and 32k, so that they can be called
in other parts.
Change-Id: Ief82231215a147b62abcfbb5565054470fc9ea37
Signed-off-by: Feng Xiao <xf@rock-chips.com>
Caesar Wang [Thu, 10 Mar 2016 10:18:32 +0000 (18:18 +0800)]
ARM64: dts: rockchip: enable the tsadc for rk3399 chrome
This patch enables the tsadc for rk3399 evb board.
The rk3399 evb board uses the gpio to reset the chip since it connects the
PMIC to work, and TSHUT is low active on evb board.
Change-Id: Ibd4fc2c752fe1f34cc231385ee314e4b9a32e970
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Caesar Wang [Thu, 10 Mar 2016 09:58:36 +0000 (17:58 +0800)]
ARM64: dts: rockchip: add the thermal main info found on rk3399
This patch adds the thermal needed main information for rk3399 SoCS.
Basically has the following content:
1) TSADC controller:
Add the needed attributes for rk3399 TSADC controller.
Especially for the TSHUT, in some cases if we are unable to shut it down
in orderly fashion (says: kernel is stuck holding a lock or similar), then
hardware TSHUT will reset it.
If the temperature is over 95C over a period of time the thermal shutdown
of the tsadc is invoked with can either reset the entire chip via the CRU,
or notify the PMIC via a GPIO. This should be set in the specific board.
2) Thermal zones:
Add the needed device mode for thermal generic framework.
Detail in Documentation/devicetree/bindings/thermal/thermal.txt.
Change-Id: I1361beeb85e6d4a134b4640c16440452aa950e16
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Huang Jiachai [Fri, 11 Mar 2016 08:00:20 +0000 (16:00 +0800)]
video: rockchip: lcdc: 3366: add support power domain control
Change-Id: Ibb9d15e6e2a84a1847f4cfbbc8e75bca54e1782b
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Elaine Zhang [Mon, 14 Mar 2016 02:08:07 +0000 (10:08 +0800)]
dt/bindings: power: add RK3399 SoCs header for power-domain
According to a description from TRM, add all the power domains
Change-Id: Ibbf17fb1edc125358760db8acd99dd681913cd3c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Sugar Zhang [Fri, 11 Mar 2016 09:51:47 +0000 (17:51 +0800)]
ARM64: dts: rk3399: add pinctrl for i2s spdif
Change-Id: I12ae87196180efadb6a8b16787b4815c42223970
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Huang Jiachai [Fri, 11 Mar 2016 03:23:07 +0000 (11:23 +0800)]
dtsi: screen-timing: lcd-tv080wum-mipi: update CABC lut
Get the gamma value from screen vendor and use the following
algorithm to get the cabc lut
for(i=0;i<256;i++)
cabc_lut[i] = pow((256.0/(i + 256)), gamma_val) * 65536 + 0.5;
Change-Id: I8500cc84869d2693ce6af4e116b2140b3d3a16fc
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huang Jiachai [Fri, 11 Mar 2016 03:14:48 +0000 (11:14 +0800)]
video: rockchip: lcdc: 3366: update for CABC
Change-Id: I75fd4deb02f3f131a7258f5529a8cb68fb55dca6
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huibin Hong [Wed, 24 Feb 2016 10:00:04 +0000 (18:00 +0800)]
UPSTREAM: spi/rockchip: Make sure spi clk is on in rockchip_spi_set_cs
Rockchip_spi_set_cs could be called by spi_setup, but
spi_setup may be called by device driver after runtime suspend.
Then the spi clock is closed, rockchip_spi_set_cs may access the
spi registers, which causes cpu block in some socs.
Change-Id: I58915aee30cfbd3098eb137e3d9046b59ad9476c
Fixes: 64e36824b32 ("spi/rockchip: add driver for Rockchip RK3xxx")
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/spi.git for-next
commit
b920cc3191d7612f26f36ee494e05b5ffd9044c0)
Xu Jianqun [Thu, 18 Feb 2016 11:16:31 +0000 (19:16 +0800)]
UPSTREAM: spi: rockchip: add bindings for rk3399 spi
Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.
Change-Id: Ib43ec4ce8970359f660311fce35017843f8998df
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/spi.git for-next
commit
9b7a56221590cad777e56ec40afe7a6a68f9ac01)
Caesar Wang [Mon, 9 Nov 2015 04:49:00 +0000 (12:49 +0800)]
UPSTREAM: arm64: dts: rockchip: Add the thermal data found on RK3368
This patchset add the thermal for RK3368 dts,
Since the two CPU clusters, with four CPU core for each cluster,
one cluster is optimized for high-performance(big cluster) and the othe
is optimized for low power(little cluster).
This patch adds the second order for thermal throttle, and the critical
temperature for thermal over-tempeature protection on Software.
Change-Id: I9491287695768530c557511097f79ad6188adf1b
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
c68bb56efb25e2d326ae413e399cdb1b4528e173)
Feng Xiao [Thu, 10 Mar 2016 10:27:17 +0000 (18:27 +0800)]
ARM64: dts: rk3366: use operating-points-v2 for gpu dvfs
Change-Id: Ia68197273e278f25320a4afe64c35c070f1737cc
Signed-off-by: Feng Xiao <xf@rock-chips.com>
Huang Jiachai [Thu, 10 Mar 2016 02:05:19 +0000 (10:05 +0800)]
video: rockchip: lcdc: 3366: fix timing reg take effect time
rk3366 timing reg config change to frame effect,
so we need config done after update timing.
Change-Id: I7279fc03a066357cb8a0ed452e9182f92bf90f01
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huang Jiachai [Thu, 10 Mar 2016 03:40:26 +0000 (11:40 +0800)]
ARM64: dts: rockchip: rk3366-tb: add hdmi support
Change-Id: Id278ca8f4ecc2e835d65653d72ae83de74cd9f91
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huang Jiachai [Thu, 10 Mar 2016 03:37:33 +0000 (11:37 +0800)]
video: rockchip: fb: update for extend vop fb info
like rk3366 vop0 is different from vop1, so fb[rk_fb->num_fb >> 1]
is not correct for extend vop fb info.
Change-Id: Ie7ed0614a5cb32fcb22707c88aa70be45cb243d7
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Feng Xiao [Thu, 10 Mar 2016 08:08:27 +0000 (16:08 +0800)]
arm64: configs: rockchip_defconfig add DEVFREQ Governors
Change-Id: Iea6985da7a0f080b9949715a55326a9ece8f0ed9
Signed-off-by: Feng Xiao <xf@rock-chips.com>
CMY [Mon, 23 Jun 2014 02:11:35 +0000 (10:11 +0800)]
lowmemorykiller: calculator free pages exclude CMA's free
Change-Id: I51a08cd9c9ef8d37fd0a5f649c5d2843a8b7d9ff
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Feng Xiao [Thu, 10 Mar 2016 02:04:28 +0000 (10:04 +0800)]
clk: rockchip: add clock ids for isp of RK3366 SoCs
Change-Id: Ia1c1ef34eebcaa8f29d537b291c45654252444b8
Signed-off-by: Feng Xiao <xf@rock-chips.com>
wzq [Thu, 10 Mar 2016 03:26:54 +0000 (11:26 +0800)]
ARM64: dts: rk3366-tb: Enable rga device
Change-Id: I935033613e52edce6a479651fe0bc3ed2db5fb9c
Signed-off-by: Zhiqin Wei <wzq@rock-chips.com>
Xu Jianqun [Tue, 16 Feb 2016 07:27:30 +0000 (15:27 +0800)]
ARM64: dts: rockchip: add dts file for rk3399 chromebook
Change-Id: I17589cef588958601448ff7e3615b84ef95dd506
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Huang, Tao [Thu, 10 Mar 2016 03:37:48 +0000 (11:37 +0800)]
arm64: configs: update rockchip_defconfig by savedefconfig
Change-Id: I057bdbe89ed484f15295a0184f94f8a5acac8483
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Thu, 10 Mar 2016 03:36:17 +0000 (11:36 +0800)]
video: rockchip: reorder config
Change-Id: Ie9e0f2e8a69c456f52003dd3f956ff0a44b981cd
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Thu, 10 Mar 2016 03:16:01 +0000 (11:16 +0800)]
video: rockchip: iep: do not default enable
Change-Id: I48747ec133f05ec6b1fa6d70187c4c641fed7ccd
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
sayon.chen [Thu, 10 Mar 2016 02:08:47 +0000 (10:08 +0800)]
ARM64: rockchip_defconfig: enable VCODEC
add CONFIG_RK_VCODEC=y
Change-Id: Ida687dceeb36488c8ddbbf02bd273dec2991993b
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
sayon.chen [Wed, 9 Mar 2016 01:54:29 +0000 (09:54 +0800)]
ARM64: dts: rk3366: add iep device
add iep device
Change-Id: Ie3c60a79aaddf308847f84b3acd55d529e22f352
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
sayon.chen [Wed, 9 Mar 2016 00:55:15 +0000 (08:55 +0800)]
ARM64: dts: rk3366: enable iep mmu
enable iep mmu
Change-Id: Ia70422fbdf60d5cea8deaa2695913ccf32b580a3
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
sayon.chen [Wed, 9 Mar 2016 00:46:11 +0000 (08:46 +0800)]
ARM64: dts: rk3366: add vpu device
add vpu_service and rkvdec device
Change-Id: I53dea4053fa61bd0cd4f6313d9ea7e87673f2ce4
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
sayon.chen [Tue, 8 Mar 2016 10:20:19 +0000 (18:20 +0800)]
ARM64: dts: rk3366: enable vpu mmu
enable vpu mmu
Change-Id: I07d0c0e251d726b76110ecab0f3276ba4e97ee33
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
sayon.chen [Tue, 8 Mar 2016 10:02:32 +0000 (18:02 +0800)]
video: rockchip: vcodec: add vpu codec drivers
move vpu codec code to drivers/video/rockchip
Change-Id: Idf4100181200cf28a18990da7088bee495f10fcb
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
Feng Xiao [Wed, 9 Mar 2016 13:00:32 +0000 (21:00 +0800)]
ARM64: dts: rockchip: rk3366: modify the initial rate of wifi pll
There is a div2 behind wifi pll, so the initial rate should be 960MHz.
Change-Id: Ib90457a0b17907c3056adf58edd623ae462b06a3
Signed-off-by: Feng Xiao <xf@rock-chips.com>
xiaoyao [Wed, 9 Mar 2016 06:10:52 +0000 (14:10 +0800)]
mmc: sdio: call mmc_power_cycle before re-init sdio devices
Change-Id: I4ae9bb385c9235eb184de0f3bf06719b056f4842
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
xubilv [Wed, 9 Mar 2016 09:04:51 +0000 (17:04 +0800)]
video: screen-timeing: sdk mipi: The frame rate increased from 44 to 55
Change-Id: Id5fec461e1785b8cb713c7bb686deb2bb38973d9
Signed-off-by: xubilv <xbl@rock-chips.com>
Huang, Tao [Wed, 9 Mar 2016 11:11:02 +0000 (19:11 +0800)]
Revert "ARM64: dts: rockchip: add emmc, sdio and sdmmc node for rk3399"
This reverts commit
d3e94b630981c7aabe0f041e547c78a7bd3d3ec4.
ERROR (reg_format): "reg" property in /phy has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
Change-Id: I92c498906248c08aade2e36967f896fdd1094abc
Feng Xiao [Tue, 8 Mar 2016 08:11:05 +0000 (16:11 +0800)]
clk: rockchip: add video noc clk to the list of rk3366 critical clocks
The clocks of VPU NOC and RKVEDC NOC interact with each other.
If one of VPU and RKVDEC is working, they all must be opened.
Change-Id: I966df107ae72fbbb99f1e660a79bfd07476e8539
Signed-off-by: Feng Xiao <xf@rock-chips.com>
sayon.chen [Wed, 9 Mar 2016 01:49:11 +0000 (09:49 +0800)]
ARM64: rockchip_defconfig: enable IEP
enable IPE
Change-Id: Id4f8f8a91106269b6d8e4f0e0dc7ec1d499c2ce2
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
sayon.chen [Wed, 9 Mar 2016 01:02:45 +0000 (09:02 +0800)]
video: rockchip: iep: iep code modify
fix iep code compile fail in kernel-4.4
Change-Id: Iba105baecff5fe474cd0d9c02dc9b7970e9c9990
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
chenzhen [Fri, 4 Mar 2016 14:04:38 +0000 (22:04 +0800)]
MALI: add midgard src dir
Change-Id: I9938fe0377fc57e030c9e5109c216d6c62dbeef0
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Fri, 4 Mar 2016 12:35:53 +0000 (20:35 +0800)]
arm64: configs: rockchip_defconfig enable configs for MALI midgard.
Change-Id: Idec65015b7dfd73926e713a74daf15f46ea409eb
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 1 Mar 2016 02:39:45 +0000 (10:39 +0800)]
arm64: dts: rk3366: add node of GPU.
Change-Id: Id545de4b7a2747e6b2c46cbedfdc160c3552c105
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Fri, 4 Mar 2016 13:08:35 +0000 (21:08 +0800)]
MALI: rockchip: not to use sg_dma_len.
When CONFIG_NEED_SG_DMA_LENGTH is enabled,
sg_dma_len is defined as follow :
"#define sg_dma_len(sg) ((sg)->dma_length)"
But, dma_length is not used by the framework indeed.
Change-Id: Ibfd3223b38b96701f839cdc91207a49f20789fec
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Rocky Hao [Wed, 9 Mar 2016 03:21:29 +0000 (11:21 +0800)]
ARM64: dts: rockchip: add watchdog node for rk3366
Change-Id: I44f6fc21d9b55f2229fef0fd8fe0091367c2a8fa
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Sugar Zhang [Wed, 9 Mar 2016 03:50:43 +0000 (11:50 +0800)]
ASoC: rt5640: fix rt5640_i2c_probe fail sometimes
if the codec is not initialized completely, i2c transfer will be
failed, so we just return PROBE_DEFER to let codec have chance to
be probed later.
Change-Id: I68922ffa7ddf048ebe3f95be9349d38b7b059982
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
xiaoyao [Tue, 8 Mar 2016 11:54:46 +0000 (19:54 +0800)]
ARM64: dts: rk3366-tb: Add wifi node and enable it
Change-Id: I7e76d78439828a21cdc2d936ee22eab7789a50e6
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
xiaoyao [Tue, 8 Mar 2016 11:54:10 +0000 (19:54 +0800)]
ARM64: dts: rk3366-tb: add sdio_pwrseq for sdio wifi
Change-Id: I0490827fa88a680cc449c367772bbc337ebe507e
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
xiaoyao [Tue, 8 Mar 2016 08:14:38 +0000 (16:14 +0800)]
arm64: configs: rockchip_defconfig enable wireless devices
Change-Id: Icc4126588bd69e6e7b09fe051a719d182ad9b087
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
xiaoyao [Tue, 8 Mar 2016 07:57:01 +0000 (15:57 +0800)]
net: rkwifi: initialize code to support rkwifi
Change-Id: Id8ad92690bb1565ecae45ecf1f9edba71292dfc0
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
chenzhen [Fri, 4 Mar 2016 13:50:45 +0000 (21:50 +0800)]
MALI: rockchip: tidy 'platform specific code'.
We use devfreq to implement DVFS of GPU, instead of 'legacy_dvfs'.
Change-Id: If5c8ef05c8f37c88a5c22779468b21315d71eda0
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Simon [Tue, 8 Mar 2016 01:48:16 +0000 (09:48 +0800)]
iommu: rk-iovmm: fix back to back sg entries condition
Change-Id: Ie493d3d8b34ac4229b3a5a2a84cd52568425f106
Signed-off-by: Simon <xxm@rock-chips.com>
chenzhen [Fri, 4 Mar 2016 13:49:35 +0000 (21:49 +0800)]
MALI: rockchip: modify to build in kernel 4.4.
Change-Id: Ib462c42337e655607b2e222d7d97064dfc1c76c4
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Mon, 9 Nov 2015 08:36:48 +0000 (16:36 +0800)]
MALI: rockchip: upgrade DDK to r8p0-02rel0.
Change-Id: I85a3bedf89a3fc27971b1d26e7bfa9a8bee32d06
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Wed, 9 Sep 2015 01:28:51 +0000 (09:28 +0800)]
MALI: rockchip: upgrade to DDK r7p0-02rel0.
Conflicts:
drivers/gpu/arm/midgard/mali_kbase_config.h
Change-Id: I2d93041a0525ce6f1399c3a456c4c8f7be22243e
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
xiaoyao [Tue, 8 Mar 2016 06:20:47 +0000 (14:20 +0800)]
net: wifi: rockchip: update broadcom drivers for kernel4.4
Change-Id: I5a764afc5abdf8cae4ba12181ebd36a03cdcb110
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
Huang, Tao [Tue, 8 Mar 2016 08:13:26 +0000 (16:13 +0800)]
Revert "UPSTREAM: regulator: core: avoid unused variable warning"
This reverts commit
40e4c3535811ea74490bfa4fbe09cf85bb305efb.
Please refer to commit
70a7fb80e85a
("regulator: core: Fix nested locking of supplies")
Change-Id: If0bee255621a7480cfc6fa232f65081c4d904897
David Wu [Mon, 7 Mar 2016 18:49:44 +0000 (02:49 +0800)]
ARM64: dts: rockchip: add i2c2, i2c4 gpio func support for rk3366
Change-Id: I8a3c5dac5c23d90706c21ffb48f4ac15e4f1cffb
Signed-off-by: David Wu <david.wu@rock-chips.com>
David Wu [Mon, 7 Mar 2016 18:48:14 +0000 (02:48 +0800)]
ARM64: configs: rockchip: add support i2c gpio config
Change-Id: If44b02f93559ddbbf8b266cc945b648d7cd7fffd
Signed-off-by: David Wu <david.wu@rock-chips.com>
Huang, Tao [Mon, 7 Mar 2016 13:11:42 +0000 (21:11 +0800)]
arm64: configs: rockchip_defconfig enable CPU_FREQ_DEFAULT_GOV_INTERACTIVE
Change-Id: I7e241acad10a5b4dc2b7e46e75dfc4043e794f8f
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 7 Mar 2016 10:11:11 +0000 (18:11 +0800)]
arm64: configs: rockchip_defconfig enable ARM_CPUIDLE
Change-Id: I6d2181de4c9489da65117fa817942962b74469bf
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 7 Mar 2016 10:03:14 +0000 (18:03 +0800)]
arm64: configs: update rockchip_defconfig by savedefconfig
Change-Id: I5380b58e9053238f16ca8ed11f7c9459083e1798
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Rocky Hao [Sat, 5 Mar 2016 03:06:12 +0000 (11:06 +0800)]
cpufreq: interactive: fix cpufreq object duplicate creatation in sysfs
[ 4.216722] sysfs: cannot create duplicate filename '/devices/system/cpu/cpufreq'
[ 4.233798] ------------[ cut here ]------------
[ 4.244376] WARNING: at fs/sysfs/dir.c:31
[ 4.253556]
[ 4.256975] CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.0 #156
[ 4.270730] Hardware name: Rockchip SDK tb board (DT)
[ 4.282302] task:
ffffffc039670000 ti:
ffffffc039678000 task.ti:
ffffffc039678000
[ 4.299444] PC is at sysfs_warn_dup+0x5c/0x78
[ 4.309422] LR is at sysfs_warn_dup+0x5c/0x78
Change-Id: Id21fe74dc082ec6c94fcb3e0cc11b78226549f7d
Fixes: bc68f6c4efbd ("cpufreq: interactive: build fixes for 4.4")
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Wu Liang feng [Sun, 6 Mar 2016 15:18:30 +0000 (23:18 +0800)]
FROMLIST: usb: dwc3: Enable support for 64-bit system
Add 64-bit DMA operation support to the USB DWC3 driver.
First attempt to set the coherent DMA mask for 64-bit DMA.
If that failed, attempt again with 32-bit DMA.
Change-Id: I6d8e0e35ed606aa38d1dbadbb48f5629c1b39552
Signed-off-by: Thang Q. Nguyen <tqnguyen@apm.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
8109031/)
Wu Liang feng [Sun, 6 Mar 2016 14:46:29 +0000 (22:46 +0800)]
FROMLIST: usb: dwc3: pass arch data to xhci-hcd child
The xhci-hcd child node needs to inherit archdata attribute to use
dma_ops functions and attributes. This patch enables the USB DWC3
driver to pass archdata attributes to its xhci-hcd child node.
Signed-off-by: Thang Q. Nguyen <tqnguyen@apm.com>
Change-Id: I82abc58fd8d01d2233499958713dd69ed58dedb5
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
8109041/)
Andy Yan [Tue, 1 Mar 2016 12:14:30 +0000 (20:14 +0800)]
FROMLIST: ARM64: dts: rockchip: add syscon-reboot-mode DT node
Add syscon-reboot-mode driver DT node for rk3368 platform
Change-Id: I050579c2392fad6c7756d0d8a5dfc1a8a36023e4
Tested-by: Caesar Wang <caesar.upstream@gmail.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
David Wu [Sat, 5 Mar 2016 13:43:47 +0000 (21:43 +0800)]
ARM64: dts: rockchip: add gt9xx touchscreen support
need to modify the i2c4 scl and sda connection in hardware.
Change-Id: I57981a3891047412b9ea61112fbf5ff4a23223b3
Signed-off-by: David Wu <david.wu@rock-chips.com>
Wenlong Zhuang [Mon, 7 Mar 2016 02:48:56 +0000 (10:48 +0800)]
video: rockchip: vop-lite: fix get clock source failed
Rename clock name and fix deadlock when VOP irqs are disabling.
Signed-off-by: Wenlong Zhuang <daisen.zhuang@rock-chips.com>
Signed-off-by: Xubilv <xbl@rock-chips.com>
Change-Id: Ib794128e9e0dda0fc7b4c48d52d196e8ba70c11d
John Youn [Wed, 17 Feb 2016 04:10:53 +0000 (20:10 -0800)]
UPSTREAM: usb: dwc3: Fix assignment of EP transfer resources
The assignement of EP transfer resources was not handled properly in the
dwc3 driver. Commit
aebda6187181 ("usb: dwc3: Reset the transfer
resource index on SET_INTERFACE") previously fixed one aspect of this
where resources may be exhausted with multiple calls to SET_INTERFACE.
However, it introduced an issue where composite devices with multiple
interfaces can be assigned the same transfer resources for different
endpoints. This patch solves both issues.
The assignment of transfer resources cannot perfectly follow the data
book due to the fact that the controller driver does not have all
knowledge of the configuration in advance. It is given this information
piecemeal by the composite gadget framework after every
SET_CONFIGURATION and SET_INTERFACE. Trying to follow the databook
programming model in this scenario can cause errors. For two reasons:
1) The databook says to do DEPSTARTCFG for every SET_CONFIGURATION and
SET_INTERFACE (8.1.5). This is incorrect in the scenario of multiple
interfaces.
2) The databook does not mention doing more DEPXFERCFG for new endpoint
on alt setting (8.1.6).
The following simplified method is used instead:
All hardware endpoints can be assigned a transfer resource and this
setting will stay persistent until either a core reset or hibernation.
So whenever we do a DEPSTARTCFG(0) we can go ahead and do DEPXFERCFG for
every hardware endpoint as well. We are guaranteed that there are as
many transfer resources as endpoints.
This patch triggers off of the calling dwc3_gadget_start_config() for
EP0-out, which always happens first, and which should only happen in one
of the above conditions.
Fixes: aebda6187181 ("usb: dwc3: Reset the transfer resource index on SET_INTERFACE")
Cc: <stable@vger.kernel.org> # v3.2+
Reported-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
(cherry picked from commit
c450960187f45d4260db87c7dd4fc0bceb5565d8)
Change-Id: I804cb4d2f3b79b3cfd4be5b0942ed6f866c1e580
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Jianqiang Tang [Wed, 20 Jan 2016 06:09:39 +0000 (14:09 +0800)]
UPSTREAM: usb: dwc3: gadget: set the OTG flag in dwc3 gadget driver.
This patch is needed in order to pass one test case
defined in the OTG Automated Compliance Test specification.
Specification location:
http://www.usb.org/developers/onthego/otgeh_compliance_plan_1_2.pdf
This test case uses PET Tool, and PET Tool is one USB hardware
equipment provided by MQP Electronics.
Test case id is 6.8.3 B-UUT Bypass Capacitance.
We must set this otg flag in order to be able to return OTG
descriptor during enumeration, otherwise this test case with
failed with below error: "Get OTG descriptor request stalled".
Signed-off-by: Jianqiang Tang <jianqiang.tang@intel.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
(cherry picked from commit
6a4290cc28be12d72d50644bd4bda1aede37cd41)
Change-Id: If264c2a878ee8520edc57876ab2325dce4ca869e
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Wed, 23 Dec 2015 03:56:10 +0000 (21:56 -0600)]
UPSTREAM: usb: dwc3: of-simple: fix build warning on !PM
if we have a !PM kernel build, our runtime
suspend/resume callbacks will be left defined but
unused. Add a ifdef CONFIG_PM guard.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
5072cfc40a80cea3749fd3413b3896630d8c787e)
Change-Id: I6a7ceb1a90162b132afce17423888ab0cbdf897b
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
John Youn [Tue, 22 Dec 2015 20:23:20 +0000 (12:23 -0800)]
UPSTREAM: usb: dwc3: gadget: don't send extra ZLP
If the request->length is zero, a ZLP should already be sent due to that
and another ZLP is not needed to terminate the transfer.
Fixes: 04c03d10e507 ("usb: dwc3: gadget: handle request->zero")
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
d9261898a4b2c143c28568dc686a1becfc637a99)
Change-Id: Ib976552f93321f6ea52d3f0151c66fd6f2db8b17
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Thu, 10 Dec 2015 19:08:20 +0000 (13:08 -0600)]
UPSTREAM: usb: dwc3: gadget: pass a condition to dev_WARN_ONCE()
instead of using:
if (condition) {
dev_WARN_ONCE(dev, true, "foo");
return -EINVAL;
}
let's use:
if (dev_WARN_ONCE(dev, condition, "foo"))
return -EINVAL;
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
95ca961c758cd9ce789247098b09c39017637e58)
Change-Id: I8a7ee1e00ddf619d23ab974663c11fe795e9a478
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Thu, 3 Dec 2015 21:27:32 +0000 (15:27 -0600)]
UPSTREAM: usb: dwc3: trace: show request flags
struct usb_request have 3 flags which might be
important to know about during debug. This patch
shows each of the 3 flags as a single letter:
z -> for zero
s -> short not okay
i -> interrupt
A capital letter means the feature is enabled
while a lower case letter means it is disabled;
Thus 'zsI' indicates that a ZLP is not needed,
that we can accept a short packet and interrupt
for this request should be enabled.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
46a01427e969e53d993b988ebbdb8c7c3562b66f)
Change-Id: I5d60411c51eff9f5a5f1233680bca6369f6fc6b8
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Wed, 2 Dec 2015 16:06:45 +0000 (10:06 -0600)]
UPSTREAM: usb: dwc3: gadget: handle request->zero
So far, dwc3 has always missed request->zero
handling for every endpoint. Let's implement
that so we can handle cases where transfer must
be finished with a ZLP.
Note that dwc3 is a little special. Even though
we're dealing with a ZLP, we still need a buffer
of wMaxPacketSize bytes; to hide that detail from
every gadget driver, we have a preallocated buffer
of 1024 bytes (biggest bulk size) to use (and
share) among all endpoints.
Reported-by: Ravi B <ravibabu@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
04c03d10e507052cfce6910ddf34091196e79e1c)
Change-Id: I4dce506b683a9381e73733d09dd03e12364bef1f
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Thu, 19 Nov 2015 18:15:43 +0000 (12:15 -0600)]
UPSTREAM: usb: dwc3: remove dwc3-qcom in favor of dwc3-of-simple
Now that we have a generic dwc3-of-simple.c, we can
use that instead of maintaining dwc3-qcom.c which is
extremely similar.
Cc: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
b084662776be8b07ab9114ff1a16a4e9bf907d35)
Change-Id: I4ae3b2649b5b970ef2974d5fa41ac8ff2affb6e0
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Wed, 18 Nov 2015 19:15:20 +0000 (13:15 -0600)]
UPSTREAM: usb: dwc3: add generic OF glue layer
For simple platforms which merely enable some clocks
and populate its children, we can use this generic
glue layer to avoid boilerplate code duplication.
For now this supports Qcom and Xilinx, but if we
find a way to add generic handling of regulators and
optional PHYs, we can absorb exynos as well.
Tested-by: Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
16adc674d0d68a50dfc725574738d7ae11cf5d7e)
Change-Id: Ia397ebcc522d0cd33c8dd3ee286dc2e0a5383a58
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Mon, 16 Nov 2015 22:20:34 +0000 (16:20 -0600)]
UPSTREAM: usb: dwc3: ep0: fix setup_packet_pending initialization
It just ocurred to me that dwc3 already gives a
really hint of when a setup packet is pending and
that's the SETUP_PENDING TRB Status for EP0 IRQs.
Fix setup_packet_pending initialization based on
that. While at that, also make sure the comment in
gadget.c matches what code is doing.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
b5d335e5ea6a60f5254c1f3d5fddd47f4531bccf)
Change-Id: I9e197bee86b681e3d0da8692df8fac861eb00844
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Mon, 16 Nov 2015 22:13:57 +0000 (16:13 -0600)]
UPSTREAM: usb: dwc3: gadget: simplify next_request() return check
In dwc3_cleanup_done_reqs() we expect that all
iterations of our while (1) loop will find a valid
struct dwc3_request *. In case we don't, we're
dumping a WARN_ON_ONCE() splat so that people report
the failure.
This patch is a simple cleanup converting:
if (!req) {
WARN_ON_ONCE(1);
return 1;
}
to:
if (WARN_ON_ONCE(!req))
return 1;
which is a little easier to read.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
ac7bdcc1b3ad042d21bc65e57503d7b41fc69f05)
Change-Id: I1bfea94c01ee9df01930fd743301a7d04ce9b442
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Mon, 16 Nov 2015 22:08:09 +0000 (16:08 -0600)]
UPSTREAM: usb: dwc3: ep0: purge dev_dbg() calls
The last few dev_dbg() messages are converted to
tracepoints and we can finally ignore dev_dbg()
messages during debug sessions.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
acc38c4970caac17cd81dc941226ed17fe505d73)
Change-Id: I9046eeff627c97360cc9903e78fdd8715f95ce28
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Mon, 16 Nov 2015 22:06:37 +0000 (16:06 -0600)]
UPSTREAM: usb: dwc3: core: purge dev_dbg() calls
The last few dev_dbg() messages are converted to
tracepoints and we can finally ignore dev_dbg()
messages during debug sessions.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
1407bf13e3bf5f1168484c3e68b6ef9d8cf2bc72)
Change-Id: I7a39582e1b5bd29b5d377da4bfbf95f0598776d4
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Mon, 16 Nov 2015 22:04:13 +0000 (16:04 -0600)]
UPSTREAM: usb: dwc3: gadget: purge dev_dbg() calls
The last few dev_dbg() messages are converted to
tracepoints and we can finally ignore dev_dbg()
messages during debug sessions.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
ec5e795cdefb74b55c9fce918aa8a9226a8eec41)
Change-Id: Ia6d016de13b5944ff8add9f2bab3686a1651ed2f
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Felipe Balbi [Mon, 16 Nov 2015 21:31:21 +0000 (15:31 -0600)]
UPSTREAM: usb: dwc3: gadget: simplify dwc3_gadget_ep_queue()
By moving our sanity checks our internal function
__dwc3_gadget_ep_queue() we can simplify the
externally visible API while also making sure that
callers of __dwc3_gadget_ep_queue() also make use of
the same checks.
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit
bb423984c28e9f94a8f466b791baa762cef0543d)
Change-Id: I6fc7b972e288b4d3ffcb629daed784c87d243e32
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Frank Wang [Fri, 4 Mar 2016 10:15:03 +0000 (18:15 +0800)]
ARM64: dts: rk3366: add DT nodes for usb2.0 ehci and ohci
Change-Id: I4ade5961f0192d7ceff7c61557ddee6aba98224c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Sugar Zhang [Fri, 4 Mar 2016 09:44:34 +0000 (17:44 +0800)]
ARM64: dts: rk3366-tb: add spdif sound
Change-Id: I21e2879b94844b48282ff9aaa41c3f9d1ef89982
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Sugar Zhang [Fri, 4 Mar 2016 09:31:27 +0000 (17:31 +0800)]
ARM64: dts: rk3366: add spdif
Change-Id: I3d0f86e54e537524b1542d2d94fd0a56fc9c7cf2
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Sugar Zhang [Fri, 4 Mar 2016 09:24:44 +0000 (17:24 +0800)]
ARM64: configs: rockchip_defconfig: enable spdif
Change-Id: Ie021387c717eec5b0f583e9ff5e41f1818383b8f
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Sugar Zhang [Fri, 4 Mar 2016 09:18:23 +0000 (17:18 +0800)]
ASoC: rockchip: add bindings for spdif controller
this patch add compatible for rk3366/rk3368/rk3399 spdif,
these three spdifs share the same type.
Change-Id: Iac533f3481962556e3ca2b0c4b685b64aec6786a
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Huang, Tao [Fri, 4 Mar 2016 09:06:12 +0000 (17:06 +0800)]
mmc: block: ioctl return EINVAL if cmd unknown
We should return -EINVAL if cmd is not MMC_IOC_CMD or MMC_IOC_MULTI_CMD,
otherwise blkdev_roset will return -EPERM.
Android adb, make_block_device_writable ioctl BLKROSET will return error,
make adb remount with error:
remount of /system failed;
couldn't make block device writable: Operation not permitted
Change-Id: I7d0a5727110c0fd9ad301a377e5002eae23f8aed
Fixes: a5f5774c55a2 ("mmc: block: Add new ioctl to send multi commands")
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Roger Chen [Fri, 4 Mar 2016 06:19:03 +0000 (14:19 +0800)]
ARM64: dts: rk3366-tb: correct reset pin for Ethernet PHY
Change-Id: I94c1f22880965ab69865eeb81c0a33fa4f4201b4
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Roger Chen [Fri, 4 Mar 2016 06:17:23 +0000 (14:17 +0800)]
ARM64: dts: rk3366: fix SCLK_MAC_TX && drive strength for RGMII TX pins
Change-Id: I0fe3d33c99d1fb0fb5451ee6123d44e3399b84da
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Roger Chen [Fri, 4 Mar 2016 06:10:42 +0000 (14:10 +0800)]
ARM64: configs: enable CONFIG_STMMAC_ETH for Rockchip GMAC
Change-Id: I469a1b97980316bb08810515efab926e59d2432c
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>