Jakob Stoklund Olesen [Sun, 11 Jul 2010 17:01:17 +0000 (17:01 +0000)]
Remove TargetInstrInfo::copyRegToReg entirely.
Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108095
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Rafael Espindola [Sun, 11 Jul 2010 16:49:10 +0000 (16:49 +0000)]
Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108094
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Rafael Espindola [Sun, 11 Jul 2010 16:45:17 +0000 (16:45 +0000)]
Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.
The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.
The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108093
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 16:40:46 +0000 (16:40 +0000)]
Replace copyRegToReg with copyPhysReg for SystemZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108092
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 16:22:13 +0000 (16:22 +0000)]
Avoid SSE instructions in FastIsel when it is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108091
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Chandler Carruth [Sun, 11 Jul 2010 08:18:12 +0000 (08:18 +0000)]
Remove two other uses of ATTRIBUTE_UNUSED for variables only used within
assert()s, switching to void-casts. Removed an unneeded Compiler.h include as
a result. There are two other uses in LLVM, but they're not due to assert()s,
so I've left them alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108088
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:56:13 +0000 (07:56 +0000)]
Replace copyRegToReg with copyPhysReg for XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108087
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:56:09 +0000 (07:56 +0000)]
Replace copyRegToReg with copyPhysReg for Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108086
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:31:03 +0000 (07:31 +0000)]
Replace copyRegToReg with copyPhysReg for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108084
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:31:00 +0000 (07:31 +0000)]
Replace copyRegToReg with copyPhysReg for PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108083
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:30:57 +0000 (07:30 +0000)]
Fix PIC16 comments referencing copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108082
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:53:33 +0000 (06:53 +0000)]
Replace copyRegToReg with copyPhysReg for PIC16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108081
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:53:30 +0000 (06:53 +0000)]
Replace copyRegToReg with copyPhysReg for MSP430.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108080
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:53:27 +0000 (06:53 +0000)]
Replace copyRegToReg with copyPhysReg for MBlaze.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108079
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:33:54 +0000 (06:33 +0000)]
Replace copyRegToReg with copyPhysReg for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108078
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:44:34 +0000 (05:44 +0000)]
Replace copyRegToReg with copyPhysReg for Blackfin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108077
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:44:30 +0000 (05:44 +0000)]
X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108076
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:17:06 +0000 (05:17 +0000)]
Remove copyRegToReg from TargetInstrInfo so it is not longer accesible.
Use a COPY instruction instead for register copies, or TII::copyPhysReg() after
COPY instructions are lowered.
Targets should implement copyPhysReg instead of copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108075
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:17:02 +0000 (05:17 +0000)]
Use COPY in X86FastISel::X86SelectRet.
Don't try a cross-class copy. That is very unlikely anywy since return value
registers are usually register class friendly. (%EAX, %XMM0, etc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108074
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:16:54 +0000 (05:16 +0000)]
Use COPY for fast-isel bitconvert, but don't create cross-class copies.
This doesn't change the behavior of SelectBitcast for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108073
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Rafael Espindola [Sun, 11 Jul 2010 04:01:49 +0000 (04:01 +0000)]
Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.
The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:
* The 's' in target data: If this is set to the minimal alignment of any
argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
example.
* The getTransientStackAlignment method. It is possible for an architecture to
have argument less aligned than what we maintain the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 03:53:50 +0000 (03:53 +0000)]
Replace copyRegToReg with COPY in FastISelEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108071
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 03:31:05 +0000 (03:31 +0000)]
Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
This assumes that the registers can be copied which is probably a safe
assumption.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 03:31:00 +0000 (03:31 +0000)]
Use COPY in FastISel everywhere it is safe and trivial.
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 01:08:31 +0000 (01:08 +0000)]
Replace copyRegToReg with copyPhysReg for Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108066
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 01:08:23 +0000 (01:08 +0000)]
Replace copyRegToReg with copyPhysReg for Alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108065
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Dan Gohman [Sun, 11 Jul 2010 00:08:34 +0000 (00:08 +0000)]
sdiv overflow is outright undefined behavior, with or without the
'exact' keyword. Thanks to nlewycky for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108064
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 22:43:03 +0000 (22:43 +0000)]
Use COPY in targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 22:42:59 +0000 (22:42 +0000)]
Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 22:42:53 +0000 (22:42 +0000)]
Only collect subreg extracting copies for later coalescing.
This also avoids fatal copies from physregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108061
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Dan Gohman [Sat, 10 Jul 2010 22:42:31 +0000 (22:42 +0000)]
Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;
if a block is split (by a custom inserter), the insert point may be in a
different block than it was originally. This fixes 32-bit llvm-gcc
bootstrap builds, and I haven't been able to reproduce it otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108060
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Dan Gohman [Sat, 10 Jul 2010 22:42:12 +0000 (22:42 +0000)]
Fix this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108059
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Duncan Sands [Sat, 10 Jul 2010 20:31:42 +0000 (20:31 +0000)]
The accumulator tail recursion transform claims to work for any associative
operation, but the way it's implemented requires the operation to also be
commutative. So add a check for commutativity (and tweak the corresponding
comments). This makes no difference in practice since every associative
LLVM instruction is also commutative! Here's an example to show the need
for commutativity: the accum_recursion.ll testcase calculates the factorial
function. Before the transformation the result of a call is
((((1*1)*2)*3)...)*x
while afterwards it is
(((1*x)*(x-1))...*2)*1
which clearly requires both associativity and commutativity of * to be equal
to the original.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108056
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 19:08:25 +0000 (19:08 +0000)]
Emit COPY instructions instead of using copyRegToReg in InstrEmitter,
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination.
This switches the bulk of register copies to using COPY, but many less used
copyRegToReg calls remain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050
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Bill Wendling [Sat, 10 Jul 2010 18:56:35 +0000 (18:56 +0000)]
Use non-bool values for .count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108048
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 17:42:34 +0000 (17:42 +0000)]
Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.
Based on a patch by Rafael EspĂndola.
Attempt to make the FpSET_ST1 hack more robust, but we are still relying on
FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline
asm.
We support:
FpSET_ST0
INLINEASM
FpSET_ST0
FpSET_ST1
INLINEASM
with and without kills on the arguments. We don't support:
FpSET_ST1
FpSET_ST0
INLINEASM
nor
FpSET_ST1
INLINEASM
Just Don't Do It!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108047
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 16:30:25 +0000 (16:30 +0000)]
FileCheckize inline asm FP stack tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108046
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Dan Gohman [Sat, 10 Jul 2010 13:55:45 +0000 (13:55 +0000)]
Insert IMPLICIT_DEF instructions at the current insert position, not
at the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045
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Chandler Carruth [Sat, 10 Jul 2010 12:06:22 +0000 (12:06 +0000)]
Add parentheses yet again to satisfy GCC's warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108043
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Dan Gohman [Sat, 10 Jul 2010 09:01:35 +0000 (09:01 +0000)]
Add an explicit triple to make this test behave consistently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108041
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Dan Gohman [Sat, 10 Jul 2010 09:01:03 +0000 (09:01 +0000)]
Fix this XTARGET so that this does doesn't XPASS on non-darwin hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108040
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Dan Gohman [Sat, 10 Jul 2010 09:00:22 +0000 (09:00 +0000)]
Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 04:04:25 +0000 (04:04 +0000)]
An x86 function returns a floating point value in st(0), and we must make sure
it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent
the required sideeffect, so insert an FpGET_ST0 instruction directly instead.
This will matter when CopyFromReg gets lowered to a generic COPY instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108037
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Devang Patel [Fri, 9 Jul 2010 21:48:31 +0000 (21:48 +0000)]
Update DBG_VALUE to refer appropriate stack slot in case of a spill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108023
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 21:46:19 +0000 (21:46 +0000)]
Declare YMM subregisters in the right way! Thanks Jakob
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 21:42:42 +0000 (21:42 +0000)]
Add AVX 256-bit packed MOVNT variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 21:27:55 +0000 (21:27 +0000)]
Remember the *_TC opcodes for load/store
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108020
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 21:20:35 +0000 (21:20 +0000)]
Add AVX 256-bit unpack and interleave
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:55:49 +0000 (20:55 +0000)]
Fix small bug in isMoveInstr -> COPY translation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108013
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:43:13 +0000 (20:43 +0000)]
Automatically fold COPY instructions into stack load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108012
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:43:09 +0000 (20:43 +0000)]
Fix a few tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108011
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:43:05 +0000 (20:43 +0000)]
Remat uncoalescable COPY instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108010
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Jim Grosbach [Fri, 9 Jul 2010 20:27:06 +0000 (20:27 +0000)]
In the presence of variable sized objects, allocate an emergency spill slot.
rdar://
8131327
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008
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Bill Wendling [Fri, 9 Jul 2010 19:44:12 +0000 (19:44 +0000)]
Clarify what mysterious check means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005
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Dan Gohman [Fri, 9 Jul 2010 19:17:36 +0000 (19:17 +0000)]
Add a target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108003
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Dan Gohman [Fri, 9 Jul 2010 18:49:45 +0000 (18:49 +0000)]
Fix MachineLICM to actually visit inner loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 18:27:43 +0000 (18:27 +0000)]
Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 17:29:08 +0000 (17:29 +0000)]
Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.
This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.
The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991
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Gabor Greif [Fri, 9 Jul 2010 16:51:20 +0000 (16:51 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107990
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Gabor Greif [Fri, 9 Jul 2010 16:42:04 +0000 (16:42 +0000)]
remove useless cast and fix typos in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107989
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Gabor Greif [Fri, 9 Jul 2010 16:39:02 +0000 (16:39 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107988
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Bob Wilson [Fri, 9 Jul 2010 16:37:18 +0000 (16:37 +0000)]
--- Reverse-merging r107947 into '.':
U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987
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Gabor Greif [Fri, 9 Jul 2010 16:31:08 +0000 (16:31 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107984
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Gabor Greif [Fri, 9 Jul 2010 16:26:41 +0000 (16:26 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107983
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Gabor Greif [Fri, 9 Jul 2010 16:22:36 +0000 (16:22 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107982
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Gabor Greif [Fri, 9 Jul 2010 16:17:52 +0000 (16:17 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107981
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Gabor Greif [Fri, 9 Jul 2010 16:08:33 +0000 (16:08 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980
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Gabor Greif [Fri, 9 Jul 2010 16:01:21 +0000 (16:01 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107979
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Gabor Greif [Fri, 9 Jul 2010 15:53:42 +0000 (15:53 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107978
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Gabor Greif [Fri, 9 Jul 2010 15:52:36 +0000 (15:52 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107977
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Gabor Greif [Fri, 9 Jul 2010 15:40:10 +0000 (15:40 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107976
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Gabor Greif [Fri, 9 Jul 2010 15:25:42 +0000 (15:25 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107975
91177308-0d34-0410-b5e6-
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Gabor Greif [Fri, 9 Jul 2010 15:25:09 +0000 (15:25 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107974
91177308-0d34-0410-b5e6-
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Gabor Greif [Fri, 9 Jul 2010 15:01:36 +0000 (15:01 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107972
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Gabor Greif [Fri, 9 Jul 2010 14:48:08 +0000 (14:48 +0000)]
cache result of operator* (found by inspection)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107971
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Gabor Greif [Fri, 9 Jul 2010 14:46:49 +0000 (14:46 +0000)]
fix clang selfhost issue (shadowing)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107970
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Gabor Greif [Fri, 9 Jul 2010 14:36:49 +0000 (14:36 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107969
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Gabor Greif [Fri, 9 Jul 2010 14:29:14 +0000 (14:29 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107968
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Gabor Greif [Fri, 9 Jul 2010 14:28:41 +0000 (14:28 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107967
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Gabor Greif [Fri, 9 Jul 2010 14:18:23 +0000 (14:18 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107966
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Gabor Greif [Fri, 9 Jul 2010 14:02:13 +0000 (14:02 +0000)]
cache operator*'s result (in multiple functions)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107965
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Gabor Greif [Fri, 9 Jul 2010 14:00:56 +0000 (14:00 +0000)]
refactor type expressions and cache operator*'s result
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107964
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Gabor Greif [Fri, 9 Jul 2010 13:17:13 +0000 (13:17 +0000)]
do not repeatedly dereference use_iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107963
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Gabor Greif [Fri, 9 Jul 2010 12:23:50 +0000 (12:23 +0000)]
do not repeatedly dereference use_iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107962
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Gabor Greif [Fri, 9 Jul 2010 10:42:13 +0000 (10:42 +0000)]
two more cases of reuse result of operator*, found by inspection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107961
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Gabor Greif [Fri, 9 Jul 2010 10:32:31 +0000 (10:32 +0000)]
another case of reuse result of operator*, it is expensive to recompute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107960
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Gabor Greif [Fri, 9 Jul 2010 09:50:51 +0000 (09:50 +0000)]
reuse result of operator*, it is expensive to recompute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107959
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Lang Hames [Fri, 9 Jul 2010 09:19:23 +0000 (09:19 +0000)]
Added a support for inserting new MBBs into the numbering.
Unlike insertMachineInstrInMaps this does not guarantee live intervals will
remain correct. The caller will need to manually update intervals to account
for the changes made to the CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107958
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 05:56:21 +0000 (05:56 +0000)]
Avoid creating %physreg:subidx operands in SimpleRegisterCoalescing::RemoveCopyByCommutingDef.
This fixes PR7602.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107957
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 04:35:38 +0000 (04:35 +0000)]
Deal with a few remaining spots that assume physical registers have live intervals.
This fixes PR7601.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107955
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 01:56:45 +0000 (01:56 +0000)]
Merge VEX enums with other x86 enum forms. Also fix all checks of which VEX
fields to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107952
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 01:32:11 +0000 (01:32 +0000)]
Fix test to be less sensitive of regalloc accidents
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107951
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 01:27:21 +0000 (01:27 +0000)]
Fix broken isCopy handling in TrimLiveIntervalToLastUse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107950
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 01:27:19 +0000 (01:27 +0000)]
Handle COPY in VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107949
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Dan Gohman [Fri, 9 Jul 2010 01:06:48 +0000 (01:06 +0000)]
Fix the memoperand offsets in code generated for va_start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107948
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Dan Gohman [Fri, 9 Jul 2010 00:59:16 +0000 (00:59 +0000)]
These changes should have accompanied r107943.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107947
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Chris Lattner [Fri, 9 Jul 2010 00:49:41 +0000 (00:49 +0000)]
have the mc lowering process handle a few tail call forms, lowering them to
jumps where possible and turning the TAILCALL marker in the instruction
asm string into a proper comment.
This eliminates a FIXME and is on the path to finishing:
rdar://
7639610 - eliminate encoding and asm info for TAILJMPd TAILJMPr TAILJMPn, etc.
However, I can't eliminate the encodings for these instructions because the JIT
still exists and has its own copy of the encoder, sigh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107946
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Bob Wilson [Fri, 9 Jul 2010 00:47:20 +0000 (00:47 +0000)]
Print "dregpair" NEON operands with a space between them, for readability and
consistency with other instructions that have lists of register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107944
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Dan Gohman [Fri, 9 Jul 2010 00:39:23 +0000 (00:39 +0000)]
Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 00:38:14 +0000 (00:38 +0000)]
Factor out x86 segment override prefix encoding, and also use it for VEX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107942
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