Chris Lattner [Mon, 19 Mar 2007 00:11:30 +0000 (00:11 +0000)]
new testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35148
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Chris Lattner [Mon, 19 Mar 2007 00:09:00 +0000 (00:09 +0000)]
testcase for SROA with memset etc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35147
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Nick Lewycky [Sun, 18 Mar 2007 22:58:46 +0000 (22:58 +0000)]
Clean up this code and fix subtract miscompile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35146
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Chris Lattner [Sun, 18 Mar 2007 22:51:34 +0000 (22:51 +0000)]
Implement InstCombine/and-xor-merge.ll:test[12].
Rearrange some code to simplify it now that shifts are binops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35145
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Chris Lattner [Sun, 18 Mar 2007 22:50:57 +0000 (22:50 +0000)]
new testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35144
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Chris Lattner [Sun, 18 Mar 2007 22:41:33 +0000 (22:41 +0000)]
minor updates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143
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Nick Lewycky [Sun, 18 Mar 2007 14:37:20 +0000 (14:37 +0000)]
This is implemented. We now generate:
entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142
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Evan Cheng [Sun, 18 Mar 2007 09:05:55 +0000 (09:05 +0000)]
- Merge UsedBlocks info after two virtual registers are coalesced.
- Use distance to closest use to determine whether to abort coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141
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Evan Cheng [Sun, 18 Mar 2007 09:02:31 +0000 (09:02 +0000)]
Keep UsedBlocks info accurate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140
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Evan Cheng [Sun, 18 Mar 2007 03:26:04 +0000 (03:26 +0000)]
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35139
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Nick Lewycky [Sun, 18 Mar 2007 01:09:32 +0000 (01:09 +0000)]
Propagate ValueRanges across equality.
Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35138
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Anton Korobeynikov [Sat, 17 Mar 2007 14:48:06 +0000 (14:48 +0000)]
Silence warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35137
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Evan Cheng [Sat, 17 Mar 2007 09:29:54 +0000 (09:29 +0000)]
Track the BB's where each virtual register is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35135
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Evan Cheng [Sat, 17 Mar 2007 09:27:35 +0000 (09:27 +0000)]
Joining a live interval of a physical register with a virtual one can turn out
to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!
Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35134
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Evan Cheng [Sat, 17 Mar 2007 08:53:30 +0000 (08:53 +0000)]
Use SmallSet instead of std::set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35133
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Evan Cheng [Sat, 17 Mar 2007 08:22:49 +0000 (08:22 +0000)]
If sdisel has decided to sink GEP index expression into any BB. Replace all uses
in that BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35132
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Evan Cheng [Sat, 17 Mar 2007 03:18:32 +0000 (03:18 +0000)]
GEP index sink test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35131
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Devang Patel [Sat, 17 Mar 2007 00:14:52 +0000 (00:14 +0000)]
Test case for X86 inline asm constraint 'I'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35130
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Devang Patel [Sat, 17 Mar 2007 00:13:28 +0000 (00:13 +0000)]
Support 'I' inline asm constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129
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Lauro Ramos Venancio [Fri, 16 Mar 2007 22:54:16 +0000 (22:54 +0000)]
Only ARMv6 has BSWAP.
Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128
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Evan Cheng [Fri, 16 Mar 2007 18:32:30 +0000 (18:32 +0000)]
Turn on GEP index sinking by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35127
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Evan Cheng [Fri, 16 Mar 2007 17:50:20 +0000 (17:50 +0000)]
Stupid bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35126
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Bill Wendling [Fri, 16 Mar 2007 09:44:46 +0000 (09:44 +0000)]
And now support for MMX logical operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125
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Evan Cheng [Fri, 16 Mar 2007 08:46:27 +0000 (08:46 +0000)]
Sink a binary expression into its use blocks if it is a loop invariant
computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123
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Evan Cheng [Fri, 16 Mar 2007 08:43:56 +0000 (08:43 +0000)]
Added isLegalAddressExpression(). Only allows X +/- C for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122
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Evan Cheng [Fri, 16 Mar 2007 08:42:32 +0000 (08:42 +0000)]
Added isLegalAddressExpression hook to test if the given expression can be
folded into target addressing mode for the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121
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Evan Cheng [Fri, 16 Mar 2007 08:41:06 +0000 (08:41 +0000)]
These forward declarations are not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35120
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Nick Lewycky [Fri, 16 Mar 2007 02:37:39 +0000 (02:37 +0000)]
Add more comments and update to new asm syntax.
Add new micro-optimizations.
Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35119
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Bill Wendling [Thu, 15 Mar 2007 21:24:36 +0000 (21:24 +0000)]
Multiplication support for MMX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118
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Evan Cheng [Thu, 15 Mar 2007 21:19:28 +0000 (21:19 +0000)]
Debugging output stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35117
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Reid Spencer [Thu, 15 Mar 2007 03:26:42 +0000 (03:26 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35116
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Reid Spencer [Thu, 15 Mar 2007 03:25:34 +0000 (03:25 +0000)]
Revert last changes as they introduced other problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35115
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Evan Cheng [Wed, 14 Mar 2007 23:26:40 +0000 (23:26 +0000)]
ARM isel should match ldr x +/- x * (2^n) to ldr [x, +/- x, lsl #log2(n)].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35114
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Reid Spencer [Wed, 14 Mar 2007 23:13:06 +0000 (23:13 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35113
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Reid Spencer [Wed, 14 Mar 2007 23:11:45 +0000 (23:11 +0000)]
The sign information was not propagating into the rename map so only the
last entry stored in the map could be retrieved for a given integer type.
Propagating the sign information required an invasive change to ensure that
all ValueRef (ValID) instances get the right sign information as well. Also,
put in some assertions to ensure the RenameMap always gives us out the type
that is expected.
This fixes PR1256 and
test/Assembler/2007-03-14-UgpradeLocalSignless.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35112
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Reid Spencer [Wed, 14 Mar 2007 23:08:04 +0000 (23:08 +0000)]
For PR1256:
Carry sign with ValID and make TypeInfo sortable (useful in a map).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35111
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Reid Spencer [Wed, 14 Mar 2007 23:07:24 +0000 (23:07 +0000)]
Test case for PR1256.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35110
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Evan Cheng [Wed, 14 Mar 2007 22:43:40 +0000 (22:43 +0000)]
Estimate a cost using the possible number of scratch registers required and use
it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35109
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Evan Cheng [Wed, 14 Mar 2007 22:11:11 +0000 (22:11 +0000)]
Under X86-64 large code model, do not emit 32-bit pc relative calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108
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Evan Cheng [Wed, 14 Mar 2007 21:03:53 +0000 (21:03 +0000)]
Notes about codegen issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107
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Duncan Sands [Wed, 14 Mar 2007 20:24:53 +0000 (20:24 +0000)]
Test that the size of a view converted object is determined by the target
type, not the source type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35106
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Evan Cheng [Wed, 14 Mar 2007 20:20:19 +0000 (20:20 +0000)]
Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105
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Evan Cheng [Wed, 14 Mar 2007 19:44:58 +0000 (19:44 +0000)]
Oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104
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Jim Laskey [Wed, 14 Mar 2007 19:32:21 +0000 (19:32 +0000)]
Change e-mail address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35103
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Jim Laskey [Wed, 14 Mar 2007 19:31:19 +0000 (19:31 +0000)]
Add link to exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35102
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Jim Laskey [Wed, 14 Mar 2007 19:30:33 +0000 (19:30 +0000)]
Adding credit for PPC changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35101
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Jim Laskey [Wed, 14 Mar 2007 19:29:42 +0000 (19:29 +0000)]
First draft of exception handling doc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35100
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Jeff Cohen [Wed, 14 Mar 2007 15:27:17 +0000 (15:27 +0000)]
Make older versions of bison happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35099
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Jeff Cohen [Wed, 14 Mar 2007 15:25:21 +0000 (15:25 +0000)]
Fix for VS 2005 problem supplied by Morten Ofstad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35098
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Evan Cheng [Wed, 14 Mar 2007 10:51:55 +0000 (10:51 +0000)]
X86-64 JIT is in large code model. Need stubs for direct calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097
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Evan Cheng [Wed, 14 Mar 2007 10:48:08 +0000 (10:48 +0000)]
x86-64 JIT stub codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096
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Evan Cheng [Wed, 14 Mar 2007 10:44:30 +0000 (10:44 +0000)]
Preliminary support for X86-64 JIT stub codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095
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Zhou Sheng [Wed, 14 Mar 2007 09:07:33 +0000 (09:07 +0000)]
ShiftAmt might equal to zero. Handle this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35094
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Zhou Sheng [Wed, 14 Mar 2007 03:21:24 +0000 (03:21 +0000)]
Enable KnownZero/One.clear().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35093
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Evan Cheng [Tue, 13 Mar 2007 23:31:47 +0000 (23:31 +0000)]
New test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35091
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Evan Cheng [Tue, 13 Mar 2007 23:26:41 +0000 (23:26 +0000)]
This got better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35090
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Evan Cheng [Tue, 13 Mar 2007 23:25:11 +0000 (23:25 +0000)]
Try schedule def + use closer whne Sethi-Ullman numbers are the same.
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4
Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2
This creates more short live intervals which work better with the register
allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35089
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Evan Cheng [Tue, 13 Mar 2007 21:05:54 +0000 (21:05 +0000)]
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088
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Evan Cheng [Tue, 13 Mar 2007 20:37:59 +0000 (20:37 +0000)]
Zero is always a legal AM immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087
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Evan Cheng [Tue, 13 Mar 2007 20:34:37 +0000 (20:34 +0000)]
Correct type info for isLegalAddressImmediate() check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35086
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Duncan Sands [Tue, 13 Mar 2007 15:12:35 +0000 (15:12 +0000)]
Test support for arrays with non-zero first index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35084
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Nicolas Geoffray [Tue, 13 Mar 2007 15:02:46 +0000 (15:02 +0000)]
Stack and register alignment of call arguments in the ELF ABI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083
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Chris Lattner [Tue, 13 Mar 2007 14:27:42 +0000 (14:27 +0000)]
ifdef out some dead code.
Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35082
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Chris Lattner [Tue, 13 Mar 2007 14:25:35 +0000 (14:25 +0000)]
testcase for PR1244
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35081
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Zhou Sheng [Tue, 13 Mar 2007 06:40:59 +0000 (06:40 +0000)]
For expression like
"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35080
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Zhou Sheng [Tue, 13 Mar 2007 06:16:26 +0000 (06:16 +0000)]
Add zextOrCopy() into APInt for convenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35079
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Zhou Sheng [Tue, 13 Mar 2007 02:23:10 +0000 (02:23 +0000)]
In APInt version ComputeMaskedBits():
1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
2. Make code more efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35078
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Evan Cheng [Tue, 13 Mar 2007 01:20:42 +0000 (01:20 +0000)]
Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077
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Evan Cheng [Mon, 12 Mar 2007 23:37:10 +0000 (23:37 +0000)]
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35076
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Evan Cheng [Mon, 12 Mar 2007 23:30:29 +0000 (23:30 +0000)]
Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075
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Evan Cheng [Mon, 12 Mar 2007 23:29:01 +0000 (23:29 +0000)]
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074
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Evan Cheng [Mon, 12 Mar 2007 23:28:50 +0000 (23:28 +0000)]
More flexible TargetLowering LSR hooks for testing whether an immediate is
a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073
91177308-0d34-0410-b5e6-
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Evan Cheng [Mon, 12 Mar 2007 23:27:37 +0000 (23:27 +0000)]
Use new TargetLowering addressing modes hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35072
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Evan Cheng [Mon, 12 Mar 2007 23:26:27 +0000 (23:26 +0000)]
More flexible TargetLowering LSR hooks for testing whether an immediate is
a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35071
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Evan Cheng [Mon, 12 Mar 2007 22:58:52 +0000 (22:58 +0000)]
Stupid bug: SSE2 supports v2i64 add / sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070
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Reid Spencer [Mon, 12 Mar 2007 18:37:25 +0000 (18:37 +0000)]
Revert the last patch as it violates the conditions of sext/zext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35068
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Jeff Cohen [Mon, 12 Mar 2007 17:57:00 +0000 (17:57 +0000)]
Unbreak C++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35067
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Jeff Cohen [Mon, 12 Mar 2007 17:56:27 +0000 (17:56 +0000)]
Unbreak VC++ build. Do not use identifiers starting with _ as they are reserved and
can collide with system defined names. Windows defines _BB, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35066
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Zhou Sheng [Mon, 12 Mar 2007 17:47:45 +0000 (17:47 +0000)]
For APInt::z/sext(width), if width == BitWidth, just return *this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35065
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Reid Spencer [Mon, 12 Mar 2007 17:25:59 +0000 (17:25 +0000)]
Add an APInt version of SimplifyDemandedBits.
Patch by Zhou Sheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35064
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Reid Spencer [Mon, 12 Mar 2007 17:15:10 +0000 (17:15 +0000)]
Add an APInt version of ShrinkDemandedConstant.
Patch by Zhou Sheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35063
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Zhou Sheng [Mon, 12 Mar 2007 16:54:56 +0000 (16:54 +0000)]
Avoid to assert on "(KnownZero & KnownOne) == 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35062
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Zhou Sheng [Mon, 12 Mar 2007 05:44:52 +0000 (05:44 +0000)]
In function ComputeMaskedBits():
1. Replace getSignedMinValue() with getSignBit() for better code readability.
2. Replace APIntOps::shl() with operator<<= for convenience.
3. Make APInt construction more effective.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35060
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Zhou Sheng [Sun, 11 Mar 2007 07:16:10 +0000 (07:16 +0000)]
Add getSignBit() and operator<<= into APInt for convenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35059
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Nick Lewycky [Sat, 10 Mar 2007 18:12:48 +0000 (18:12 +0000)]
Add value ranges. Currently inefficient in both execution time and
optimization power.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35058
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Anton Korobeynikov [Sat, 10 Mar 2007 16:46:28 +0000 (16:46 +0000)]
Use range tests in LowerSwitch, where possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35057
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Nick Lewycky [Sat, 10 Mar 2007 15:54:12 +0000 (15:54 +0000)]
Add getter methods for the extremes of a ConstantRange.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35056
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Bill Wendling [Sat, 10 Mar 2007 09:57:05 +0000 (09:57 +0000)]
Adding more arithmetic operators to MMX. This is an almost exact copy of
the addition. Please let me know if you have suggestions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055
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Devang Patel [Fri, 9 Mar 2007 23:41:03 +0000 (23:41 +0000)]
Remove dead comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35053
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Devang Patel [Fri, 9 Mar 2007 23:39:14 +0000 (23:39 +0000)]
Avoid recursion. Use iterative algorithm for RenamePass().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35052
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Devang Patel [Fri, 9 Mar 2007 21:19:53 +0000 (21:19 +0000)]
Increment iterator now because IVUseShouldUsePostIncValue may remove
User from the list of I users.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35051
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Reid Spencer [Fri, 9 Mar 2007 21:19:09 +0000 (21:19 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35050
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Evan Cheng [Fri, 9 Mar 2007 19:46:06 +0000 (19:46 +0000)]
Minor stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049
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Evan Cheng [Fri, 9 Mar 2007 19:35:33 +0000 (19:35 +0000)]
Add comments about LSR / ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048
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Evan Cheng [Fri, 9 Mar 2007 19:34:51 +0000 (19:34 +0000)]
Unfinished work and ideas related to register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047
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Reid Spencer [Fri, 9 Mar 2007 19:26:52 +0000 (19:26 +0000)]
For PR1245:
Account for the sign bit when computing the number of bits required for
a negative integer literal constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35046
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Dale Johannesen [Fri, 9 Mar 2007 19:18:59 +0000 (19:18 +0000)]
apply comments from review of last patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045
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Dale Johannesen [Fri, 9 Mar 2007 17:58:17 +0000 (17:58 +0000)]
Add some observations from CoreGraphics benchmark. Remove register
scavenging todo item, since it is now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35044
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Anton Korobeynikov [Fri, 9 Mar 2007 11:53:34 +0000 (11:53 +0000)]
Unbreak mingw32 build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35042
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Evan Cheng [Fri, 9 Mar 2007 09:48:56 +0000 (09:48 +0000)]
If a virtual register is already marked alive in this block, that means it is
alive in one of the successor block. Do not add it to the kill list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35041
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