Rafael Espindola [Mon, 12 Jul 2010 02:55:34 +0000 (02:55 +0000)]
Convert the last use of getPhysicalRegisterRegClass and remove it.
AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An
instruction might be using a register that can only be replaced with one from
a subclass of getPhysicalRegisterRegClass.
With this patch we use getMinimalPhysRegClass. This is correct, but
conservative. We should check the uses of the register and select the
largest register class that can be used in all of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108122
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Eric Christopher [Mon, 12 Jul 2010 02:32:44 +0000 (02:32 +0000)]
Fix up the ocaml kaleidoscope example as well.
Note that the example currently doesn't appear to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108121
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Jakob Stoklund Olesen [Mon, 12 Jul 2010 02:12:47 +0000 (02:12 +0000)]
A basic block that only uses RFP registers still needs the FP_REG_KILL marker.
This fixes PR7375.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108120
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Rafael Espindola [Mon, 12 Jul 2010 01:45:38 +0000 (01:45 +0000)]
Don't use getPhysicalRegisterRegClass in PBQP. The existing checks that the
physical register can be allocated in the class of the virtual are sufficient.
I think that the test for virtual registers is more strict than it needs to be,
it should be possible to coalesce two virtual registers the class of one
is a subclass of the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108118
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Chris Lattner [Mon, 12 Jul 2010 01:19:22 +0000 (01:19 +0000)]
fix PR7311 by avoiding breaking casts when a bitcast from scalar->vector
is involved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108117
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Chris Lattner [Mon, 12 Jul 2010 00:57:28 +0000 (00:57 +0000)]
make the prototypes for CreateMalloc and CreateFree more consistent. Patch
by Hans Vandierendonck from PR7605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108116
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Rafael Espindola [Mon, 12 Jul 2010 00:52:33 +0000 (00:52 +0000)]
Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp to
getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.
Update getLoadStoreRegOpcode to handle GR32_AD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108115
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Chris Lattner [Mon, 12 Jul 2010 00:47:34 +0000 (00:47 +0000)]
if jump threading is able to infer interesting values on both
the LHS and RHS of an and/or instruction, don't multiply add
known predecessor values. This fixes the crash on testcase
from PR7498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108114
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Chris Lattner [Mon, 12 Jul 2010 00:22:51 +0000 (00:22 +0000)]
fix PR7429, a crash turning a load from a string into a float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108113
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Chris Lattner [Mon, 12 Jul 2010 00:21:10 +0000 (00:21 +0000)]
convert to filechecconvert to filecheckk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108112
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Chris Lattner [Mon, 12 Jul 2010 00:19:47 +0000 (00:19 +0000)]
merge two tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108111
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Chris Lattner [Mon, 12 Jul 2010 00:09:55 +0000 (00:09 +0000)]
improve Path::makeUnique when mkstemp/mktemp are not available
patch by Lasse Kärkkäinen in PR7404.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108110
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Chris Lattner [Mon, 12 Jul 2010 00:00:35 +0000 (00:00 +0000)]
change machinelicm to use MachineInstr::isSafeToMove. No
intended functionality change.
The avoidance of hoistiing implicitdef seems wrong though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108109
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Chris Lattner [Sun, 11 Jul 2010 23:07:28 +0000 (23:07 +0000)]
first part of JIT support for address of labels, part of PR7264,
patch by Yuri!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108107
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Chris Lattner [Sun, 11 Jul 2010 22:07:02 +0000 (22:07 +0000)]
introduce WinCOFFObjectWriter, patch by Michael Spencer!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108103
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Chris Lattner [Sun, 11 Jul 2010 22:05:00 +0000 (22:05 +0000)]
introduce WinCOFFStreamer.cpp, patch by Michael Spencer!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108102
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Nick Lewycky [Sun, 11 Jul 2010 20:36:29 +0000 (20:36 +0000)]
If it's safe to speculatively execute load(alloca) the it's safe to execute
load(gep(alloca)) where the gep is all-zeros. There's more we could do here but
this is a common case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108101
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Chris Lattner [Sun, 11 Jul 2010 19:42:53 +0000 (19:42 +0000)]
fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108100
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 19:19:13 +0000 (19:19 +0000)]
RISC architectures get their memory operand folding for free.
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108099
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 18:19:39 +0000 (18:19 +0000)]
Use target independent COPY instructions for the fake fextend and fround
operations in x87 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108098
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 17:17:35 +0000 (17:17 +0000)]
Remove redundant branch. Thanks, Anton!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108097
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 17:13:42 +0000 (17:13 +0000)]
Remove obsolete README_SSE note.
We are generating movaps for all XMM register copies, including scalar
floating point values. This is known to be at least as good as movss and movsd
for all known architectures up to and including Nehalem because it avoids a
partial register stall.
The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when
operands come from the integer unit). We don't now that switching movaps to
movapd has any benefit.
The same applies to andps -> pand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108096
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 17:01:17 +0000 (17:01 +0000)]
Remove TargetInstrInfo::copyRegToReg entirely.
Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108095
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Rafael Espindola [Sun, 11 Jul 2010 16:49:10 +0000 (16:49 +0000)]
Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108094
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Rafael Espindola [Sun, 11 Jul 2010 16:45:17 +0000 (16:45 +0000)]
Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.
The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.
The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108093
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 16:40:46 +0000 (16:40 +0000)]
Replace copyRegToReg with copyPhysReg for SystemZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108092
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 16:22:13 +0000 (16:22 +0000)]
Avoid SSE instructions in FastIsel when it is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108091
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Chandler Carruth [Sun, 11 Jul 2010 08:18:12 +0000 (08:18 +0000)]
Remove two other uses of ATTRIBUTE_UNUSED for variables only used within
assert()s, switching to void-casts. Removed an unneeded Compiler.h include as
a result. There are two other uses in LLVM, but they're not due to assert()s,
so I've left them alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108088
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:56:13 +0000 (07:56 +0000)]
Replace copyRegToReg with copyPhysReg for XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108087
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:56:09 +0000 (07:56 +0000)]
Replace copyRegToReg with copyPhysReg for Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108086
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:31:03 +0000 (07:31 +0000)]
Replace copyRegToReg with copyPhysReg for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108084
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:31:00 +0000 (07:31 +0000)]
Replace copyRegToReg with copyPhysReg for PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108083
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 07:30:57 +0000 (07:30 +0000)]
Fix PIC16 comments referencing copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108082
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:53:33 +0000 (06:53 +0000)]
Replace copyRegToReg with copyPhysReg for PIC16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108081
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:53:30 +0000 (06:53 +0000)]
Replace copyRegToReg with copyPhysReg for MSP430.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108080
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:53:27 +0000 (06:53 +0000)]
Replace copyRegToReg with copyPhysReg for MBlaze.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108079
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 06:33:54 +0000 (06:33 +0000)]
Replace copyRegToReg with copyPhysReg for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108078
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:44:34 +0000 (05:44 +0000)]
Replace copyRegToReg with copyPhysReg for Blackfin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108077
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:44:30 +0000 (05:44 +0000)]
X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108076
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:17:06 +0000 (05:17 +0000)]
Remove copyRegToReg from TargetInstrInfo so it is not longer accesible.
Use a COPY instruction instead for register copies, or TII::copyPhysReg() after
COPY instructions are lowered.
Targets should implement copyPhysReg instead of copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108075
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:17:02 +0000 (05:17 +0000)]
Use COPY in X86FastISel::X86SelectRet.
Don't try a cross-class copy. That is very unlikely anywy since return value
registers are usually register class friendly. (%EAX, %XMM0, etc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108074
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 05:16:54 +0000 (05:16 +0000)]
Use COPY for fast-isel bitconvert, but don't create cross-class copies.
This doesn't change the behavior of SelectBitcast for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108073
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Rafael Espindola [Sun, 11 Jul 2010 04:01:49 +0000 (04:01 +0000)]
Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.
The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:
* The 's' in target data: If this is set to the minimal alignment of any
argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
example.
* The getTransientStackAlignment method. It is possible for an architecture to
have argument less aligned than what we maintain the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 03:53:50 +0000 (03:53 +0000)]
Replace copyRegToReg with COPY in FastISelEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108071
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 03:31:05 +0000 (03:31 +0000)]
Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
This assumes that the registers can be copied which is probably a safe
assumption.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 03:31:00 +0000 (03:31 +0000)]
Use COPY in FastISel everywhere it is safe and trivial.
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 01:08:31 +0000 (01:08 +0000)]
Replace copyRegToReg with copyPhysReg for Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108066
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Jakob Stoklund Olesen [Sun, 11 Jul 2010 01:08:23 +0000 (01:08 +0000)]
Replace copyRegToReg with copyPhysReg for Alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108065
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Dan Gohman [Sun, 11 Jul 2010 00:08:34 +0000 (00:08 +0000)]
sdiv overflow is outright undefined behavior, with or without the
'exact' keyword. Thanks to nlewycky for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108064
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 22:43:03 +0000 (22:43 +0000)]
Use COPY in targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 22:42:59 +0000 (22:42 +0000)]
Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 22:42:53 +0000 (22:42 +0000)]
Only collect subreg extracting copies for later coalescing.
This also avoids fatal copies from physregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108061
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Dan Gohman [Sat, 10 Jul 2010 22:42:31 +0000 (22:42 +0000)]
Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;
if a block is split (by a custom inserter), the insert point may be in a
different block than it was originally. This fixes 32-bit llvm-gcc
bootstrap builds, and I haven't been able to reproduce it otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108060
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Dan Gohman [Sat, 10 Jul 2010 22:42:12 +0000 (22:42 +0000)]
Fix this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108059
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Duncan Sands [Sat, 10 Jul 2010 20:31:42 +0000 (20:31 +0000)]
The accumulator tail recursion transform claims to work for any associative
operation, but the way it's implemented requires the operation to also be
commutative. So add a check for commutativity (and tweak the corresponding
comments). This makes no difference in practice since every associative
LLVM instruction is also commutative! Here's an example to show the need
for commutativity: the accum_recursion.ll testcase calculates the factorial
function. Before the transformation the result of a call is
((((1*1)*2)*3)...)*x
while afterwards it is
(((1*x)*(x-1))...*2)*1
which clearly requires both associativity and commutativity of * to be equal
to the original.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108056
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 19:08:25 +0000 (19:08 +0000)]
Emit COPY instructions instead of using copyRegToReg in InstrEmitter,
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination.
This switches the bulk of register copies to using COPY, but many less used
copyRegToReg calls remain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050
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Bill Wendling [Sat, 10 Jul 2010 18:56:35 +0000 (18:56 +0000)]
Use non-bool values for .count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108048
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 17:42:34 +0000 (17:42 +0000)]
Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.
Based on a patch by Rafael Espíndola.
Attempt to make the FpSET_ST1 hack more robust, but we are still relying on
FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline
asm.
We support:
FpSET_ST0
INLINEASM
FpSET_ST0
FpSET_ST1
INLINEASM
with and without kills on the arguments. We don't support:
FpSET_ST1
FpSET_ST0
INLINEASM
nor
FpSET_ST1
INLINEASM
Just Don't Do It!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108047
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 16:30:25 +0000 (16:30 +0000)]
FileCheckize inline asm FP stack tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108046
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Dan Gohman [Sat, 10 Jul 2010 13:55:45 +0000 (13:55 +0000)]
Insert IMPLICIT_DEF instructions at the current insert position, not
at the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045
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Chandler Carruth [Sat, 10 Jul 2010 12:06:22 +0000 (12:06 +0000)]
Add parentheses yet again to satisfy GCC's warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108043
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Dan Gohman [Sat, 10 Jul 2010 09:01:35 +0000 (09:01 +0000)]
Add an explicit triple to make this test behave consistently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108041
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Dan Gohman [Sat, 10 Jul 2010 09:01:03 +0000 (09:01 +0000)]
Fix this XTARGET so that this does doesn't XPASS on non-darwin hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108040
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Dan Gohman [Sat, 10 Jul 2010 09:00:22 +0000 (09:00 +0000)]
Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039
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Jakob Stoklund Olesen [Sat, 10 Jul 2010 04:04:25 +0000 (04:04 +0000)]
An x86 function returns a floating point value in st(0), and we must make sure
it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent
the required sideeffect, so insert an FpGET_ST0 instruction directly instead.
This will matter when CopyFromReg gets lowered to a generic COPY instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108037
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Devang Patel [Fri, 9 Jul 2010 21:48:31 +0000 (21:48 +0000)]
Update DBG_VALUE to refer appropriate stack slot in case of a spill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108023
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 21:46:19 +0000 (21:46 +0000)]
Declare YMM subregisters in the right way! Thanks Jakob
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 21:42:42 +0000 (21:42 +0000)]
Add AVX 256-bit packed MOVNT variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 21:27:55 +0000 (21:27 +0000)]
Remember the *_TC opcodes for load/store
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108020
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 21:20:35 +0000 (21:20 +0000)]
Add AVX 256-bit unpack and interleave
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:55:49 +0000 (20:55 +0000)]
Fix small bug in isMoveInstr -> COPY translation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108013
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:43:13 +0000 (20:43 +0000)]
Automatically fold COPY instructions into stack load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108012
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:43:09 +0000 (20:43 +0000)]
Fix a few tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108011
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 20:43:05 +0000 (20:43 +0000)]
Remat uncoalescable COPY instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108010
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Jim Grosbach [Fri, 9 Jul 2010 20:27:06 +0000 (20:27 +0000)]
In the presence of variable sized objects, allocate an emergency spill slot.
rdar://
8131327
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008
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Bill Wendling [Fri, 9 Jul 2010 19:44:12 +0000 (19:44 +0000)]
Clarify what mysterious check means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005
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Dan Gohman [Fri, 9 Jul 2010 19:17:36 +0000 (19:17 +0000)]
Add a target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108003
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Dan Gohman [Fri, 9 Jul 2010 18:49:45 +0000 (18:49 +0000)]
Fix MachineLICM to actually visit inner loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001
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Bruno Cardoso Lopes [Fri, 9 Jul 2010 18:27:43 +0000 (18:27 +0000)]
Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996
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Jakob Stoklund Olesen [Fri, 9 Jul 2010 17:29:08 +0000 (17:29 +0000)]
Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.
This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.
The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991
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Gabor Greif [Fri, 9 Jul 2010 16:51:20 +0000 (16:51 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107990
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Gabor Greif [Fri, 9 Jul 2010 16:42:04 +0000 (16:42 +0000)]
remove useless cast and fix typos in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107989
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Gabor Greif [Fri, 9 Jul 2010 16:39:02 +0000 (16:39 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107988
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Bob Wilson [Fri, 9 Jul 2010 16:37:18 +0000 (16:37 +0000)]
--- Reverse-merging r107947 into '.':
U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987
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Gabor Greif [Fri, 9 Jul 2010 16:31:08 +0000 (16:31 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107984
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Gabor Greif [Fri, 9 Jul 2010 16:26:41 +0000 (16:26 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107983
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Gabor Greif [Fri, 9 Jul 2010 16:22:36 +0000 (16:22 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107982
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Gabor Greif [Fri, 9 Jul 2010 16:17:52 +0000 (16:17 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107981
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Gabor Greif [Fri, 9 Jul 2010 16:08:33 +0000 (16:08 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980
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Gabor Greif [Fri, 9 Jul 2010 16:01:21 +0000 (16:01 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107979
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Gabor Greif [Fri, 9 Jul 2010 15:53:42 +0000 (15:53 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107978
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Gabor Greif [Fri, 9 Jul 2010 15:52:36 +0000 (15:52 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107977
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Gabor Greif [Fri, 9 Jul 2010 15:40:10 +0000 (15:40 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107976
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Gabor Greif [Fri, 9 Jul 2010 15:25:42 +0000 (15:25 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107975
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Gabor Greif [Fri, 9 Jul 2010 15:25:09 +0000 (15:25 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107974
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Gabor Greif [Fri, 9 Jul 2010 15:01:36 +0000 (15:01 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107972
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Gabor Greif [Fri, 9 Jul 2010 14:48:08 +0000 (14:48 +0000)]
cache result of operator* (found by inspection)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107971
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Gabor Greif [Fri, 9 Jul 2010 14:46:49 +0000 (14:46 +0000)]
fix clang selfhost issue (shadowing)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107970
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Gabor Greif [Fri, 9 Jul 2010 14:36:49 +0000 (14:36 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107969
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Gabor Greif [Fri, 9 Jul 2010 14:29:14 +0000 (14:29 +0000)]
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107968
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