Use correct template for SHLD and SHRD instructions so that the memory
operand size is correctly specified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11997 91177308-0d34-0410-b5e6-96231b3b80d8

Improve allocation order:

1) For 8-bit registers try to use first the ones that are parts of the
   same register (AL then AH). This way we only alias 2 16/32-bit
   registers after allocating 4 8-bit variables.

2) Move EBX as the last register to allocate. This will cause less
   spills to happen since we will have 8-bit registers available up to
   register excaustion (assuming we use the allocation order). It
   would be nice if we could push all of the 8-bit aliased registers
   towards the end but we much prefer to keep callee saved register to
   the end to avoid saving them on entry and exit of the function.

For example this gives a slight reduction of spills with linear scan
on 164.gzip.

Before:

11221 asm-printer           - Number of machine instrs printed
  975 spiller               - Number of loads added
  675 spiller               - Number of stores added
  398 spiller               - Number of register spills

After:

11182 asm-printer           - Number of machine instrs printed
  952 spiller               - Number of loads added
  652 spiller               - Number of stores added
  386 spiller               - Number of register spills

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11996 91177308-0d34-0410-b5e6-96231b3b80d8

A big X86 instruction rename. The instructions are renamed to make
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8

Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11994 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate the X86-specific BMI functions, using BuildMI instead.
Replace uses of addZImm with addImm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11992 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a miscompilation of 197.parser that occurs when you have single basic
block loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11990 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR255: [tailduplication] Single basic block loops are very rare

Note that this is a band-aid put over a band-aid.  This just undisables
tail duplication in on very specific case that it seems to work in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11989 91177308-0d34-0410-b5e6-96231b3b80d8

Update comment at head of file. Also fix C 'typedef struct' nonsense I
inadvertently left in here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11988 91177308-0d34-0410-b5e6-96231b3b80d8

Adjust to change in TII ctor arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate the distinction between "real" and "unreal" instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11986 91177308-0d34-0410-b5e6-96231b3b80d8

Add more architectures, and ELF64 stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11985 91177308-0d34-0410-b5e6-96231b3b80d8

These two virtual methods are never called.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a TON of flags that noone cares about

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11983 91177308-0d34-0410-b5e6-96231b3b80d8

Noone calls these virtual methods

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11982 91177308-0d34-0410-b5e6-96231b3b80d8

This is the only file in the system that uses this enum. eliminate it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11981 91177308-0d34-0410-b5e6-96231b3b80d8

Scrap a huge layer of cruft out of this interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11980 91177308-0d34-0410-b5e6-96231b3b80d8

Implement initial prolog/epilog code insertion methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11979 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unneeded #include

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11978 91177308-0d34-0410-b5e6-96231b3b80d8

int64_t -> int

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11977 91177308-0d34-0410-b5e6-96231b3b80d8

Continue Alkis's int64_t cleanup.  This makes all of the immediate related
methods take an int or unsigned value instead of int64_t.

Also, add an 'addImm' method to the MachineInstrBuilder class, because the
fact that the hardware sign or zero extends it does not/should not matter
to the code generator.  Once the old sparc backend is removed the difference
can be eliminated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11976 91177308-0d34-0410-b5e6-96231b3b80d8

Add BuildMI variants that take a MBB::iterator

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11975 91177308-0d34-0410-b5e6-96231b3b80d8

Use correct template for ADC instruction with memory operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11974 91177308-0d34-0410-b5e6-96231b3b80d8

Add an instruction selector capable of selecting 'ret void'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11973 91177308-0d34-0410-b5e6-96231b3b80d8

SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
to denote this fact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8

Floating point loads/stores act on memory operands. Rename them to
denote this fact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11971 91177308-0d34-0410-b5e6-96231b3b80d8

Rename instruction templates to be easier to the human eye to
parse. The name is now I (operand size)*. For example:

Im32 -> instruction with 32-bit memory operands.

Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
          operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11970 91177308-0d34-0410-b5e6-96231b3b80d8

Uncomment instructions that take both an immediate and a memory
operand but their sizes differ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8

Fix my sloppiness

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11968 91177308-0d34-0410-b5e6-96231b3b80d8

Each instruction now has both an ImmType and a MemType. This describes
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11966 91177308-0d34-0410-b5e6-96231b3b80d8

Add a testcase for switch instruction induction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11965 91177308-0d34-0410-b5e6-96231b3b80d8

Implement switch->br and br->switch folding by ripping out the switch->switch
and br->br code and generalizing it.  This allows us to compile code like this:

int test(Instruction *I) {
  if (isa<CastInst>(I))
    return foo(7);
  else if (isa<BranchInst>(I))
    return foo(123);
  else if (isa<UnwindInst>(I))
    return foo(1241);
  else if (isa<SetCondInst>(I))
    return foo(1);
  else if (isa<VAArgInst>(I))
    return foo(42);
  return foo(-1);
}

into:

int %_Z4testPN4llvm11InstructionE("struct.llvm::Instruction"* %I) {
entry:
        %tmp.1.i.i.i.i.i.i.i = getelementptr "struct.llvm::Instruction"* %I, long 0, ubyte 4            ; <uint*> [#uses=1]
        %tmp.2.i.i.i.i.i.i.i = load uint* %tmp.1.i.i.i.i.i.i.i          ; <uint> [#uses=2]
        %tmp.2.i.i.i.i.i.i = seteq uint %tmp.2.i.i.i.i.i.i.i, 27                ; <bool> [#uses=0]
        switch uint %tmp.2.i.i.i.i.i.i.i, label %endif.0 [
                 uint 27, label %then.0
                 uint 2, label %then.1
                 uint 5, label %then.2
                 uint 14, label %then.3
                 uint 15, label %then.3
                 uint 16, label %then.3
                 uint 17, label %then.3
                 uint 18, label %then.3
                 uint 19, label %then.3
                 uint 32, label %then.4
        ]
...

As well as handling the cases in 176.gcc and many other programs more effectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11964 91177308-0d34-0410-b5e6-96231b3b80d8

Change this so that LLC actually tries to run the code generator, though it will
immediately abort due to lack of an instruction selector. :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11963 91177308-0d34-0410-b5e6-96231b3b80d8

Add a hook to run with the V8 target, though it doesn't currently work.  Also
mark the PPC backend as experimental

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11962 91177308-0d34-0410-b5e6-96231b3b80d8

Add hook for V8 target

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11961 91177308-0d34-0410-b5e6-96231b3b80d8

SparcV8 now builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11960 91177308-0d34-0410-b5e6-96231b3b80d8

fine grainify namespacification

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11959 91177308-0d34-0410-b5e6-96231b3b80d8

Finegrainify namespacification

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11958 91177308-0d34-0410-b5e6-96231b3b80d8

Tab completion is our friend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up rules

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11956 91177308-0d34-0410-b5e6-96231b3b80d8

Bring this directory into "it actually compiles" land

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11955 91177308-0d34-0410-b5e6-96231b3b80d8

Fix multiple inclusion problem

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11954 91177308-0d34-0410-b5e6-96231b3b80d8

if there is already a prototype for malloc/free, use it, even if it's incorrect.
Do not just inject a new prototype.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11951 91177308-0d34-0410-b5e6-96231b3b80d8

Do not remove an active template argument even if the superclass had one of the
same name

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11950 91177308-0d34-0410-b5e6-96231b3b80d8

fix a bug in the testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11949 91177308-0d34-0410-b5e6-96231b3b80d8

Ignore X = X assignments that was causing Alkis's rewrite of X86.td to crash
tblgen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11948 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase for a tblgen bug that alkis ran into

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11947 91177308-0d34-0410-b5e6-96231b3b80d8

Assert instead of going into an infinite loop!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11946 91177308-0d34-0410-b5e6-96231b3b80d8

ELF constants and data structures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11945 91177308-0d34-0410-b5e6-96231b3b80d8

Do not generate instructions with mismatched memory/immediate sized
operands. The X86 backend doesn't handle them properly right now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11944 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase for intrinsic folding

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11943 91177308-0d34-0410-b5e6-96231b3b80d8

The instruction combining pass removes dead instructions, there is no need
to run the die pass after it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11942 91177308-0d34-0410-b5e6-96231b3b80d8

Rename AddUsesToWorkList -> AddUsersToWorkList, as that is what it does.
Create a new AddUsesToWorkList method
optimize memmove/set/cpy of zero bytes to a noop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11941 91177308-0d34-0410-b5e6-96231b3b80d8

Turn 'free null' into nothing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11940 91177308-0d34-0410-b5e6-96231b3b80d8

Right, it's really Extractor, not Extraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11939 91177308-0d34-0410-b5e6-96231b3b80d8

New Function-level transformation utils.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11938 91177308-0d34-0410-b5e6-96231b3b80d8

Add the prototype for the LoopExtractor Pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11937 91177308-0d34-0410-b5e6-96231b3b80d8

A pass that uses the generic CodeExtractor to rip out *every* loop in every
function, as long as the loop isn't the only one in that function. This should
help debugging passes easier with BugPoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11936 91177308-0d34-0410-b5e6-96231b3b80d8

A generic code extractor: given a list of BasicBlocks, it will rip them out into
a new function, taking care of inputs and outputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11935 91177308-0d34-0410-b5e6-96231b3b80d8

Two testcases for loops: one with outputs, one without.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11934 91177308-0d34-0410-b5e6-96231b3b80d8

Further comment updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11933 91177308-0d34-0410-b5e6-96231b3b80d8

Update comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11932 91177308-0d34-0410-b5e6-96231b3b80d8

My previous commit broke the jit. The shift instructions always take
an 8-bit immediate. So mark the shifts that take immediates as taking
an 8-bit argument. The rest with the implicit use of CL are marked
appropriately.

A bug still exists:

def SHLDmri32  : I2A8 <"shld", 0xA4, MRMDestMem>, TB;           // [mem32] <<= [mem32],R32 imm8

The immediate in the above instruction is 8-bit but the memory
reference is 32-bit. The printer prints this as an 8-bit reference
which confuses the assembler. Same with SHRDmri32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11931 91177308-0d34-0410-b5e6-96231b3b80d8

Turn off the SparcV9MachineCodeDestructionPass for now, because it's buggy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11930 91177308-0d34-0410-b5e6-96231b3b80d8

Correct DestroyMachineFunction's getPassName

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11929 91177308-0d34-0410-b5e6-96231b3b80d8

Only clone global nodes between graphs if both graphs have the global.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11928 91177308-0d34-0410-b5e6-96231b3b80d8

ADD MORE FUNCTIONS!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11927 91177308-0d34-0410-b5e6-96231b3b80d8

Fix argument size for SHL, SHR, SAR, SHLD and SHRD families of
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11923 91177308-0d34-0410-b5e6-96231b3b80d8

Fix encoding of ADD and SUB family of instructions. Also rearrange
them so that they are consistent with AND, XOR, etc...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11922 91177308-0d34-0410-b5e6-96231b3b80d8

Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11921 91177308-0d34-0410-b5e6-96231b3b80d8

setcond instructions don't have aliasing implications.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11919 91177308-0d34-0410-b5e6-96231b3b80d8

Added d and hbd MultiSource applications.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11915 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Regression/Assembler/2004-02-27-SelfUseAssertError.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11913 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a verifier bug that was preventing us from ripping povray+libpng to pieces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11912 91177308-0d34-0410-b5e6-96231b3b80d8

Build zlib and libpng

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11911 91177308-0d34-0410-b5e6-96231b3b80d8

Updates from Reid

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11908 91177308-0d34-0410-b5e6-96231b3b80d8

Add memory operand folding support for the SETcc family of
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11907 91177308-0d34-0410-b5e6-96231b3b80d8

Make MachineOperand's immediate value an int and save 4 bytes out of
each MachineOperand. We don't really need an int64_t immediate :-).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11906 91177308-0d34-0410-b5e6-96231b3b80d8

Add memory operand folding support for SHLD and SHRD instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11905 91177308-0d34-0410-b5e6-96231b3b80d8

Add memory operand folding support for SHL, SHR and SAR, SHLD instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11903 91177308-0d34-0410-b5e6-96231b3b80d8

Rename SHL, SHR, SAR, SHLD and SHLR instructions to make them
consistent with the rest and also pepare for the addition of their
memory operand variants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11902 91177308-0d34-0410-b5e6-96231b3b80d8

Initial checkin of document, contributed by Reid Spencer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11901 91177308-0d34-0410-b5e6-96231b3b80d8

Implement test/Regression/Transforms/InstCombine/canonicalize_branch.ll

This is a really minor thing, but might help out the 'switch statement induction'
code in simplifycfg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11900 91177308-0d34-0410-b5e6-96231b3b80d8

The instcombiner should canonicalize comparisons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11899 91177308-0d34-0410-b5e6-96231b3b80d8

Rename member function to be consistent with the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11898 91177308-0d34-0410-b5e6-96231b3b80d8

Add improvements to the code generator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11896 91177308-0d34-0410-b5e6-96231b3b80d8

Make spiller push stores right after the definition of a register so
that they are as far away from the loads as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11895 91177308-0d34-0410-b5e6-96231b3b80d8

Fix crash caused by passing register 0 to
MRegisterInfo::isPhysicalRegister().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11894 91177308-0d34-0410-b5e6-96231b3b80d8

Clear maps right after basic block is processed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11892 91177308-0d34-0410-b5e6-96231b3b80d8

Doxygenify comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11891 91177308-0d34-0410-b5e6-96231b3b80d8

Doxygenify and tersify comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11890 91177308-0d34-0410-b5e6-96231b3b80d8

Added PR258 and 259.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11889 91177308-0d34-0410-b5e6-96231b3b80d8

Added support for C++ compilation.
Made removing the object files a separate sh command so that it can easily
be commented out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11888 91177308-0d34-0410-b5e6-96231b3b80d8

C++ version of llvm-native-gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11887 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed test case to actually check for the static declaration.
Oops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11886 91177308-0d34-0410-b5e6-96231b3b80d8

Regression tests for PR258 and PR259.
2004-02-26-FPNotPrintableConstants.llx ensures that constants used in an
LLVM program are declared static if they are assigned to global variables.
2004-02-26-LinkOnceFunctions.llx ensures that linkonce functions get the
weak attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11885 91177308-0d34-0410-b5e6-96231b3b80d8

Fixes for PR258 and PR259.
Functions with linkonce linkage are declared with weak linkage.
Global floating point constants used to represent unprintable values
(such as NaN and infinity) are declared static so that they don't interfere
with other CBE generated translation units.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11884 91177308-0d34-0410-b5e6-96231b3b80d8

Be a good little compiler and handle direct calls efficiently, even if there
are beastly ConstantPointerRefs in the way...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11883 91177308-0d34-0410-b5e6-96231b3b80d8

Uncomment assertions that register# != 0 on calls to
MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11882 91177308-0d34-0410-b5e6-96231b3b80d8

Modified the default pathname for Povray.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11881 91177308-0d34-0410-b5e6-96231b3b80d8