lib/Target/CMakeLists.txt: Add missing lib/Target/TargetAsmInfo.cpp, following up to r121434.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121454 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the leak from r121401 of the Operands erased in the list but not deleted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121450 91177308-0d34-0410-b5e6-96231b3b80d8

Use GZIPBIN instead of GZIP. Apparently gzip uses GZIP as an environment
variable for args you want to default pass to gzip.

Patch based on one by asau@inbox.ru.

Fixes PR8758.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121449 91177308-0d34-0410-b5e6-96231b3b80d8

Add some missing predicates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121445 91177308-0d34-0410-b5e6-96231b3b80d8

fix some validation problems

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121444 91177308-0d34-0410-b5e6-96231b3b80d8

restructure this for readability, correct the example to follow the public ivar name convention

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121443 91177308-0d34-0410-b5e6-96231b3b80d8

Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view.  Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX".  Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121439 91177308-0d34-0410-b5e6-96231b3b80d8

Initial support for the cfi directives. This is just enough to get

f:
        .cfi_startproc
        nop
        .cfi_endproc

assembled (on ELF).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121434 91177308-0d34-0410-b5e6-96231b3b80d8

Print breakpoints for call instructions. This is used by optimized debug info test harness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121432 91177308-0d34-0410-b5e6-96231b3b80d8

add a rule for enums, patch by Zhanyong Wan!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121430 91177308-0d34-0410-b5e6-96231b3b80d8

Add initial support to measure local variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121428 91177308-0d34-0410-b5e6-96231b3b80d8

Use const references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121426 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the prototype for the llvm.eh.selector intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121425 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of the
t_addrmode_s# address modes is used for ASM printing, not for encoding.
<rdar://problem/8745375>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121417 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for AVX to materialize +0.0 when doing scalar FP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121415 91177308-0d34-0410-b5e6-96231b3b80d8

Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches.  This is still not perfect,
but it gets many more of them correct than it did previously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121414 91177308-0d34-0410-b5e6-96231b3b80d8

Initial support for nested CALLSEQ_START/CALLSEQ_END constructs in LegalizeDAG.
Necessary for byval support on ARM.  Radar 7662569.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121412 91177308-0d34-0410-b5e6-96231b3b80d8

Remember to filter out reserved rergisters from the allocation order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121411 91177308-0d34-0410-b5e6-96231b3b80d8

Add a forgotten initializer for CheckedFirstInterference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121410 91177308-0d34-0410-b5e6-96231b3b80d8

Give CurStreamType's enum a name. This works around what is apparently
a bug in Apple GCC 4.0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121409 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating
the offset.  Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing
this.  It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic
adjusted accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121408 91177308-0d34-0410-b5e6-96231b3b80d8

Rename CB/CBZ specific fixup accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121404 91177308-0d34-0410-b5e6-96231b3b80d8

Add assert to catch an attempt to emit .byte 256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121402 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for parsing ARM arithmetic instructions that update or don't update
the condition codes.  Where the ones that do have an 's' suffix and the ones
that don't don't have the suffix.  The trick is if MatchInstructionImpl() fails
we try again after adding a CCOut operand with the correct value and removing
the 's' if present.  Four simple test cases added for now, lots more to come.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121401 91177308-0d34-0410-b5e6-96231b3b80d8

Rename the encoder method for t_cbtarget to match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121399 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb needs a few different encoding schemes for branch targets. Rename
t_brtarget to be more specific.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121398 91177308-0d34-0410-b5e6-96231b3b80d8

80-column fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121395 91177308-0d34-0410-b5e6-96231b3b80d8

ARM stm/ldm instructions require more than one register in the register list.
Otherwise, a plain str/ldr should be used instead. Make sure we account for
that in prologue/epilogue code generation.
rdar://8745460

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121391 91177308-0d34-0410-b5e6-96231b3b80d8

Add a license comment to the generated arm_neon.h header.
Remove the previous header.  I don't think we need to expose to end users
that we use TableGen to produce our version of arm_neon.h, and that header
was also using doubleslash comments which could be a problem when using it
in strict C89 compilations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121390 91177308-0d34-0410-b5e6-96231b3b80d8

Added register reassignment prototype to RAGreedy. It's a simple
heuristic to reshuffle register assignments when we can't find an
available reg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121388 91177308-0d34-0410-b5e6-96231b3b80d8

More code not compiled by CMake. :(.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121387 91177308-0d34-0410-b5e6-96231b3b80d8

CMake: Add FileUpdate to the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121386 91177308-0d34-0410-b5e6-96231b3b80d8

Missed FileUpdate because CMake doesn't build it yet :(.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121385 91177308-0d34-0410-b5e6-96231b3b80d8

Support/Windows/PathV2: Fix header comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121383 91177308-0d34-0410-b5e6-96231b3b80d8

Fix whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121382 91177308-0d34-0410-b5e6-96231b3b80d8

Support: Move c_str from SmallVector back to SmallString and add a free standing
templated c_str in Windows.h to replace it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121381 91177308-0d34-0410-b5e6-96231b3b80d8

Support/FileSystem: Change file_status predicate functions that cannot fail to
return their result instead of an error_code. Also add some missing predicate
functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121380 91177308-0d34-0410-b5e6-96231b3b80d8

Support/MemoryBuffer: Replace all uses of std::string *ErrMsg with error_code &ec. And fix clients.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121379 91177308-0d34-0410-b5e6-96231b3b80d8

Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121377 91177308-0d34-0410-b5e6-96231b3b80d8

Fix delay slot filler for non mips1 targets. Patch by Akira Hatanaka

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121376 91177308-0d34-0410-b5e6-96231b3b80d8

Dont' feed ILA two inputs - it takes just one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121372 91177308-0d34-0410-b5e6-96231b3b80d8

tidy up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121371 91177308-0d34-0410-b5e6-96231b3b80d8

80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121370 91177308-0d34-0410-b5e6-96231b3b80d8

enhance memcpyopt to zap memcpy's that have the same src/dst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121362 91177308-0d34-0410-b5e6-96231b3b80d8

fix PR8753, eliminating a case where we'd infinitely make a
substitution because it doesn't actually change the IR.  Patch by
Jakub Staszak!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121361 91177308-0d34-0410-b5e6-96231b3b80d8

Rewrite the darwin tlv support to use a chain and return to copying
the output to the correct register. Fixes a hidden problem uncovered
by the last patch where we'd try to DAG combine our MVT::Other node
oddly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121358 91177308-0d34-0410-b5e6-96231b3b80d8

Take the first step towards making LVI non-recursive: get rid of the LVIQuery abstraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121357 91177308-0d34-0410-b5e6-96231b3b80d8

80-col fixups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121356 91177308-0d34-0410-b5e6-96231b3b80d8

Reworking the stack layout generated by the MBlaze backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121355 91177308-0d34-0410-b5e6-96231b3b80d8

Fix encoding of the immediate operands on post-indexed LDR and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121354 91177308-0d34-0410-b5e6-96231b3b80d8

Really check that the bits that will become zero are actually already zero
before eliminating the operation that zeros them. This fixes rdar://8739316.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121353 91177308-0d34-0410-b5e6-96231b3b80d8

Fix up some comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121351 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Thumb2 fixups for ldr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121350 91177308-0d34-0410-b5e6-96231b3b80d8

Add a textual message to the assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121349 91177308-0d34-0410-b5e6-96231b3b80d8

Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really are
referencing the stack pointer as they say they are.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121347 91177308-0d34-0410-b5e6-96231b3b80d8

When using multiple instructions to reference a frame index, make sure to
update the opcode when necessary as well as the source register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121346 91177308-0d34-0410-b5e6-96231b3b80d8

The add/sub SP instructions are really pseudos. The assembler should ignore
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121345 91177308-0d34-0410-b5e6-96231b3b80d8

IntervalMap iterators are heavyweight, so avoid copying them around and use
references instead.

Similarly, IntervalMap::begin() is almost as expensive as find(), so use find(x)
instead of begin().advanceTo(x);

This makes RegAllocBasic run another 5% faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121344 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unused variables

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121343 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo in Thumb2 branch fixup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121342 91177308-0d34-0410-b5e6-96231b3b80d8

Stop confusing people, it's not really a chain, or a tumor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121340 91177308-0d34-0410-b5e6-96231b3b80d8

Remove extraneous semicolon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121338 91177308-0d34-0410-b5e6-96231b3b80d8

Attempt to make the bit-twiddling readable resulted in the binary value being
overwritten.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121337 91177308-0d34-0410-b5e6-96231b3b80d8

The BLX instruction is encoded differently than the BL, because why not? In
particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.

Attempt to get the encoding at slightly more correct with this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121336 91177308-0d34-0410-b5e6-96231b3b80d8

Remove extraneous copy from DAG conversion for darwin tls. This was
popping up at O0 when it wasn't folded and the fast allocator would
complain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121330 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Thumb2 BCC encoding and fixups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121329 91177308-0d34-0410-b5e6-96231b3b80d8

Add rsp to the uses for the same reason as 32-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121328 91177308-0d34-0410-b5e6-96231b3b80d8

DW_FORM_data1 may not provide sufficient room for vtable index, use _udata instead.
This fixes radar 8730409.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121323 91177308-0d34-0410-b5e6-96231b3b80d8

Allow a slash, '/', as a prefix separator for X86.  rdar://8741045

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121320 91177308-0d34-0410-b5e6-96231b3b80d8

Properly deal with empty intervals when checking for interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121319 91177308-0d34-0410-b5e6-96231b3b80d8

Style nit and whitespace cleanup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121317 91177308-0d34-0410-b5e6-96231b3b80d8

Move this test to tlv* to make it easier to notice versus linux tls
support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121316 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXME
for more thorough cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121315 91177308-0d34-0410-b5e6-96231b3b80d8

Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121314 91177308-0d34-0410-b5e6-96231b3b80d8

Removed dead comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121313 91177308-0d34-0410-b5e6-96231b3b80d8

ARM/MC/ELF TPsoft is now a proper pseudo inst.
Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM
as well as ELF/OBJ (including fixup)

Also added support for ELF::R_ARM_TLS_IE32

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121312 91177308-0d34-0410-b5e6-96231b3b80d8

T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121311 91177308-0d34-0410-b5e6-96231b3b80d8

Add operand encoding for Thumb2 subw SP + imm. rdar://8745434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121310 91177308-0d34-0410-b5e6-96231b3b80d8

Add operand encoding for Thumb2 addw Rn + imm. rdar://8745434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121309 91177308-0d34-0410-b5e6-96231b3b80d8

Support the "target" encodings for the CB[N]Z instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121308 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an obvious cut-n-paste error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121307 91177308-0d34-0410-b5e6-96231b3b80d8

Implement very primitive hinting support in RegAllocGreedy.

The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121306 91177308-0d34-0410-b5e6-96231b3b80d8

Add operand encoding for Thumb2 addw SP + imm. rdar://8745434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121305 91177308-0d34-0410-b5e6-96231b3b80d8

Parameterize opcode encoding bits for Thumb2 extended precision integer
multiply instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121301 91177308-0d34-0410-b5e6-96231b3b80d8

Add operators for "_lane" variants of some saturating Neon multiply intrinsics
so they can be implemented without separate clang builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121299 91177308-0d34-0410-b5e6-96231b3b80d8

Fix operand encoding for Thumb2 extended precision multiplies. rdar://8745555

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121297 91177308-0d34-0410-b5e6-96231b3b80d8

Store (priority,regnum) pairs in the priority queue instead of providing an
abstract priority queue interface in subclasses that want to override the
priority calculations.

Subclasses must provide a getPriority() implementation instead.

This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.

It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.

Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.

When someone invents a stable spill weight representation, it can be reused for
allocation priorities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121294 91177308-0d34-0410-b5e6-96231b3b80d8

Reword comment slightly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121293 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed some dependencies in RegAllocPBQP.h . Thanks to Borja Ferrer for pointing out this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121292 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify T2 operand assignment notation a bit. No need to specify a bit range
for the source field when it's the whole thing that's being referenced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121291 91177308-0d34-0410-b5e6-96231b3b80d8

Use type's file info while describing inheritance relationship.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121289 91177308-0d34-0410-b5e6-96231b3b80d8

Add operators for vabdl and vabal so they can be implemented without builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121287 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unused function parameter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121286 91177308-0d34-0410-b5e6-96231b3b80d8

Fix comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121285 91177308-0d34-0410-b5e6-96231b3b80d8

Trim includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121283 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to create debug info for functions and methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121281 91177308-0d34-0410-b5e6-96231b3b80d8

Tweak ARM fixup value adjustments for Thumb to better handle the half-word
ordering of thumb mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121280 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to create class type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121279 91177308-0d34-0410-b5e6-96231b3b80d8

Add an operator for vaba so it can be implemented using vabd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121276 91177308-0d34-0410-b5e6-96231b3b80d8

Generalize PostRAHazardRecognizer so it can be used in any pass for
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121274 91177308-0d34-0410-b5e6-96231b3b80d8