Bill Wendling [Mon, 10 Oct 2011 07:24:23 +0000 (07:24 +0000)]
When getting the number of bits necessary for addressing mode
ARMII::AddrModeT1_s, we need to take into account that if the frame register is
ARM::SP, then the number of bits is 8. If it's not ARM::SP, then the number of
bits is 5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141529
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Craig Topper [Mon, 10 Oct 2011 05:34:02 +0000 (05:34 +0000)]
Put a bunch of calls to ToggleFeature behind proper if statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141527
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Chad Rosier [Mon, 10 Oct 2011 01:03:35 +0000 (01:03 +0000)]
Fix a regression from r138445. If we're loading from the frame/base pointer
the tADDrSPi instruction can't be used. Make sure we're updating the opcode
to tADDi3 in all cases.
rdar://
10254707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141523
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Justin Holewinski [Sun, 9 Oct 2011 15:42:02 +0000 (15:42 +0000)]
PTX: Print .ptr kernel attributes if PTX version >= 2.2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141508
91177308-0d34-0410-b5e6-
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Craig Topper [Sun, 9 Oct 2011 07:31:39 +0000 (07:31 +0000)]
Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141505
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Sat, 8 Oct 2011 20:20:03 +0000 (20:20 +0000)]
Prevent potential NOREX bug.
A GR8_NOREX virtual register is created when extrating a sub_8bit_hi
sub-register:
%vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1
TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2
If such a live range is ever split, its register class must not be
inflated to GR8. The sub-register copy can only target GR8_NOREX.
I dont have a test case for this theoretical bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141500
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Jakob Stoklund Olesen [Sat, 8 Oct 2011 18:28:28 +0000 (18:28 +0000)]
Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.
In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX
instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot
target all GR8 registers, only those in GR8_NOREX.
TO enforce this, we ensure that all instructions using the
EXTRACT_SUBREG are GR8_NOREX constrained.
This fixes PR11088.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141499
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Jakob Stoklund Olesen [Sat, 8 Oct 2011 18:06:54 +0000 (18:06 +0000)]
Add missing test case for r141410.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141498
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Sat, 8 Oct 2011 15:49:19 +0000 (15:49 +0000)]
Include direct.h for _mkdir on mingw32 too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141495
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Che-Liang Chiou [Sat, 8 Oct 2011 12:39:26 +0000 (12:39 +0000)]
Revert r141079: tblgen: add preprocessor as a separate mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141492
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Nicolas Geoffray [Sat, 8 Oct 2011 11:56:36 +0000 (11:56 +0000)]
Always check if a method or a type exist before trying to create it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141490
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NAKAMURA Takumi [Sat, 8 Oct 2011 11:22:53 +0000 (11:22 +0000)]
lib/Object: Suppress warnings on gcc-4.3.4 cygwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141485
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NAKAMURA Takumi [Sat, 8 Oct 2011 11:22:47 +0000 (11:22 +0000)]
lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141484
91177308-0d34-0410-b5e6-
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NAKAMURA Takumi [Sat, 8 Oct 2011 11:22:41 +0000 (11:22 +0000)]
Whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141483
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Anton Korobeynikov [Sat, 8 Oct 2011 08:38:45 +0000 (08:38 +0000)]
Disable ABS optimization for Thumb1 target, we don't have necessary instructions there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141481
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Sat, 8 Oct 2011 03:50:18 +0000 (03:50 +0000)]
Simplify definition of FP move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141476
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Akira Hatanaka [Sat, 8 Oct 2011 03:38:41 +0000 (03:38 +0000)]
Define classes and multiclasses for FP binary instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141475
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Sat, 8 Oct 2011 03:29:22 +0000 (03:29 +0000)]
Define multiclasses for FP-to-FP instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141474
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Akira Hatanaka [Sat, 8 Oct 2011 03:19:38 +0000 (03:19 +0000)]
Define classes for FP unary instructions and multiclasses for FP-to-fixed point
conversion instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141473
91177308-0d34-0410-b5e6-
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Andrew Trick [Sat, 8 Oct 2011 02:34:51 +0000 (02:34 +0000)]
Unit test for LSR phi reuse in r141442.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141472
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Akira Hatanaka [Sat, 8 Oct 2011 02:24:10 +0000 (02:24 +0000)]
Add patterns for unaligned load and store instructions and enable the
instruction selector to generate them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141471
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Andrew Trick [Sat, 8 Oct 2011 02:16:39 +0000 (02:16 +0000)]
Add an extra safety check in front of the optimization in r141442.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141470
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Bill Wendling [Sat, 8 Oct 2011 00:56:47 +0000 (00:56 +0000)]
Use the code that lowers the arguments and spills any values which are alive
across unwind edges. This is for the back-end which expects such things.
The code is from the original SjLj EH pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141463
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Peter Collingbourne [Sat, 8 Oct 2011 00:27:38 +0000 (00:27 +0000)]
Add clang-tblgen to OPTIONAL_DIRS when building native tools for the
cross build, so that a native version of clang-tblgen is available.
Should unbreak Clang cross build.
Also disable Polly for the native tool build, since it depends on
external libraries which may not be available, and it isn't required
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141454
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Michael J. Spencer [Sat, 8 Oct 2011 00:18:30 +0000 (00:18 +0000)]
llvm-objdump: Add relocation and archive support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141451
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Michael J. Spencer [Sat, 8 Oct 2011 00:18:12 +0000 (00:18 +0000)]
PathV2: Add simplified version of exists that returns false on error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141450
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Michael J. Spencer [Sat, 8 Oct 2011 00:17:58 +0000 (00:17 +0000)]
Object: Add support for opening stdin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141449
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Michael J. Spencer [Sat, 8 Oct 2011 00:17:45 +0000 (00:17 +0000)]
Object: constize Archive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141448
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Jim Grosbach [Fri, 7 Oct 2011 23:57:03 +0000 (23:57 +0000)]
Enable ARM mode VDUP(scalar) tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141447
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Jim Grosbach [Fri, 7 Oct 2011 23:56:00 +0000 (23:56 +0000)]
ARM NEON assembly parsing and encoding for VDUP(scalar).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141446
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Andrew Trick [Fri, 7 Oct 2011 23:46:21 +0000 (23:46 +0000)]
LSR should only reuse phis that match its formula.
Fixes rdar://problem/
5064068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141442
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Eli Friedman [Fri, 7 Oct 2011 23:40:49 +0000 (23:40 +0000)]
Fix APInt::operator*= so that it computes the correct result for large integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141441
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Nick Lewycky [Fri, 7 Oct 2011 23:29:53 +0000 (23:29 +0000)]
Don't emit the symbol table entry for the .symtab_shndx section either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141440
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Nick Lewycky [Fri, 7 Oct 2011 23:28:32 +0000 (23:28 +0000)]
Remove extraneous curlies. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141439
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Jim Grosbach [Fri, 7 Oct 2011 23:24:09 +0000 (23:24 +0000)]
ARM prefix asmparser operand kind enums for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141438
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Bill Wendling [Fri, 7 Oct 2011 23:18:02 +0000 (23:18 +0000)]
Take all of the invoke basic blocks and make the dispatch basic block their new
successor. Remove the old landing pad from their successor list, because it's
now the successor of the dispatch block. Now that the landing pad blocks are no
longer the destination of invokes, we can mark them as normal basic blocks
instead of landing pads.
This more closely resembles what the CFG is actually doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141436
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Bill Wendling [Fri, 7 Oct 2011 23:06:01 +0000 (23:06 +0000)]
Add a bool value to set the IsLandingPad flag to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141435
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Bill Wendling [Fri, 7 Oct 2011 22:08:37 +0000 (22:08 +0000)]
Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emit
it with the new SjLj emitter stuff. This way there's no need to emit that
kind-of-hacky intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141419
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Bill Wendling [Fri, 7 Oct 2011 21:25:38 +0000 (21:25 +0000)]
Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented to
do. This will be useful later on with the new SJLJ stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141416
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Nick Lewycky [Fri, 7 Oct 2011 20:58:24 +0000 (20:58 +0000)]
Don't emit a shstrtabindex in the reserved range. Spotted by inspection and
patch by Cary Coutant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141413
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Nick Lewycky [Fri, 7 Oct 2011 20:56:23 +0000 (20:56 +0000)]
Clarify/fix typo. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141412
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Jakob Stoklund Olesen [Fri, 7 Oct 2011 20:15:54 +0000 (20:15 +0000)]
Constrain both operands on MOVZX32_NOREXrr8.
This instruction is explicitly encoded without an REX prefix, so both
operands but be *_NOREX.
Also add an assertion to copyPhysReg() that fires when the MOV8rr_NOREX
constraints are not satisfied.
This fixes a miscompilation in
20040709-2 in the gcc test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141410
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Michael J. Spencer [Fri, 7 Oct 2011 19:52:41 +0000 (19:52 +0000)]
Fix a few changes I missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141392
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Michael J. Spencer [Fri, 7 Oct 2011 19:46:12 +0000 (19:46 +0000)]
Fix GCC again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141389
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Michael J. Spencer [Fri, 7 Oct 2011 19:25:47 +0000 (19:25 +0000)]
Fix spelling in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141386
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Michael J. Spencer [Fri, 7 Oct 2011 19:25:32 +0000 (19:25 +0000)]
Change relocation API to be per section. This time without breaking GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141385
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Jim Grosbach [Fri, 7 Oct 2011 18:27:04 +0000 (18:27 +0000)]
Improve ARM assembly parser diagnostic for unexpected tokens.
Consider:
mov r8, r11 fred
Previously, we issued the not very informative:
x.s:6:1: error: unexpected token in argument list
^
Now we generate:
x.s:5:14: error: unexpected token in argument list
mov r8, r11 fred
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141380
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Bill Wendling [Fri, 7 Oct 2011 18:25:37 +0000 (18:25 +0000)]
Revert 141376 and 141377 due to breaking the build.
--- Reverse-merging r141377 into '.':
U tools/llvm-objdump/MachODump.cpp
--- Reverse-merging r141376 into '.':
U include/llvm/Object/COFF.h
U include/llvm/Object/ObjectFile.h
U include/llvm-c/Object.h
U tools/llvm-objdump/llvm-objdump.cpp
U lib/Object/MachOObjectFile.cpp
U lib/Object/COFFObjectFile.cpp
U lib/Object/Object.cpp
U lib/Object/ELFObjectFile.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141379
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David Greene [Fri, 7 Oct 2011 18:25:05 +0000 (18:25 +0000)]
Remove Multidefs
Multidefs are a bit unwieldy and incomplete. Remove them in favor of
another mechanism, probably for loops.
Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141378
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Michael J. Spencer [Fri, 7 Oct 2011 18:15:40 +0000 (18:15 +0000)]
Fix spelling in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141377
91177308-0d34-0410-b5e6-
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Michael J. Spencer [Fri, 7 Oct 2011 18:15:25 +0000 (18:15 +0000)]
Change relocation API to be per section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141376
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Evan Cheng [Fri, 7 Oct 2011 17:26:38 +0000 (17:26 +0000)]
Jakob is the code owner of register allocation and TableGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141372
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Evan Cheng [Fri, 7 Oct 2011 17:21:44 +0000 (17:21 +0000)]
High bits of movmskp{s|d} and pmovmskb are known zero. rdar://
10247336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141371
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Bob Wilson [Fri, 7 Oct 2011 17:17:49 +0000 (17:17 +0000)]
Reenable tail calls for iOS 5.0 and later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141370
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Bob Wilson [Fri, 7 Oct 2011 16:59:21 +0000 (16:59 +0000)]
Reenable use of divmod compiler_rt functions for iOS 5.0 and later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141368
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Matt Beaumont-Gay [Fri, 7 Oct 2011 16:27:01 +0000 (16:27 +0000)]
Move default to top of switch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141366
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Anton Korobeynikov [Fri, 7 Oct 2011 16:15:08 +0000 (16:15 +0000)]
Peephole optimization for ABS on ARM.
Patch by Ana Pazos!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141365
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Duncan Sands [Fri, 7 Oct 2011 08:29:06 +0000 (08:29 +0000)]
Teach GVN to also propagate switch cases. For example, in this code
switch (n) {
case 27:
do_something(x);
...
}
the call do_something(x) will be replaced with do_something(27). In
gcc-as-one-big-file this results in the removal of about 500 lines of
bitcode (about 0.02%), so has about 1/10 of the effect of propagating
branch conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141360
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Craig Topper [Fri, 7 Oct 2011 07:02:24 +0000 (07:02 +0000)]
Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141358
91177308-0d34-0410-b5e6-
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Andrew Trick [Fri, 7 Oct 2011 06:33:09 +0000 (06:33 +0000)]
PostRA scheduler fix. Clear stale loop dependencies.
Fixes <rdar://problem/
10235725>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141357
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Andrew Trick [Fri, 7 Oct 2011 06:27:02 +0000 (06:27 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141356
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Craig Topper [Fri, 7 Oct 2011 05:53:50 +0000 (05:53 +0000)]
Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141354
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Craig Topper [Fri, 7 Oct 2011 05:35:38 +0000 (05:35 +0000)]
Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141353
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Bill Wendling [Thu, 6 Oct 2011 23:41:14 +0000 (23:41 +0000)]
Use the correct vreg here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141342
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Bill Wendling [Thu, 6 Oct 2011 23:37:36 +0000 (23:37 +0000)]
Generate the dispatch code for a 'thumb' function. This is very similar to the
others. They take the call site value. Determine if it's a proper value. And
then jumps to the correct call site via a jump table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141341
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Owen Anderson [Thu, 6 Oct 2011 23:33:11 +0000 (23:33 +0000)]
Fix the check for nested IT instructions in the disassembler. We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141339
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Eli Friedman [Thu, 6 Oct 2011 23:20:49 +0000 (23:20 +0000)]
Remove the old atomic instrinsics. autoupgrade functionality is included with this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141333
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Bill Wendling [Thu, 6 Oct 2011 22:53:00 +0000 (22:53 +0000)]
Generate the dispatch table for ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141327
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Bill Wendling [Thu, 6 Oct 2011 22:18:16 +0000 (22:18 +0000)]
Refactor some of the code that sets up the entry block for SjLj EH. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141323
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Jim Grosbach [Thu, 6 Oct 2011 22:04:05 +0000 (22:04 +0000)]
Tidy up tests. Un-XFAIL file and mark individual tests as FIXME instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141321
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Bill Wendling [Thu, 6 Oct 2011 21:51:21 +0000 (21:51 +0000)]
Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!)
Place the immediate to OR into a register so that it works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141319
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Jim Grosbach [Thu, 6 Oct 2011 21:32:50 +0000 (21:32 +0000)]
Fix and clean up tests. Un-XFAIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141318
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Bill Wendling [Thu, 6 Oct 2011 21:29:56 +0000 (21:29 +0000)]
* Set the low bit of the return address when we are in thumb mode.
* Some code cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141317
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Jim Grosbach [Thu, 6 Oct 2011 21:28:30 +0000 (21:28 +0000)]
Fix and clean up tests. Un-XFAIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141316
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David Greene [Thu, 6 Oct 2011 21:20:46 +0000 (21:20 +0000)]
Fix List-of-List Processing
Fix VarListElementInit::resolveListElementReference to return a
partially resolved VarListElementInint in the case where full
resolution is not possible. This allows TableGen to make forward
progress resolving certain complex list expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141315
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David Greene [Thu, 6 Oct 2011 21:20:44 +0000 (21:20 +0000)]
Make Test More Thorough
Check that all ADD patters are processed.
Add a SUB test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141314
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Matt Beaumont-Gay [Thu, 6 Oct 2011 20:59:09 +0000 (20:59 +0000)]
Fix -asserts build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141313
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Justin Holewinski [Thu, 6 Oct 2011 20:00:33 +0000 (20:00 +0000)]
PTX: Implement signed division
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141306
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Benjamin Kramer [Thu, 6 Oct 2011 18:53:43 +0000 (18:53 +0000)]
Use StringSwitch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141305
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Benjamin Kramer [Thu, 6 Oct 2011 18:23:56 +0000 (18:23 +0000)]
Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141299
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David Greene [Thu, 6 Oct 2011 14:37:47 +0000 (14:37 +0000)]
Fix Typo
Compare the entire keyword string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141295
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Peter Collingbourne [Thu, 6 Oct 2011 13:39:59 +0000 (13:39 +0000)]
s/tblgen/llvm-tblgen/g in a few missed places, including the tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141294
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Peter Collingbourne [Thu, 6 Oct 2011 13:21:42 +0000 (13:21 +0000)]
Remove the Clang tblgen backends from LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141293
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Torok Edwin [Thu, 6 Oct 2011 12:39:34 +0000 (12:39 +0000)]
Don't require C bindings opcode numbers to be kept in sync.
They are not in sync now, for example Bitcast would show up as LLVMCall.
So instead introduce 2 functions that map to and from the opcodes in the C
bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141290
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Torok Edwin [Thu, 6 Oct 2011 12:13:32 +0000 (12:13 +0000)]
Add uwtable, returnstwice and nonlazybind to the C bindings also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141289
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Torok Edwin [Thu, 6 Oct 2011 12:13:28 +0000 (12:13 +0000)]
ocaml/C bindings: type->isSized()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141288
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Torok Edwin [Thu, 6 Oct 2011 12:13:20 +0000 (12:13 +0000)]
add binding to read icmp predicate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141287
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Torok Edwin [Thu, 6 Oct 2011 12:13:11 +0000 (12:13 +0000)]
ocaml/C bindings: getmdstring, add num_op, get_op should work on metadata too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141286
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Torok Edwin [Thu, 6 Oct 2011 12:12:50 +0000 (12:12 +0000)]
C/OCaml API to retrieve struct name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141285
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Torok Edwin [Thu, 6 Oct 2011 12:12:27 +0000 (12:12 +0000)]
ocaml bindings: add llvm_ipo based on IPO.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141284
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Torok Edwin [Thu, 6 Oct 2011 12:12:12 +0000 (12:12 +0000)]
add more tests for the OCaml bindings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141283
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Craig Topper [Thu, 6 Oct 2011 06:44:41 +0000 (06:44 +0000)]
Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141274
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Evan Cheng [Thu, 6 Oct 2011 02:47:18 +0000 (02:47 +0000)]
Cosmetic change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141269
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Peter Collingbourne [Thu, 6 Oct 2011 01:51:51 +0000 (01:51 +0000)]
Build system infrastructure for multiple tblgens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141266
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Bill Wendling [Thu, 6 Oct 2011 00:53:33 +0000 (00:53 +0000)]
Add the MBBs before inserting the instructions. Doing it afterwards could lead
to an infinite loop because of the def-use chains.
Also use a frame load instead of store for the LD instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141263
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Jakob Stoklund Olesen [Thu, 6 Oct 2011 00:08:27 +0000 (00:08 +0000)]
Remove the TRI::getSubRegisterRegClass() hook.
This restores my karma after I added TRI::getSubClassWithSubReg().
Register constraints are applied 'backwards'. Starting from the
register class required by an instruction operand, the correct question
is: 'How can I constrain the super-register register class so all its
sub-registers satisfy the instruction constraint?' The
getMatchingSuperRegClass() hook answers that.
We never need to go 'forwards': Starting from a super-register register
class, what register class are the sub-registers in? The
getSubRegisterRegClass() hook did that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141258
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Cameron Zwarich [Wed, 5 Oct 2011 23:39:02 +0000 (23:39 +0000)]
Always merge profitable shifts on A9, not just when they have a single use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141248
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Cameron Zwarich [Wed, 5 Oct 2011 23:38:50 +0000 (23:38 +0000)]
Remove a check from ARM shifted operand isel helper methods, which were blocking
merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141247
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Bill Wendling [Wed, 5 Oct 2011 23:28:57 +0000 (23:28 +0000)]
Get the proper call site numbers for the landing pads. Also remove a magic
number (18) for the proper addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141245
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Bill Wendling [Wed, 5 Oct 2011 23:26:10 +0000 (23:26 +0000)]
Add accessor method to check if the landing pad symbol has call site information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141244
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