Fix a couple typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27216 91177308-0d34-0410-b5e6-96231b3b80d8

Add a few more altivec intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215 91177308-0d34-0410-b5e6-96231b3b80d8

Keep Visual Studio informed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27214 91177308-0d34-0410-b5e6-96231b3b80d8

These don't directly map to gcc intrinsics any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27213 91177308-0d34-0410-b5e6-96231b3b80d8

Added a couple of entries about movhps and movlhps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27212 91177308-0d34-0410-b5e6-96231b3b80d8

All unpack cases are now being handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27211 91177308-0d34-0410-b5e6-96231b3b80d8

- Clean up / consoladate various shuffle masks.
- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27210 91177308-0d34-0410-b5e6-96231b3b80d8

implement a bunch more intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27209 91177308-0d34-0410-b5e6-96231b3b80d8

Add some more intrinsics: rotates, fp rounds, and random other fp instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27208 91177308-0d34-0410-b5e6-96231b3b80d8

getVectorTyppe(MVT::i64, 2) ==> MVT::v2i64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27207 91177308-0d34-0410-b5e6-96231b3b80d8

Add lvxl

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27206 91177308-0d34-0410-b5e6-96231b3b80d8

Use normal lvx for scalar_to_vector instead of lve*x.  They do the exact
same thing and we have a dag node for the former.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27205 91177308-0d34-0410-b5e6-96231b3b80d8

Regression test for the handling of nulls as arguments to debug intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27204 91177308-0d34-0410-b5e6-96231b3b80d8

More bulletproofing of DebugInfoDesc verify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27203 91177308-0d34-0410-b5e6-96231b3b80d8

Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

Also, don't emit dynamic checks when we can compute them statically

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27202 91177308-0d34-0410-b5e6-96231b3b80d8

Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8

Model unpack lower and interleave as vector_shuffle so we can lower the
intrinsics as such.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27200 91177308-0d34-0410-b5e6-96231b3b80d8

Tblgen doesn't like multiple SDNode<> definitions that map to the same
enum value.  Split them into separate enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27199 91177308-0d34-0410-b5e6-96231b3b80d8

Reenable pointer intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27198 91177308-0d34-0410-b5e6-96231b3b80d8

Only compute intrinsic valuetypes when in a target .td file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27197 91177308-0d34-0410-b5e6-96231b3b80d8

revert this, it breaks things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27196 91177308-0d34-0410-b5e6-96231b3b80d8

revert this, it breaks things

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27195 91177308-0d34-0410-b5e6-96231b3b80d8

If adding a link to a collapsed, node, ignore offset.
Fixes 2006-03-27-LinkedCollapsed.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27194 91177308-0d34-0410-b5e6-96231b3b80d8

Adding links to a node collapsed during type merging crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27193 91177308-0d34-0410-b5e6-96231b3b80d8

Reactivate llvm.dbg.declare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27192 91177308-0d34-0410-b5e6-96231b3b80d8

Should not remove casts from variable's alloca.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27191 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for intrinsics with pointer arguments in target .td files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27190 91177308-0d34-0410-b5e6-96231b3b80d8

Add some missing template specializations for autodereferencing User.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27189 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for decoding iPTR to the right pointer type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27188 91177308-0d34-0410-b5e6-96231b3b80d8

add a new iPTR ValueType for tblgen use

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27187 91177308-0d34-0410-b5e6-96231b3b80d8

Divirge from the GCC specification of the load/store intrinsics: only take
one pointer operand, instead of a pointer and an offset.  The FE will lower
to this canonicalized form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27186 91177308-0d34-0410-b5e6-96231b3b80d8

Print error messages like this:
tblgen: In STVEBX: Intrinsic 'llvm.ppc.altivec.stvebx' expects 3 operands, not 2 operands!

instead of like this:
tblgen: In STVEBX: Intrinsic 'intrinsic_void expects 3 operands, not 2 operands!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27185 91177308-0d34-0410-b5e6-96231b3b80d8

fix spelling :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27184 91177308-0d34-0410-b5e6-96231b3b80d8

add some more intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27183 91177308-0d34-0410-b5e6-96231b3b80d8

Disable dbg_declare, it currently breaks the CFE build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27182 91177308-0d34-0410-b5e6-96231b3b80d8

Fix legalization of intrinsics with chain and result values

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27181 91177308-0d34-0410-b5e6-96231b3b80d8

Translate llvm target registers to dwarf register numbers properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8

Misunderstanding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27179 91177308-0d34-0410-b5e6-96231b3b80d8

Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27178 91177308-0d34-0410-b5e6-96231b3b80d8

Clarity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27177 91177308-0d34-0410-b5e6-96231b3b80d8

Adding other platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27176 91177308-0d34-0410-b5e6-96231b3b80d8

Add note for Mac OS X developers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27175 91177308-0d34-0410-b5e6-96231b3b80d8

unbreak the build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27174 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak the build on non-apple compilers :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27173 91177308-0d34-0410-b5e6-96231b3b80d8

Intrinsics naming convention change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27172 91177308-0d34-0410-b5e6-96231b3b80d8

Try again

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27171 91177308-0d34-0410-b5e6-96231b3b80d8

Add a bunch of notes from my journey thus far.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27170 91177308-0d34-0410-b5e6-96231b3b80d8

Incorrect check for FP all one's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27169 91177308-0d34-0410-b5e6-96231b3b80d8

Split out altivec notes into their own README

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27168 91177308-0d34-0410-b5e6-96231b3b80d8

Use pcmpeq to generate vector of all ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8

Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27166 91177308-0d34-0410-b5e6-96231b3b80d8

Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for
floating point cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27165 91177308-0d34-0410-b5e6-96231b3b80d8

Instead of printing "INTRINSIC" on intrinsic node, print the intrinsic name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27164 91177308-0d34-0410-b5e6-96231b3b80d8

teach the inliner to work with packed constants

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27161 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the JIT encoding of VSEL

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27160 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the JIT encoding of VSPLTI*

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27159 91177308-0d34-0410-b5e6-96231b3b80d8

Pass llvm/test/Regression/CodeGen/Generic/debug-info.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27158 91177308-0d34-0410-b5e6-96231b3b80d8

SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8

Bullet proof against undefined args produced by upgrading ols-style debug info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27155 91177308-0d34-0410-b5e6-96231b3b80d8

How to be dumb on $5/day.  Need a tri-state to track valid debug descriptors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27154 91177308-0d34-0410-b5e6-96231b3b80d8

add vsel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27153 91177308-0d34-0410-b5e6-96231b3b80d8

Readme note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27152 91177308-0d34-0410-b5e6-96231b3b80d8

Codegen vector predicate compares.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27151 91177308-0d34-0410-b5e6-96231b3b80d8

Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27150 91177308-0d34-0410-b5e6-96231b3b80d8

Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27149 91177308-0d34-0410-b5e6-96231b3b80d8

Add immAllZerosV helper

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27148 91177308-0d34-0410-b5e6-96231b3b80d8

Add ISD::isBuildVectorAllZeros predicate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27147 91177308-0d34-0410-b5e6-96231b3b80d8

Allow targets to custom lower their own intrinsics if desired.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27146 91177308-0d34-0410-b5e6-96231b3b80d8

Add predicate comparison intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27145 91177308-0d34-0410-b5e6-96231b3b80d8

Update dependencies to reflect split of the Intrinsics.td file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27144 91177308-0d34-0410-b5e6-96231b3b80d8

Add all of the altivec comparison instructions.  Add patterns for the
non-predicate altivec compare intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27143 91177308-0d34-0410-b5e6-96231b3b80d8

Add and 8/16-bit adds, add all integer subtracts, add saturating subtract
intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27142 91177308-0d34-0410-b5e6-96231b3b80d8

Split the PPC and X86 intrinsics out to their own files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27141 91177308-0d34-0410-b5e6-96231b3b80d8

Add saturating subtracts, non-predicate compares, and some other random
intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27140 91177308-0d34-0410-b5e6-96231b3b80d8

implement the vsldoi intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27139 91177308-0d34-0410-b5e6-96231b3b80d8

add int_ppc_altivec_vsldoi intrinsic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27138 91177308-0d34-0410-b5e6-96231b3b80d8

Correct the vandc testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27137 91177308-0d34-0410-b5e6-96231b3b80d8

fix the pattern for vandc, it's NOT vnand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27136 91177308-0d34-0410-b5e6-96231b3b80d8

add patterns for VANDC/VNOR, implementing
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27135 91177308-0d34-0410-b5e6-96231b3b80d8

new testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27134 91177308-0d34-0410-b5e6-96231b3b80d8

Add some comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27133 91177308-0d34-0410-b5e6-96231b3b80d8

add a vnot helper node for matching 'not' on vectors

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27132 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug in ISD::isBuildVectorAllOnesInteger that  caused it to always return
false

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27131 91177308-0d34-0410-b5e6-96231b3b80d8

Implement the ISD::isBuildVectorAllOnesInteger predicate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27130 91177308-0d34-0410-b5e6-96231b3b80d8

Add a predicate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27129 91177308-0d34-0410-b5e6-96231b3b80d8

Don't call SimplifyDemandedBits on vectors

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27128 91177308-0d34-0410-b5e6-96231b3b80d8

Add some logical operations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27127 91177308-0d34-0410-b5e6-96231b3b80d8

Add a missing check which cause an invalid .td file to crash tblgen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27126 91177308-0d34-0410-b5e6-96231b3b80d8

Don't crash on packed logical ops

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27125 91177308-0d34-0410-b5e6-96231b3b80d8

Teach BinaryOperator::createNot to work with packed integer types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27124 91177308-0d34-0410-b5e6-96231b3b80d8

Unused function - easier to throw away than fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27123 91177308-0d34-0410-b5e6-96231b3b80d8

Cast instruction not inserted into basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27122 91177308-0d34-0410-b5e6-96231b3b80d8

Add a BUILD_VECTOR with unpack and interleave testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27121 91177308-0d34-0410-b5e6-96231b3b80d8

Added missing (any_extend (load ...)) patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27120 91177308-0d34-0410-b5e6-96231b3b80d8

Build arbitrary vector with more than 2 distinct scalar elements with a
series of unpack and interleave ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27119 91177308-0d34-0410-b5e6-96231b3b80d8

implement a bunch of intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27118 91177308-0d34-0410-b5e6-96231b3b80d8

Move all Altivec stuff out into a new PPCInstrAltivec.td file.

Add a bunch of patterns for different datatypes, e.g. bit_convert, undef and
zero vector support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27117 91177308-0d34-0410-b5e6-96231b3b80d8

Add some basic patterns for other datatypes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27116 91177308-0d34-0410-b5e6-96231b3b80d8

add all supported formats to the vector register file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27115 91177308-0d34-0410-b5e6-96231b3b80d8

remove extraneous lets

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27114 91177308-0d34-0410-b5e6-96231b3b80d8