Chris Lattner [Sun, 21 Aug 2005 19:56:04 +0000 (19:56 +0000)]
Add support for frame index nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22956
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 19:48:59 +0000 (19:48 +0000)]
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22955
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 19:48:53 +0000 (19:48 +0000)]
ADd a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22954
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 19:09:33 +0000 (19:09 +0000)]
Don't print out the MBB label for the entry mbb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22953
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 19:03:28 +0000 (19:03 +0000)]
Simplify the logic for BRTWOWAY_CC handling. The isel code already
simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22952
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 18:50:37 +0000 (18:50 +0000)]
Implement selection for branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22951
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 18:49:58 +0000 (18:49 +0000)]
Add 5-operand version of SelectNodeTo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22950
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 18:49:33 +0000 (18:49 +0000)]
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22949
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 18:49:29 +0000 (18:49 +0000)]
Add support for basic blocks, fix a bug in result # computation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22948
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 18:03:09 +0000 (18:03 +0000)]
When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947
91177308-0d34-0410-b5e6-
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Chris Lattner [Sun, 21 Aug 2005 17:41:11 +0000 (17:41 +0000)]
If the false value for a select_cc is really simple (has no inputs), evaluate
it in the block. This codegens:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
as:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
li r4, 1
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r2, r4, r4
.LBB_test_2: ;
or r3, r2, r2
blr
... which is one fewer instruction. The savings are more significant for
global address and constantfp nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22946
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 21 Aug 2005 16:37:36 +0000 (16:37 +0000)]
Fix a bug in the RUN line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22945
91177308-0d34-0410-b5e6-
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Duraid Madina [Sun, 21 Aug 2005 15:43:53 +0000 (15:43 +0000)]
reenable collapse of loadimm+AND -> dep.z (thanks guys)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22944
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sat, 20 Aug 2005 18:07:27 +0000 (18:07 +0000)]
fix bogus warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22943
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Laskey [Sat, 20 Aug 2005 11:05:23 +0000 (11:05 +0000)]
Repair an out by one error for IA64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22942
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 22:38:53 +0000 (22:38 +0000)]
add support for global address, including PIC support.
This REALLY should be lowered by the legalizer!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22941
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 22:38:24 +0000 (22:38 +0000)]
Add support for global address nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22940
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 22:31:34 +0000 (22:31 +0000)]
ADd support for TargetGlobalAddress nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22939
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 22:31:04 +0000 (22:31 +0000)]
Add support for TargetGlobalAddress nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22938
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 21:43:53 +0000 (21:43 +0000)]
Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows
us to compile stuff like this:
double %test(double %A, double %B, double %C, double %E) {
%F = mul double %A, %A
%G = add double %F, %B
%H = sub double -0.0, %G
%I = mul double %H, %C
%J = add double %I, %E
ret double %J
}
to:
_test:
fnmadd f0, f1, f1, f2
fmadd f1, f0, f3, f4
blr
woot!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22937
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 21:34:13 +0000 (21:34 +0000)]
Fix a bug in previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22936
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 21:33:02 +0000 (21:33 +0000)]
Fix a typeo, no wonder all tokenfactor edges were the same!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22935
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 21:21:16 +0000 (21:21 +0000)]
Print physreg register nodes with target names (e.g. F1) instead of numbers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22934
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 20:50:53 +0000 (20:50 +0000)]
Before implementing copyfromreg, we'll implement copytoreg correctly.
This gets us this for the previous testcase:
_test:
lis r2, 0
ori r3, r2, 65535
blr
Note that we actually write to r3 (the return reg) correctly now :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22933
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 20:45:43 +0000 (20:45 +0000)]
Now that we have operand info for machine instructions, use it to create
temporary registers for things that define a register. This allows dag->dag
isel to compile this:
int %test() { ret int 65535 }
into:
_test:
lis r2, 0
ori r2, r2, 65535
blr
Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22932
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 20:29:14 +0000 (20:29 +0000)]
Emit this:
static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, };
instead of this:
static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, };
For operand information, which does not require dynamic (startup-time)
initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22931
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 20:23:42 +0000 (20:23 +0000)]
Expose the derived register classes to the public header, allowing them
to be accessed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22930
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 19:13:20 +0000 (19:13 +0000)]
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 19:12:51 +0000 (19:12 +0000)]
Split register class "Methods" into MethodProtos and MethodBodies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22928
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:53:43 +0000 (18:53 +0000)]
put reg classes into namespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22927
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:52:55 +0000 (18:52 +0000)]
Put reg classes into namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22926
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:51:57 +0000 (18:51 +0000)]
Put register classes into namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:50:46 +0000 (18:50 +0000)]
Put register classes in namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22924
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:50:11 +0000 (18:50 +0000)]
Fix code that assumes the register info will be dumped into a target
namespace instead of the reg class namespace. Update getRegClassForType()
to use modified names due to tblgen change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:49:22 +0000 (18:49 +0000)]
put reg classes in namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22922
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:48:48 +0000 (18:48 +0000)]
Require that targets specify a namespace for their register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:47:59 +0000 (18:47 +0000)]
Refactor to use Target.getRegisterClasses consistently, which provides
anonymous regclass definition renaming.
Change the generated code to emit register classes as properly namespace
qualified entities like everything else.
expose the actual class definition as an object, though this isn't quite
usable yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22920
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:46:26 +0000 (18:46 +0000)]
Emit real operand info for instructions. This currently works but is bad
in one way: the generated tables require dynamic initialization for the
register classes. This will be fixed in a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22919
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:45:20 +0000 (18:45 +0000)]
Read the namespace field from register classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22918
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 18:35:41 +0000 (18:35 +0000)]
The skeleton target has never had an isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22917
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 18:34:37 +0000 (18:34 +0000)]
This code has always been dead on itanium
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22916
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 18:33:26 +0000 (18:33 +0000)]
This code has always been dead for alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22915
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 18:32:03 +0000 (18:32 +0000)]
The simple isel being gone makes this dead!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 18:30:39 +0000 (18:30 +0000)]
Now that the simple isels are dead, so is this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 17:58:49 +0000 (17:58 +0000)]
add a setName method to record
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22912
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 17:58:11 +0000 (17:58 +0000)]
Add a setName method to Record.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22911
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 16:57:28 +0000 (16:57 +0000)]
For now, just emit empty operand info structures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22910
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 16:56:56 +0000 (16:56 +0000)]
Sparcv9 gets no operand info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22909
91177308-0d34-0410-b5e6-
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Chris Lattner [Fri, 19 Aug 2005 16:56:26 +0000 (16:56 +0000)]
Add a new field to TargetInstrDescriptor for tracking information about
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22908
91177308-0d34-0410-b5e6-
96231b3b80d8
Jeff Cohen [Fri, 19 Aug 2005 16:19:21 +0000 (16:19 +0000)]
Fix VC++ constant truncation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22907
91177308-0d34-0410-b5e6-
96231b3b80d8
Jeff Cohen [Fri, 19 Aug 2005 13:51:22 +0000 (13:51 +0000)]
Update Visual Studio projects for removed file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22905
91177308-0d34-0410-b5e6-
96231b3b80d8
Duraid Madina [Fri, 19 Aug 2005 13:25:50 +0000 (13:25 +0000)]
a bugfix (up top) and a quick repair job: disable generation of dep.z
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22904
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 06:16:04 +0000 (06:16 +0000)]
Fix a problem jeffc noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22903
91177308-0d34-0410-b5e6-
96231b3b80d8
Jeff Cohen [Fri, 19 Aug 2005 04:39:48 +0000 (04:39 +0000)]
Fix VC++ precedence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22902
91177308-0d34-0410-b5e6-
96231b3b80d8
Nate Begeman [Fri, 19 Aug 2005 03:42:28 +0000 (03:42 +0000)]
Fix a bug where we were passing the wrong number of arguments to an
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 01:17:18 +0000 (01:17 +0000)]
remove dead args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22900
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 01:16:18 +0000 (01:16 +0000)]
remove dead options
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22899
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 01:14:40 +0000 (01:14 +0000)]
remove dead flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22898
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 01:04:33 +0000 (01:04 +0000)]
The code emitter generator only supports targets with 32-bit instruction
words. There is no way for one of these targets to have a > 32-bit immediate!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22897
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 01:01:34 +0000 (01:01 +0000)]
Fix computation of # operands, add a temporary hack for CopyToReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22896
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 00:59:49 +0000 (00:59 +0000)]
now that all of the targets are clean w.r.t. the number of operands for each
instruction defined, actually emit this to the InstrInfoDescriptor, which
allows an assert in the machineinstrbuilder to do some checking for us,
and is required by the dag->dag emitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22895
91177308-0d34-0410-b5e6-
96231b3b80d8
Nate Begeman [Fri, 19 Aug 2005 00:56:28 +0000 (00:56 +0000)]
Add support for target nodes with more than 3 operands, required by ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22894
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 00:51:37 +0000 (00:51 +0000)]
mark variable arity instructions as such. Alpha wins the battle for
cleanest backend in this metric :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22893
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 00:47:42 +0000 (00:47 +0000)]
Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR.
I'm not convinced this is all of them, but I can't do much testing, because
IA64 LLC crashes on big programs :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22892
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 00:41:29 +0000 (00:41 +0000)]
add a few missing cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 00:38:22 +0000 (00:38 +0000)]
Give ADJCALLSTACKDOWN/UP the correct operands.
Give a whole bunch of other stuff variable operands, particularly FP. The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable. This will have to be fixed before we can dag->dag
the X86 backend. The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890
91177308-0d34-0410-b5e6-
96231b3b80d8
Nate Begeman [Fri, 19 Aug 2005 00:38:14 +0000 (00:38 +0000)]
ISD::OR, and it's accompanying SelectBitfieldInsert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22889
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 00:31:37 +0000 (00:31 +0000)]
The variable SAR's only take one operand too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22888
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 19 Aug 2005 00:16:17 +0000 (00:16 +0000)]
Stop adding bogus operands to variable shifts on X86. These instructions
only take one operand. The other comes implicitly in through CL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22887
91177308-0d34-0410-b5e6-
96231b3b80d8
Nate Begeman [Thu, 18 Aug 2005 23:53:15 +0000 (23:53 +0000)]
Remove the X86 and PowerPC Simple instruction selectors; their time has
passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 18 Aug 2005 23:38:41 +0000 (23:38 +0000)]
Figure out how many operands each instruction has, keep track of whether
or not it's variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22885
91177308-0d34-0410-b5e6-
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Nate Begeman [Thu, 18 Aug 2005 23:38:00 +0000 (23:38 +0000)]
Add shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22884
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Chris Lattner [Thu, 18 Aug 2005 23:25:33 +0000 (23:25 +0000)]
Fix operand numbers by marking variable arity nodes as such and by fixing
the operand lists of a few other nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22883
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Chris Lattner [Thu, 18 Aug 2005 23:24:50 +0000 (23:24 +0000)]
MFLR doesn't take an operand, the LR register is implicit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22882
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Chris Lattner [Thu, 18 Aug 2005 23:17:07 +0000 (23:17 +0000)]
Add a new flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22881
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Chris Lattner [Thu, 18 Aug 2005 22:12:31 +0000 (22:12 +0000)]
revert this change, which causes breakage, temporarily
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22880
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Chris Lattner [Thu, 18 Aug 2005 21:36:47 +0000 (21:36 +0000)]
When emitting implicit use/def lists, only emit each unique list once. Though
LLVM is able to merge identical static const globals, GCC isn't, and this caused
some bloat in the generated data. This has a marginal effect on PPC, shrinking
the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger
reduction.
This should speed up the register allocator as well by reducing the dcache
footprint for this static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22879
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Chris Lattner [Thu, 18 Aug 2005 20:11:49 +0000 (20:11 +0000)]
add a new -view-sched-dags option to view dags as they are sent to the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22878
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Chris Lattner [Thu, 18 Aug 2005 20:08:53 +0000 (20:08 +0000)]
Move this to the emitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22877
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Chris Lattner [Thu, 18 Aug 2005 20:07:59 +0000 (20:07 +0000)]
Implement the first chunk of a code emitter. This is sophisticated enough to
codegen:
_empty:
.LBB_empty_0: ;
blr
but can't do anything more (yet). :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22876
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Jim Laskey [Thu, 18 Aug 2005 20:06:09 +0000 (20:06 +0000)]
Unmangled names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22875
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Chris Lattner [Thu, 18 Aug 2005 19:52:06 +0000 (19:52 +0000)]
Add ScheduleDAG.cpp to the project
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22874
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Chris Lattner [Thu, 18 Aug 2005 19:45:37 +0000 (19:45 +0000)]
Fill in the numOperands field of the TargetInstrDescriptor struct from the
.td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22873
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Jim Laskey [Thu, 18 Aug 2005 19:38:57 +0000 (19:38 +0000)]
1. Fix comment.
2. Get an exact count of 'li ' instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22872
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Jim Laskey [Thu, 18 Aug 2005 19:32:46 +0000 (19:32 +0000)]
Add regression test to make sure that constants are generated optimally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22871
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Jim Laskey [Thu, 18 Aug 2005 18:58:23 +0000 (18:58 +0000)]
More optimal solution for loading constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22870
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Chris Lattner [Thu, 18 Aug 2005 18:46:06 +0000 (18:46 +0000)]
After selecting the instructions for a basic block, emit the instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22869
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Chris Lattner [Thu, 18 Aug 2005 18:45:24 +0000 (18:45 +0000)]
new file, obviously just a stub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22868
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Chris Lattner [Thu, 18 Aug 2005 18:44:33 +0000 (18:44 +0000)]
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22867
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Chris Lattner [Thu, 18 Aug 2005 18:34:00 +0000 (18:34 +0000)]
remove some unused stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22866
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Nate Begeman [Thu, 18 Aug 2005 18:14:49 +0000 (18:14 +0000)]
Fix int foo() { return 65535; } by using the top 16 bits of the constant
as the argument to LIS rather than the result of HA16(constant).
The DAG->DAG ISel was already doing the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22865
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Nate Begeman [Thu, 18 Aug 2005 18:01:39 +0000 (18:01 +0000)]
Improve ISD::Constant codegen.
Now for int foo() { return -1; } we generate:
_foo:
li r3, -1
blr
instead of
_foo:
lis r2, -1
ori r3, r2, 65535
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22864
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Chris Lattner [Thu, 18 Aug 2005 17:35:14 +0000 (17:35 +0000)]
Enable critical edge splitting by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22863
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Chris Lattner [Thu, 18 Aug 2005 17:16:52 +0000 (17:16 +0000)]
replace switch stmt with an assert, generate li 0 instead of lis 0 for 0,
to make the code follow people's expectations better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22861
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Jim Laskey [Thu, 18 Aug 2005 15:52:30 +0000 (15:52 +0000)]
Handle loading of 0x????0000 constants with a single instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22858
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Nate Begeman [Thu, 18 Aug 2005 07:30:46 +0000 (07:30 +0000)]
Add support for ISD::AND, and its various optimized forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22857
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Nate Begeman [Thu, 18 Aug 2005 07:30:15 +0000 (07:30 +0000)]
Add support for target DAG nodes that take 4 operands, such as PowerPC's
rlwinm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22856
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Nate Begeman [Thu, 18 Aug 2005 05:44:50 +0000 (05:44 +0000)]
Maintain consistency in negating things
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22855
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Nate Begeman [Thu, 18 Aug 2005 05:00:13 +0000 (05:00 +0000)]
Implement XOR, remove a broken sign_extend_inreg case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22854
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Chris Lattner [Thu, 18 Aug 2005 03:31:02 +0000 (03:31 +0000)]
Fix printing of VTSDNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22853
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