Sirish Pande [Fri, 11 May 2012 19:39:13 +0000 (19:39 +0000)]
Hexagon V5 intrinsics support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156631
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Fri, 11 May 2012 19:01:01 +0000 (19:01 +0000)]
Defer computation of SuperRegs.
Don't compute the SuperRegs list until the sub-register graph is
completely finished. This guarantees that the list of super-registers is
properly topologically ordered, and has no duplicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156629
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Fri, 11 May 2012 18:51:55 +0000 (18:51 +0000)]
[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
retval. Hoists check before emitting the call to avoid unnecessary work.
rdar://
11430407
PR12796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628
91177308-0d34-0410-b5e6-
96231b3b80d8
Nuno Lopes [Fri, 11 May 2012 18:25:29 +0000 (18:25 +0000)]
objectsize: add a few more tests and fix a bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156625
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Fri, 11 May 2012 17:41:06 +0000 (17:41 +0000)]
[fast-isel] Rather then assert (or segfault in a non-asserts build), fall back
to selection DAG isel if we're unable to handle a non-double multi-reg retval.
rdar://
11430407
PR12796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156622
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Fri, 11 May 2012 16:41:38 +0000 (16:41 +0000)]
The return type is an unsigned, not a bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156621
91177308-0d34-0410-b5e6-
96231b3b80d8
Manman Ren [Fri, 11 May 2012 15:36:46 +0000 (15:36 +0000)]
Add space before an open parenthesis in control flow statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156620
91177308-0d34-0410-b5e6-
96231b3b80d8
Preston Gurd [Fri, 11 May 2012 14:27:12 +0000 (14:27 +0000)]
Added X86 Atom latencies to X86InstrMMX.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156615
91177308-0d34-0410-b5e6-
96231b3b80d8
Stepan Dyatkovskiy [Fri, 11 May 2012 10:34:23 +0000 (10:34 +0000)]
PR1255: ConstantRangesSet and CRSBuilder classes moved from include/llvm to include/llvm/Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156613
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Fri, 11 May 2012 10:19:54 +0000 (10:19 +0000)]
Fix test/CodeGen/X86/tls-pie.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156612
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Fri, 11 May 2012 10:11:01 +0000 (10:11 +0000)]
Implement initial-exec TLS model for 32-bit PIC x86
This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong
code here (see the update to test/CodeGen/X86/tls-pie.ll).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156611
91177308-0d34-0410-b5e6-
96231b3b80d8
Silviu Baranga [Fri, 11 May 2012 09:28:27 +0000 (09:28 +0000)]
Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156609
91177308-0d34-0410-b5e6-
96231b3b80d8
Silviu Baranga [Fri, 11 May 2012 09:10:54 +0000 (09:10 +0000)]
Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156608
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 11 May 2012 03:42:13 +0000 (03:42 +0000)]
Fix a use after free when the streamer is destroyed. Fixes pr12622.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156606
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Fri, 11 May 2012 01:45:15 +0000 (01:45 +0000)]
Fix a misleading comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156603
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 May 2012 01:41:30 +0000 (01:41 +0000)]
Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156602
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 May 2012 01:39:13 +0000 (01:39 +0000)]
Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156601
91177308-0d34-0410-b5e6-
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Eli Friedman [Fri, 11 May 2012 01:32:59 +0000 (01:32 +0000)]
Fix a minor logic mistake transforming compares in instcombine. PR12514.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156600
91177308-0d34-0410-b5e6-
96231b3b80d8
Manman Ren [Fri, 11 May 2012 01:30:47 +0000 (01:30 +0000)]
ARM: peephole optimization to remove cmp instruction
This patch will optimize the following cases:
sub r1, r3 | sub r1, imm
cmp r3, r1 or cmp r1, r3 | cmp r1, imm
bge L1
TO
subs r1, r3
bge L1 or ble L1
If the branch instruction can use flag from "sub", then we can replace
"sub" with "subs" and eliminate the "cmp" instruction.
rdar:
10734411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156599
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Fri, 11 May 2012 00:19:32 +0000 (00:19 +0000)]
Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),
but it generates int3 on x86 instead of ud2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Fri, 11 May 2012 00:07:44 +0000 (00:07 +0000)]
Allow unique_file to take a mode for file permissions, but default
to user only read/write.
Part of rdar://
11325849
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156591
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Thu, 10 May 2012 23:38:07 +0000 (23:38 +0000)]
Fix intendation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156589
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Thu, 10 May 2012 23:27:10 +0000 (23:27 +0000)]
Compute secondary sub-registers.
The sub-registers explicitly listed in SubRegs in the .td files form a
tree. In a complicated register bank, it is possible to have
sub-register relationships across sub-trees. For example, the ARM NEON
double vector Q0_Q1 is a tree:
Q0_Q1 = [Q0, Q1], Q0 = [D0, D1], Q1 = [D2, D3]
But we also define the DPair register D1_D2 = [D1, D2] which is fully
contained in Q0_Q1.
This patch teaches TableGen to find such sub-register relationships, and
assign sub-register indices to them. In the example, TableGen will
create a dsub_1_dsub_2 sub-register index, and add D1_D2 as a
sub-register of Q0_Q1.
This will eventually enable the coalescer to handle copies of skewed
sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156587
91177308-0d34-0410-b5e6-
96231b3b80d8
Nuno Lopes [Thu, 10 May 2012 23:17:35 +0000 (23:17 +0000)]
objectsize: add support for GEPs with non-constant indexes
add an additional parameter to InstCombiner::EmitGEPOffset() to force it to *not* emit operations with NUW flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156585
91177308-0d34-0410-b5e6-
96231b3b80d8
Preston Gurd [Thu, 10 May 2012 21:58:35 +0000 (21:58 +0000)]
Added X86 Atom latencies for instructions in X86InstrInfo.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156579
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Thu, 10 May 2012 21:48:22 +0000 (21:48 +0000)]
Add support for the 'X' inline asm operand modifier.
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156577
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 10 May 2012 21:06:21 +0000 (21:06 +0000)]
misched: Print machineinstrs with -debug-only=misched
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156576
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 10 May 2012 21:06:19 +0000 (21:06 +0000)]
misched: tracing register pressure heuristics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156575
91177308-0d34-0410-b5e6-
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Andrew Trick [Thu, 10 May 2012 21:06:16 +0000 (21:06 +0000)]
misched: Add register pressure backoff to ConvergingScheduler.
Prioritize the instruction that comes closest to keeping pressure
under the target's limit. Then prioritize instructions that avoid
increasing the max pressure in the scheduled region. The max pressure
heuristic is a tad aggressive. Later I'll fix it to consider the
unscheduled pressure as well.
WIP: This is mostly functional but untested and not likely to do much good yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156574
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 10 May 2012 21:06:14 +0000 (21:06 +0000)]
misched: Release only unscheduled nodes into ReadyQ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156573
91177308-0d34-0410-b5e6-
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Andrew Trick [Thu, 10 May 2012 21:06:12 +0000 (21:06 +0000)]
misched: Added ReadyQ container wrapper for Top and Bottom Queues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156572
91177308-0d34-0410-b5e6-
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Andrew Trick [Thu, 10 May 2012 21:06:10 +0000 (21:06 +0000)]
misched: Introducing Top and Bottom register pressure trackers during scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156571
91177308-0d34-0410-b5e6-
96231b3b80d8
Sirish Pande [Thu, 10 May 2012 20:24:28 +0000 (20:24 +0000)]
Hexagon V5 Support - V5 td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156569
91177308-0d34-0410-b5e6-
96231b3b80d8
Sirish Pande [Thu, 10 May 2012 20:20:25 +0000 (20:20 +0000)]
Hexagon V5 FP Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156568
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 10 May 2012 19:11:52 +0000 (19:11 +0000)]
RegPressure: API for speculatively checking instruction pressure.
Added getMaxExcessUpward/DownwardPressure. They somewhat abuse the
tracker by speculatively handling an instruction out of order. But it
is convenient for now. In the future, we will cache each instruction's
pressure contribution to make this efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156561
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 10 May 2012 19:11:49 +0000 (19:11 +0000)]
RegPressure: fix array index iteration style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156560
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Thu, 10 May 2012 18:57:38 +0000 (18:57 +0000)]
Teach DeadStoreElimination to eliminate exit-block stores with phi addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156558
91177308-0d34-0410-b5e6-
96231b3b80d8
Manman Ren [Thu, 10 May 2012 18:49:43 +0000 (18:49 +0000)]
Revert: 156550 "ARM: peephole optimization to remove cmp instruction"
This commit broke an external linux bot and gave a compile-time warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156556
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Thu, 10 May 2012 17:46:18 +0000 (17:46 +0000)]
Precompute lists of explicit sub-registers and indices.
The .td files specify a tree of sub-registers. Store that tree as
ExplicitSubRegs lists in CodeGenRegister instead of extracting it from
the Record when needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156555
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Thu, 10 May 2012 17:21:30 +0000 (17:21 +0000)]
Rewrite ScalarEvolution::hasOperand to use an explicit worklist instead
of recursion, to avoid excessive stack usage on deep expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156554
91177308-0d34-0410-b5e6-
96231b3b80d8
Nuno Lopes [Thu, 10 May 2012 17:14:00 +0000 (17:14 +0000)]
teach DSE and isInstructionTriviallyDead() about calloc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156553
91177308-0d34-0410-b5e6-
96231b3b80d8
Joel Jones [Thu, 10 May 2012 16:55:31 +0000 (16:55 +0000)]
formatting change: strip debug info from test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156551
91177308-0d34-0410-b5e6-
96231b3b80d8
Manman Ren [Thu, 10 May 2012 16:48:21 +0000 (16:48 +0000)]
ARM: peephole optimization to remove cmp instruction
This patch will optimize the following cases:
sub r1, r3 | sub r1, imm
cmp r3, r1 or cmp r1, r3 | cmp r1, imm
bge L1
TO
subs r1, r3
bge L1 or ble L1
If the branch instruction can use flag from "sub", then we can replace
"sub" with "subs" and eliminate the "cmp" instruction.
rdar:
10734411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156550
91177308-0d34-0410-b5e6-
96231b3b80d8
Joel Jones [Thu, 10 May 2012 15:59:41 +0000 (15:59 +0000)]
Fix a problem with incomplete equality testing of PHINodes in
Instruction::IsIdenticalToWhenDefined.
This manifested itself when inlining two calls to the same function. The
inlined function had a switch statement that returned one of a set of
global variables. Without this modification, the two phi instructions that
chose values from the branches of the switch instruction inlined from the
callee were considered equivalent and jump-threading replaced a load for the
first switch value with a phi selecting from the second switch, thereby
producing incorrect code.
This patch has been tested with "make check-all", "lnt runteste nt", and
llvm self-hosted, and on the original program that had this problem,
wireshark.
<rdar://problem/
11025519>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156548
91177308-0d34-0410-b5e6-
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Nadav Rotem [Thu, 10 May 2012 12:50:02 +0000 (12:50 +0000)]
Fix merge-typo and cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156541
91177308-0d34-0410-b5e6-
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Nadav Rotem [Thu, 10 May 2012 12:39:13 +0000 (12:39 +0000)]
AVX2: Add an additional broadcast idiom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156540
91177308-0d34-0410-b5e6-
96231b3b80d8
Nadav Rotem [Thu, 10 May 2012 12:22:05 +0000 (12:22 +0000)]
Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in the program.
Starting r155461 we are able to select patterns for vbroadcast even when the load op is used by other users.
Fix PR11900.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156539
91177308-0d34-0410-b5e6-
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Andrew Trick [Thu, 10 May 2012 00:32:15 +0000 (00:32 +0000)]
Fix TableGen's RegPressureSet weight normalization to handle subreg DAGS.
I initially assumed that the subreg graph was a tree. That may not be true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156524
91177308-0d34-0410-b5e6-
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Jim Grosbach [Thu, 10 May 2012 00:31:50 +0000 (00:31 +0000)]
ExecutionEngine: Check for NULL ErrorStr before using it.
Patch by Yury Mikhaylov <yury.mikhaylov@gmail.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156523
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Wed, 9 May 2012 23:43:30 +0000 (23:43 +0000)]
Fix warning text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156521
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Wed, 9 May 2012 23:08:33 +0000 (23:08 +0000)]
Fix the objc_storeStrong recognizer to stop before walking off the
end of a basic block if there's no store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156520
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Wed, 9 May 2012 22:15:00 +0000 (22:15 +0000)]
Compute a backwards SubReg -> SubRegIndex map for each register.
This mapping is for internal use by TableGen. It will not be exposed in
the generated files.
Unfortunately, the mapping is not completely well-defined. The X86 xmm
registers appear with multiple sub-register indices in the ymm
registers. This is because of the odd idempotent sub_sd and sub_ss
sub-register indices. I hope to be able to eliminate them entirely, so
we can require the sub-registers to form a tree.
For now, just place the canonical sub_xmm index in the mapping, and
ignore the idempotents.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156519
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Wed, 9 May 2012 22:09:17 +0000 (22:09 +0000)]
Rename getSubRegs() to computeSubRegs().
That's what it does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156518
91177308-0d34-0410-b5e6-
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Nuno Lopes [Wed, 9 May 2012 21:30:57 +0000 (21:30 +0000)]
objectsize:
refactor code a bit to enable future changes to support run-time information
add support to compute allocation sizes at run-time if penalty > 1 (e.g., malloc(x), calloc(x, y), and VLAs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156515
91177308-0d34-0410-b5e6-
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Chad Rosier [Wed, 9 May 2012 19:31:41 +0000 (19:31 +0000)]
Add unittests for Triple::getMacOSXVersion and Triple::getiOSVersion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156507
91177308-0d34-0410-b5e6-
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Danil Malyshev [Wed, 9 May 2012 19:07:04 +0000 (19:07 +0000)]
Added a regress test for the bug #9964 before close it.
This bug was fixed by Jim Grosbach in #138879, thanks Jim!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156505
91177308-0d34-0410-b5e6-
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Roman Divacky [Wed, 9 May 2012 18:24:23 +0000 (18:24 +0000)]
Mark .opd @progbits, thus avoiding a warning from asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156494
91177308-0d34-0410-b5e6-
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Chad Rosier [Wed, 9 May 2012 18:23:00 +0000 (18:23 +0000)]
Set the default iOS version to 3.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156492
91177308-0d34-0410-b5e6-
96231b3b80d8
Bob Wilson [Wed, 9 May 2012 17:47:03 +0000 (17:47 +0000)]
Use the cpuid 64 bit flag to pick the default CPU name for an unknown model.
For the Family 6 switch in sys::getHostCPUName, an unrecognized model was
reported as "i686". That's a really bad default since it means that new
CPUs will be treated as if they can only use 32-bit code. This just looks
at the cpuid extended feature flag for 64 bit support, and if that is set,
it uses a default x86-64 cpu. Similar logic is already used for the Family
15 code. <rdar://problem/
11314502>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156486
91177308-0d34-0410-b5e6-
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Chad Rosier [Wed, 9 May 2012 17:38:47 +0000 (17:38 +0000)]
Don't return true on a function with a void return type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156484
91177308-0d34-0410-b5e6-
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Chad Rosier [Wed, 9 May 2012 17:23:48 +0000 (17:23 +0000)]
Add Triple::getiOSVersion.
This new function provides a way to get the iOS version number from ios triples.
Part of rdar://
11409204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156483
91177308-0d34-0410-b5e6-
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Hans Wennborg [Wed, 9 May 2012 16:54:17 +0000 (16:54 +0000)]
Introduce llvm-c function LLVMPrintModuleToFile.
This lets you save the textual representation of the LLVM IR to a file.
Before this patch it could only be printed to STDERR from llvm-c.
Patch by Carlo Kok!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156479
91177308-0d34-0410-b5e6-
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Nuno Lopes [Wed, 9 May 2012 15:52:43 +0000 (15:52 +0000)]
change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept.
This commit only adds the parameter. Code taking advantage of it will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156473
91177308-0d34-0410-b5e6-
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Manuel Klimek [Wed, 9 May 2012 15:10:54 +0000 (15:10 +0000)]
Make it possible to switch off solution folders. VS Express does not support
them, and requires the user to click away one error message per folder on
project load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156472
91177308-0d34-0410-b5e6-
96231b3b80d8
Filipe Cabecinhas [Wed, 9 May 2012 14:43:50 +0000 (14:43 +0000)]
Fixed a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156471
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Bill Wendling [Wed, 9 May 2012 08:55:40 +0000 (08:55 +0000)]
Supply a C interface to the "LinkModules" method.
Patch by Andrew Wilkins!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156469
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Craig Topper [Wed, 9 May 2012 07:08:58 +0000 (07:08 +0000)]
Remove unused variable to get rid of warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156466
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Akira Hatanaka [Wed, 9 May 2012 02:29:29 +0000 (02:29 +0000)]
Add another peephole pattern for conditional moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156460
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Jakob Stoklund Olesen [Wed, 9 May 2012 01:50:09 +0000 (01:50 +0000)]
Use ptr_rc_tailcall instead of GR32_TC.
The getPointerRegClass() hook will return GR32_TC, or whatever is
appropriate for the current function.
Patch by Yiannis Tsiouris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156459
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Akira Hatanaka [Wed, 9 May 2012 01:38:13 +0000 (01:38 +0000)]
Make register FP allocatable if the compiled function does not have dynamic
allocas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156458
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Akira Hatanaka [Wed, 9 May 2012 00:55:21 +0000 (00:55 +0000)]
Expand 64-bit shifts if target ABI is O32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156457
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Richard Trieu [Wed, 9 May 2012 00:30:21 +0000 (00:30 +0000)]
Remove unused variable to silence compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156456
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Bob Wilson [Wed, 9 May 2012 00:07:02 +0000 (00:07 +0000)]
Do not install llvm-config-host for cross-builds of clang. rdar://
11317847
My previous change to install llvm-config-host for cross-builds resulted
in that file being installed even when the normal llvm-config was not
installed, e.g., when building the install-clang target. Daniel suggested
this alternative, which solves the immediate problem and also avoids the gunk
in the top-level makefile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156448
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Dan Gohman [Tue, 8 May 2012 23:39:44 +0000 (23:39 +0000)]
Miscellaneous accumulated cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156445
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Kevin Enderby [Tue, 8 May 2012 23:38:45 +0000 (23:38 +0000)]
Fix it so llvm-objdump -arch does accept x86 and x86-64 as valid arch names.
PR12731. Patch by Meador Inge!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156444
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Seth Cantrell [Tue, 8 May 2012 23:34:38 +0000 (23:34 +0000)]
add to 3.1 release notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156443
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Dan Gohman [Tue, 8 May 2012 23:34:08 +0000 (23:34 +0000)]
Fix objc_storeStrong pattern matching to catch a potential use of the
old value after the store but before it is released.
This fixes rdar:/
11116986.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156442
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Jakob Stoklund Olesen [Tue, 8 May 2012 23:27:30 +0000 (23:27 +0000)]
Use a shared function for a common operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156441
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Eric Christopher [Tue, 8 May 2012 21:24:39 +0000 (21:24 +0000)]
Fix thinko in conditional.
Part of rdar://
11352000 and should bring the buildbots back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156421
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Jim Grosbach [Tue, 8 May 2012 20:56:07 +0000 (20:56 +0000)]
DAGCombiner should not change the type of an extract_vector index.
When a combine twiddles an extract_vector, care should be take to preserve
the type of the index operand. No luck extracting a reasonable testcase,
unfortunately.
rdar://
11391009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156419
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Daniel Dunbar [Tue, 8 May 2012 20:51:37 +0000 (20:51 +0000)]
Remove empty directories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156417
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Eric Christopher [Tue, 8 May 2012 20:45:04 +0000 (20:45 +0000)]
Remove excess semi-colons to quiet warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156416
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Daniel Dunbar [Tue, 8 May 2012 20:38:00 +0000 (20:38 +0000)]
[Support] Fix sys::GetRandomNumber() to always use a high quality seed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156414
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Sirish Pande [Tue, 8 May 2012 19:50:20 +0000 (19:50 +0000)]
Update load/store instruction patterns in Hexagon V4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156411
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Akira Hatanaka [Tue, 8 May 2012 19:14:42 +0000 (19:14 +0000)]
Formatting fixes.
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156409
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Akira Hatanaka [Tue, 8 May 2012 19:08:58 +0000 (19:08 +0000)]
Define mips16 instruction formats.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156408
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Eric Christopher [Tue, 8 May 2012 18:56:00 +0000 (18:56 +0000)]
Handle OpDeref in case it comes in as a register operand.
Part of rdar://
11352000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156405
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Eric Christopher [Tue, 8 May 2012 18:55:57 +0000 (18:55 +0000)]
Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156404
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Daniel Dunbar [Tue, 8 May 2012 18:26:07 +0000 (18:26 +0000)]
Revert r156393, "[tests] Remove some remaining DejaGNU related cruft.", this
patch wasn't ready yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156395
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Daniel Dunbar [Tue, 8 May 2012 18:11:49 +0000 (18:11 +0000)]
[tests] Remove some remaining DejaGNU related cruft.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156393
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Rafael Espindola [Tue, 8 May 2012 18:11:06 +0000 (18:11 +0000)]
Adding -fcolor-diagnostics is causing problem to users that parse the build
output. Peter Collingbourne also reports that it is showing up in
$(llvm-config --cflags).
Revert this for now since I don't know enough cmake to fix it properly.
This reverts commit
18efed7adc79c1970f307bb5b015d199012ba872.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156392
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Daniel Dunbar [Tue, 8 May 2012 17:48:32 +0000 (17:48 +0000)]
Regenerate configure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156390
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Daniel Dunbar [Tue, 8 May 2012 17:48:21 +0000 (17:48 +0000)]
[docs] Remove POD based man page docs (and build system support).
- Currently this leaves us with less build system support (e.g., installing man pages) for the docs than is desired. I'm working on fixing this, but it may take a while. If someone finds this particularly egregious let me know and I will prioritize it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156389
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Nuno Lopes [Tue, 8 May 2012 17:07:35 +0000 (17:07 +0000)]
remove autoupgrade code for old function attributes format.
I still left another fixme regarding alignment, because I'm unsure how to remove that code without breaking things
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156387
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Daniel Dunbar [Tue, 8 May 2012 16:50:47 +0000 (16:50 +0000)]
[docs] Add support for building man pages using Sphinx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156386
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Daniel Dunbar [Tue, 8 May 2012 16:50:43 +0000 (16:50 +0000)]
[docs] Integrate the command guide into the toctree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156385
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Daniel Dunbar [Tue, 8 May 2012 16:50:35 +0000 (16:50 +0000)]
[docs] Add ReST version of all the man pages.
- The POD versions are slated for execution, but are still around until
llvm.org machinery is in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156384
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Nuno Lopes [Tue, 8 May 2012 16:16:20 +0000 (16:16 +0000)]
remove TYPE_CODE_FUNCTION_OLD type code. it is no longer in use and it was marked for removal in 3.0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156383
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Jakob Stoklund Olesen [Tue, 8 May 2012 15:07:29 +0000 (15:07 +0000)]
s/CSR_Ghc/CSR_NoRegs/
Share the CalleeSavedRegs defs between all calling conventions having no
callee-saved registers.
Patch by Yiannis Tsiouris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156382
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NAKAMURA Takumi [Tue, 8 May 2012 14:31:52 +0000 (14:31 +0000)]
Lit: rewind WinWaitReleased() stuff in TestRunner.
r145222 "lit/TestRunner.py: [Win32] Introduce WinWaitReleased(f), to wait for file handles to be released by children."
r145223 "lit/TestRunner.py: Use RemoveForce()."
r145381 "lit/TestRunner.py: Try to catch ERROR_FILE_NOT_FOUND, too."
r152916 "lit/TestRunner.py: [Win32] Check all opened_files[] released, rather than (obsoleted) written_files[]."
r153172 "lit/TestRunner.py: [Win32] Rework WinWaitReleased() again! "win32file" from Python Win32 Extensions."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156381
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