bitcode writer support for blockaddress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85376 91177308-0d34-0410-b5e6-96231b3b80d8

Previously, all operands to Constant were themselves constant.
In the new world order, BlockAddress can have a BasicBlock operand.
This doesn't permute much, because if you have a ConstantExpr (or
anything more specific than Constant) we still know the operand has
to be a Constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85375 91177308-0d34-0410-b5e6-96231b3b80d8

doc bug spotted by apinski

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85372 91177308-0d34-0410-b5e6-96231b3b80d8

'static const  void *X = &&y' can only be put in the
readonly section if a reference to the containing function
is valid in the readonly section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85370 91177308-0d34-0410-b5e6-96231b3b80d8

Rewrite SelectionDAG::isPredecessorOf to be iterative instead of
recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85369 91177308-0d34-0410-b5e6-96231b3b80d8

full asmparser support for blockaddress.  We can now do:
$ llvm-as foo.ll -d -disable-output

which reads and prints the .ll file.  BC encoding is the
next project.  Testcase will go in once that works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85368 91177308-0d34-0410-b5e6-96231b3b80d8

asmprinter support for BlockAddress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85367 91177308-0d34-0410-b5e6-96231b3b80d8

when we tear down a module, we need to be careful to
zap BlockAddress values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85366 91177308-0d34-0410-b5e6-96231b3b80d8

basic blocks can now have non-instruction users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85365 91177308-0d34-0410-b5e6-96231b3b80d8

Teach MachineLICM to unfold loads from constant memory from
otherwise unhoistable instructions in order to allow the loads
to be hoisted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85364 91177308-0d34-0410-b5e6-96231b3b80d8

Use fconsts and fconstd to materialize small fp constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85362 91177308-0d34-0410-b5e6-96231b3b80d8

Add a second ValueType argument to isFPImmLegal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85361 91177308-0d34-0410-b5e6-96231b3b80d8

Mark dead physregdefs dead immediately. This helps MachineSink and
MachineLICM and other things which run before LiveVariables is run.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85360 91177308-0d34-0410-b5e6-96231b3b80d8

Allow constants of different types to share constant pool entries
if they have compatible encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85359 91177308-0d34-0410-b5e6-96231b3b80d8

Remove getIEEEFloatParts and getIEEEDoubleParts. They are not needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85358 91177308-0d34-0410-b5e6-96231b3b80d8

Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides
eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen
change.

This unfortunately requires SystemZ to switch to the list-burr
scheduler, in order to handle the physreg defs properly, however
that's what LLVM has available at this time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85357 91177308-0d34-0410-b5e6-96231b3b80d8

Add an indirect branch pattern for ARM.  Testcase will be coming soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85355 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the ModuleDeletion test on PPC and ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85352 91177308-0d34-0410-b5e6-96231b3b80d8

rename indbr -> indirectbr to appease the residents of #llvm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85351 91177308-0d34-0410-b5e6-96231b3b80d8

IR support for the new BlockAddress constant kind.  This is
untested and there is no way to use it, next up: doing battle
with asmparser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85349 91177308-0d34-0410-b5e6-96231b3b80d8

Record CodeGen optimization level in the BranchFolding pass so that we can
use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85346 91177308-0d34-0410-b5e6-96231b3b80d8

Rename lib/VMCore/ConstantsContext.h:ValueMap<> to ConstantUniqueMap<> to avoid
colliding with llvm/ADT/ValueMap.h:ValueMap<>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85344 91177308-0d34-0410-b5e6-96231b3b80d8

Add new note.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85341 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed a bug in the coalescer where intervals were occasionally merged despite a real interference. This fixes rdar://problem/7157961.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85338 91177308-0d34-0410-b5e6-96231b3b80d8

Enable virtual register based frame index scavenging by default for ARM & T2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85335 91177308-0d34-0410-b5e6-96231b3b80d8

Move and clarify note.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85334 91177308-0d34-0410-b5e6-96231b3b80d8

Infrastructure for dynamic stack realignment on ARM. For now, this is off by
default behind a command line option. This will enable better performance for
vectors on NEON enabled processors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85333 91177308-0d34-0410-b5e6-96231b3b80d8

Note corrected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85332 91177308-0d34-0410-b5e6-96231b3b80d8

Modify note.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85331 91177308-0d34-0410-b5e6-96231b3b80d8

Revert the API changes from r85295 to make it easier for people to build
against both 2.6 and HEAD.  The default is still changed to eager jitting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85330 91177308-0d34-0410-b5e6-96231b3b80d8

Add a note.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85329 91177308-0d34-0410-b5e6-96231b3b80d8

Factor out redundancy from clone() implementations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85327 91177308-0d34-0410-b5e6-96231b3b80d8

Update the MachineBasicBlock CFG for an indirect branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85325 91177308-0d34-0410-b5e6-96231b3b80d8

Add CodeGen support for indirect branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85323 91177308-0d34-0410-b5e6-96231b3b80d8

typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85322 91177308-0d34-0410-b5e6-96231b3b80d8

you can't take the address of the entry block of a function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85321 91177308-0d34-0410-b5e6-96231b3b80d8

improvements from gabor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85320 91177308-0d34-0410-b5e6-96231b3b80d8

make the build build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85319 91177308-0d34-0410-b5e6-96231b3b80d8

Add new APFloat methods that return sign, exp, and mantissa of ieee float and double values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85318 91177308-0d34-0410-b5e6-96231b3b80d8

Random updates to passes for indbr, I need blockaddress before I can do much more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85316 91177308-0d34-0410-b5e6-96231b3b80d8

cppbackend support for indbr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85312 91177308-0d34-0410-b5e6-96231b3b80d8

CBE support for indbr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85311 91177308-0d34-0410-b5e6-96231b3b80d8

fix things pointed out by Dan!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85310 91177308-0d34-0410-b5e6-96231b3b80d8

document the forthcoming blockaddress constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85306 91177308-0d34-0410-b5e6-96231b3b80d8

Similar to r85280, do not clear the "S" bit for RSBri and RSBrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85299 91177308-0d34-0410-b5e6-96231b3b80d8

Do not held on to DenseMap slot accross map insertion. The insertion may cause the map to grow rending the slot invalid.
Use this opportunity to use ValueMap instead of DenseMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85298 91177308-0d34-0410-b5e6-96231b3b80d8

Set condition code bits of BL and BLr9 to 0b1110 (ALways) to distinguish between
BL_pred and BLr9_pred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85297 91177308-0d34-0410-b5e6-96231b3b80d8

don't use stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85296 91177308-0d34-0410-b5e6-96231b3b80d8

Change the JIT to compile eagerly by default as agreed in
http://llvm.org/PR5184, and beef up the comments to describe what both options
do and the risks of lazy compilation in the presence of threads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85295 91177308-0d34-0410-b5e6-96231b3b80d8

fix pasto pointed out by Rafael

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85294 91177308-0d34-0410-b5e6-96231b3b80d8

Add radar number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85290 91177308-0d34-0410-b5e6-96231b3b80d8

Testcase for llvm-gcc patch 85284.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85287 91177308-0d34-0410-b5e6-96231b3b80d8

Rename MallocFreeHelper as MemoryBuiltins

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85286 91177308-0d34-0410-b5e6-96231b3b80d8

CMake: Install .inc files too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85285 91177308-0d34-0410-b5e6-96231b3b80d8

Rather than excluding quite some things, and still installing
CMakeLists.txt, Makefiles, ... it's better to whitelist what we really
want to install.

Patch by Ingmar Vanhassel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85282 91177308-0d34-0410-b5e6-96231b3b80d8

Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8

Do not clear the "S" bit for RSCri and RSCrs.  They inherit from the "sI"
instruction format that already takes care of setting this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85280 91177308-0d34-0410-b5e6-96231b3b80d8

add enough support for indirect branch for the feature test to pass
(assembler,asmprinter, bc reader+writer) and document it.  Codegen
currently aborts on it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85274 91177308-0d34-0410-b5e6-96231b3b80d8

Explicitly specify 0b00, i.e, zero rotation, as the rotate filed (Inst{11-10})
for the r/rr fragment of the multiclass AI_unary_rrot/AI_bin_rrot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85271 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85266 91177308-0d34-0410-b5e6-96231b3b80d8

change of mind :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85258 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unnecessary gotos to fall-thru successors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85257 91177308-0d34-0410-b5e6-96231b3b80d8

rename test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85256 91177308-0d34-0410-b5e6-96231b3b80d8

Test commit.  Added '.' to the comment line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85255 91177308-0d34-0410-b5e6-96231b3b80d8

Type.h doesn't need to #include LLVMContext.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85254 91177308-0d34-0410-b5e6-96231b3b80d8

pseudosourcevalue is also still using getGlobalContext(), so it isn't
thread safe either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85253 91177308-0d34-0410-b5e6-96231b3b80d8

apparently the X86 JIT isn't fully contextized, it is still using getGlobalContext() :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85252 91177308-0d34-0410-b5e6-96231b3b80d8

Fix reversed logic spotted by Owen Anderson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85251 91177308-0d34-0410-b5e6-96231b3b80d8

trim another #include

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85250 91177308-0d34-0410-b5e6-96231b3b80d8

remove an unneeded #include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85248 91177308-0d34-0410-b5e6-96231b3b80d8

Convert Analysis tests to FileCheck in regards to PR5307.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85241 91177308-0d34-0410-b5e6-96231b3b80d8

Correctly align double arguments in the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85235 91177308-0d34-0410-b5e6-96231b3b80d8

80-col violation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85215 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Thumb2 failures by converting them to FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85210 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the rest of the ARM failures by converting them to FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85208 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some more failures by converting to FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85207 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a pretty serious misfeature of the inliner: if it inlines a function
with multiple return values it inserts a PHI to merge them all together.
However, if the return values are all the same, it ends up with a pointless
PHI and this pointless PHI happens to really block SRoA from happening in
at least a silly C++ example written by Doug, but probably others.  This
fixes rdar://7339069.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85206 91177308-0d34-0410-b5e6-96231b3b80d8

convert to filecheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85205 91177308-0d34-0410-b5e6-96231b3b80d8

Convert to FileCheck, fixing failure due to tab change in the process.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85204 91177308-0d34-0410-b5e6-96231b3b80d8

lang points out that the comment is out of date with the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85203 91177308-0d34-0410-b5e6-96231b3b80d8

Fix VS build, patch by Marius Wachtler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85198 91177308-0d34-0410-b5e6-96231b3b80d8

VS build fix, patch by Marius Wachtler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85197 91177308-0d34-0410-b5e6-96231b3b80d8

Fix OProfileJITEventListener after r85182.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85192 91177308-0d34-0410-b5e6-96231b3b80d8

Add objectsize intrinsic and hook it up through codegen. Doesn't
do anything than return "I don't know" at the moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85189 91177308-0d34-0410-b5e6-96231b3b80d8

Now VFP instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85186 91177308-0d34-0410-b5e6-96231b3b80d8

Add braces to avoid ambiguous else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85185 91177308-0d34-0410-b5e6-96231b3b80d8

Change Thumb1 and Thumb2 instructions to separate opcode from operands with a tab instead of a space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85184 91177308-0d34-0410-b5e6-96231b3b80d8

Automatically do the equivalent of freeMachineCodeForFunction(F) when F is
being destroyed. This allows users to run global optimizations like globaldce
even after some functions have been jitted.

This patch also removes the Function* parameter to
JITEventListener::NotifyFreeingMachineCode() since it can cause that to be
called when the Function is partially destroyed. This change will be even more
helpful later when I think we'll want to allow machine code to actually outlive
its Function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85182 91177308-0d34-0410-b5e6-96231b3b80d8

Rename MallocHelper as MallocFreeHelper, since it now also identifies calls to free()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85181 91177308-0d34-0410-b5e6-96231b3b80d8

Forgot to commit these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85180 91177308-0d34-0410-b5e6-96231b3b80d8

Add a straight-forward implementation of SCCVN for aggressively eliminating scalar redundancies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85179 91177308-0d34-0410-b5e6-96231b3b80d8

Change ARM asm strings to separate opcode from operands with a tab instead of a space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85178 91177308-0d34-0410-b5e6-96231b3b80d8

Remove all references to MallocInst and FreeInst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85177 91177308-0d34-0410-b5e6-96231b3b80d8

Remove FreeInst.
Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85176 91177308-0d34-0410-b5e6-96231b3b80d8

Try to get ahead of Johnny Chen and pro-actively add some more ARM encoding
bits.  Johnny, please review -- I do not have a good track record of getting
these right.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85173 91177308-0d34-0410-b5e6-96231b3b80d8

Convert a few tests to FileCheck for PR5307.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85171 91177308-0d34-0410-b5e6-96231b3b80d8

Fix ARM encoding typo: Opcod3 is not passed to ASuI parent class.
Patch by Johnny Chen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85169 91177308-0d34-0410-b5e6-96231b3b80d8

Add more ARM instruction encodings for 's' bit set and "rs" register encoding
bits.  Patch by Johnny Chen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85167 91177308-0d34-0410-b5e6-96231b3b80d8

Allow the aggressive anti-dep breaker to process the same region multiple times. This is necessary because new anti-dependencies are exposed when "current" ones are broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85166 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify this code. LoopDeletion doesn't need to explicit check that
the loop exiting block dominates the latch block; if ScalarEvolution
can prove that the trip-count is finite, that's sufficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85165 91177308-0d34-0410-b5e6-96231b3b80d8