arm64: rockchip_defconfig: enable bt sco codec driver

Change-Id: I58d6f5ade04cbfcef436237ae3bc868b6045a9d5
Signed-off-by: zhangjun <zhangjun@rock-chips.com>

MALI: midgard: RK: adapt cores_pm in DDK r14 for solution_1_for_glitch

Change-Id: I383779bd39d6ae52f65ad25bf2e0eb0f1a25dd00
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

MALI: rockchip: upgrade midgard DDK to r14p0-01rel0

Along with a slight modification in mali_kbase_core_linux.c,
for building in rk Linux 4.4:
-#if KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE
+#if KERNEL_VERSION(4, 4, 0) > LINUX_VERSION_CODE

Change-Id: I34565cb975866b46c5e3a4d8e2ac5e350dcceb80
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

Revert "Revert "MALI: midgard: RK: not to power off all the pm cores""

This reverts commit d94880b547779baaaa9e9b733c38881cad8aa685.

Change-Id: Iac64d84ff5a7ee3e5666ed2829c17de413fc9bcd
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

Revert "MALI: midgard: RK: slowdown clk_gpu before poweroff cores"

This reverts commit 89501d8dd3c214e4a162e94804f0d56c61c23237.

Change-Id: I403b63847da10bc2c5536bd26f692bafc849588e
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

Revert "MALI: midgard: avoid GPU voltage domain keeping the initial voltage"

This reverts commit 57984d531806892a8e14bb7c1b42b1c4c406ddf9.

Change-Id: If538c9bbeb5d3fc7302f9683cb85f8acdd309a09
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

Revert "MALI: midgard: support sharing regulator with other devices"

This reverts commit 85b4e1dffa2e7a0bbd092d294043f19f82417d74.

Change-Id: Ie8fb980cb8a8b063dd6c9626d5b6c858b36f0976
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

arm64: dts: rockchip: add gmac support for rk3328-evb

Change-Id: I05e4eb2d904809a310b12f0de8ae274b90dd583a
Signed-off-by: david.wu <david.wu@rock-chips.com>

arm64: dts: rockchip: add io-domain support for rk3328-evb

Change-Id: I15fb97655419e723ce001b8900b413dac3e291e8
Signed-off-by: david.wu <david.wu@rock-chips.com>

arm64: dts: rockchip: modify auto dp rayken hwrotation for rk3399-box-rev2-disvr dts

Change-Id: Ia5fc077acba519c07f58456fde0257e313181197
Signed-off-by: Luo wei <lw@rock-chips.com>

clk: rockchip: rk3328: add SCLK_HDMI_SFC id

Change-Id: Ic876175272cba40093e555ee815e9261bb39d510
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: add pwm support for rk3328

Change-Id: I20d150fb258f9eb7f09623189551b982b641e7ad
Signed-off-by: david.wu <david.wu@rock-chips.com>

pwm: rockchip: need the Distinguish between rk3328 and rk3288 for clk used

Change-Id: Ib6274a200640ab8829a99761ffbf60d530fe5653
Signed-off-by: david.wu <david.wu@rock-chips.com>

Bluetooth: update rtk_btusb driver to v 4.1.2

Change-Id: I3627b1938c734cfe4ce32c269798037dc1ff8a32
Signed-off-by: huweiguo <hwg@rock-chips.com>

mfd: rk808: add sysfs debug node "/sys/rk8xx/rk8xx_dbg"

Change-Id: I197dc97b7337414a7d52426da0e0cb8c7480c917
Signed-off-by: chenjh <chenjh@rock-chips.com>

arm64: dts: rockchip: add gmac support for rk3328

Change-Id: If46e67a05e2a54462b1a83433018385c5f52942c
Signed-off-by: david.wu <david.wu@rock-chips.com>

arm64: dts: rockchip: change the compatible for rk3328 i2c

Change-Id: I02e7c4088a7a14e233ce2fd907d6a249c18f3a7d
Signed-off-by: david.wu <david.wu@rock-chips.com>

i2c: rk3x: Don't need to add rk3328 i2c compitiable

Change-Id: I32f9698fcfdce4ecd40b9be7b2ab7ffd82651b9b
Signed-off-by: david.wu <david.wu@rock-chips.com>

arm64: dts: rockchip: enable usb3 controller for rk3328-evb

Change-Id: I49c152476f6c87195e6b68a9477d84d8bfcc1a70
Signed-off-by: William Wu <wulf@rock-chips.com>

usb: dwc3: add a new glue layer for rockchip SoCs with INNO PHY

This patch add a rockchip specific glue layer to support
USB 3.0 HOST only mode for rockchip USB 3.0 core wrapper
consisting of USB 3.0 controller IP from Synopsys and USB
3.0 PHY IP from Innosilicon.

With this patch, we can support for XHCI integrated in
DWC3 IP on rockchip platforms. Because some INNO USB 3.0
PHY can't detect disconnection by PHY IP, and cause USB3
device unrecognized when replugged again. So we depend on
the HUB core driver to detect the disconnection, and send
notifier to DWC3 driver from USB PHY driver, then we can
do phy reset and remove/add hcd to reinit HCD.

Change-Id: I6972c6f9f8f7160dbd74ad531b843a65ccec5dc0
Signed-off-by: William Wu <wulf@rock-chips.com>

arm64: dts: rockchip: add usb3 controller node for rk3328

Change-Id: I350f46a839ec2266a129c8902aebe3a0480c074d
Signed-off-by: William Wu <wulf@rock-chips.com>

usb: dwc3: rockchip-inno: add devicetree bindings documentation

This patch adds the devicetree documentation required for Rockchip
USB 3.0 core wrapper consisting of USB 3.0 controller IP from Synopsys
and USB 3.0 PHY IP from Innosilicon.

It supports DRD mode, and could operate in device mode (SS, HS, FS)
and host mode (SS, HS, FS, LS).

Change-Id: Ia240627c31cd3ff2f2d7f1a1faa9c7d88207d04f
Signed-off-by: William Wu <wulf@rock-chips.com>

phy: rockchip-inno-usb3: workaround for USB3 PHY disconnection det issue

The rk322xh USB3 PHY has a problem to detect disconnection,
it loses the ability to detect an absence of a far-end
receiver termination specified in USB3 spec Table 6-21,
and this causes the linkstate to change between SS.Inactive
and Polling state, but not return to correct state Rx.detect.

To workaround this bug, we depends on the hub_event to
detect the port linkstate change and do soft disconnect.
And then do USB3 PHY reset and reinit HCD to recovery
the whole USB3.

The workaround process is:
Plug out USB3 device -> hub_event detect PLC and find
USB 3.0 port in the Inactive -> call usb_remove_device()
to do soft disconnect -> call usb_phy_notify_connect()
-> send notifier to DWC3 controller driver to do USB3
PHY reset and reinit HCD.

Change-Id: Icb975581c6fbbb34a7da90ddca47e04a46e5da48
Signed-off-by: William Wu <wulf@rock-chips.com>

phy: rockchip-inno-usb3: select USB_PHY

Some rockchip SoCs (e.g. rk322xh/rk3328) integrated with
INNO USB 3.0 PHY have a problem to detect disconnection
correctly. So we need to depend on the usb phy framework
to handle the disconnection.

Change-Id: Ie3bd015c89e1fb8d46f69fe8d274e29462bfb763
Signed-off-by: William Wu <wulf@rock-chips.com>

arm64: dts: rockchip: enable usb3 phy for rk3328-evb

Change-Id: I5ab06e9db355575e828ce004c1d3ce65e4717c95
Signed-off-by: William Wu <wulf@rock-chips.com>

arm64: rockchip_linux_defconfig: enable INNO USB 3.0 PHY

Change-Id: I4eb6f75fa0149fb40a3acc5aa6425b1efdf14239
Signed-off-by: William Wu <wulf@rock-chips.com>

phy: rockchip-inno-usb3: add a new driver for Rockchip USB 3.0 PHY

This patch implements a USB 3.0 PHY driver for Rockchip
platform (e.g. rk3328) with Innosilicon IP block.

Change-Id: Ia6ed5df6b7b9eecebd5a5c8a4c4a6df7d26b7422
Signed-off-by: William Wu <wulf@rock-chips.com>

arm64: dts: rockchip: add usb3 phy nodes for rk3328

This patch adds USB 3.0 PHY grf node and apb node
for rk3328 USB 3.0 module.

Change-Id: I9d4e6c6d6792ac5fd6c2a4d7cc902f1ff0cf4ef1
Signed-off-by: William Wu <wulf@rock-chips.com>

Documentation: bindings: add dt doc for Rockchip USB 3.0 PHY

This patch adds a binding that describes the Rockchip USB 3.0
PHY designed by Innosilicon.

Change-Id: Ia5b9f18743c7a7ed1b9d33420608a2f12a086aee
Signed-off-by: William Wu <wulf@rock-chips.com>

usb: dwc3: rockchip: delete unused binding documentation

We have cherry-pick new binding documentation for dwc3
from upstream, so delete the legacy one.

Change-Id: I292447c96c741445669139478c769e356d1b8d9e
Signed-off-by: William Wu <wulf@rock-chips.com>

block/partitions/rk: extend the property setting for NVMe

In order not to cause ABI regression, let's invent a new
androidboot.mode for NVMe instead. Just elaborate a bit more
that we now doesn't support mtd devices, otherwise we should
rework it to make it more scalable.

Change-Id: I115ffd0e5c4986f2e76fcbcf6700c31f297f7950
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

clk: rockchip: rk3328: fix up the describe error for aclk_usb3otg

Change-Id: Ie323c8934205bf71360d779717bb3e34c36a9dc6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: Fix indentation of rk3399-android-next

Change-Id: I93cce96446bd89634eef21e1dae633734660c686
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ASoC: bt-sco: Compatible stereo format

Compatible the platform which unsupported mono channel

Change-Id: Ica417b0c544b0750e6367fdeab45254542135bc4
Signed-off-by: zhangjun <zhangjun@rock-chips.com>

video: rockchip: hdmi: add dts property rockchip,defaultdepth

To modify hdmi default output color depth, use following dts:

&hdmi {
rockchip,defaultdepth = <10>;
}

rockchip,defaultdepth could be following value:
<0>  auto select color depth, prefer 8bit
<8>  8bit
<10> 10bit

Change-Id: Idce0bd080c042edf3939c5c38b76d4d1860b7a9f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 905228ba1e43c24b3048820a7f1047a4ed5ef185)

video: rockchip: hdmi: support set hdr metedata

Use following command to set hdr metadata:

cd /sys/class/display/HDMI
echo "hdrmdata=1 2 3 4 5 6 7 8 9 10 11 12" > color

Use following command to get current hdr metadata

cat /sys/class/display/HDMI/color

Change-Id: I81a5000801b558728689be912c1a642f3b237e65
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 09210b8aa1881935d31be8a4d9e2574a026512b3)

video: rockchip: hdmi: support modify color mode and depth simultaneously

Use following command:

echo mode=<value> > /sys/class/display/HDMI/mode

<value> is decimal digits, lower 8bit is color mode, upper 8bit is depth.
For example:
value = 131 = 0x83 means YCbCr444 8bit output
value = 164 = 0xa4 means YCbCr422 10bit output
value = 0 means restore auto mode(8bit, priority YCbCr444)

Change-Id: I256906d91f7075defb4d785cfc15926ca5627093
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit c3620a88e55c3ade4a823adea08b0bb2acc4737e)

video: rockchip: hdmi: fix compile warning

fix warning: switch condition has boolean value [-Wswitch-bool]

Change-Id: I11d7a9fe2a07f6681dacf4a1d800b16497339297
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 66f72e45db8d12d4c5049de6c6fb9aae67a30fe6)

video: rockchip: hdmi: v2: fix some format check error

Change-Id: I3432060aed93ccf8745fa7afebd0a5322f8d4121
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit d3dfca100edae96339c2a9b7674dd3b715f2b18e)

video: rockchip: hdmi: fix can not disable hdr error

Change-Id: I53f809d78a8a151a6b6985266ec73026bdc0b3a2
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit b60715d9a028e849bd40a0f1a9693f0519e66f06)

video: rockchip: hdmi: fix CTS HF1-53 HDR test

1. HDR MetaData HB2 is 26.
2. Under HF1-53, HDR MetaData should be sent and
PB1 value should be exist in EDID.

Change-Id: I616b4cdcf321ea0080b845c868d1f4cd4881fd14
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 39c34527e735b84e6ceb8a2e386aed0060111858)

video: rockchip: hdmi: improve hdr function when out of sink tmds clk

If output tmdsclk is out of sink max tmds clk, we need to set output
mode to 8bit or YCbCr422.

For example, sink max tmds clk is 600M, but 3840x2160p-60 10bit tmdsclk
is 594*1.25 > 600, we set output mode to YCbCr422 10bit which tmds clk
is 594, so we can get max picture quality.

Change-Id: I13fe30dad06757ec52de8d367f1e10a56e63ad92
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 0c3397a9b8b4da4ca3a67e5a6d88abf20f00f184)

video: rockchip: hdmi: enable hdr when resolution is not 4K

Change-Id: If3ab93cd0ef822c82d6d482cb3ed2dc29f6613d8
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 62a423c5a074a895b1f92f3ceecf4f4ba5d8253a)

video: rockchip: hdmi: support hdr function

HDR is introduced by HDMI2.0a, which need parsing HDR Static
Metedata data Block defined in EDID, and send Dynamic Range
and Mastering InfoFrame to inform TV to switch to HDR mode.

If TV support HDR, it's EOTF is shown in sysfs node
/sys/class/display/HDMI/color with key word "Supported EOTF:".

For example, "Support EOTF: 0x7" means support following EOTF:
BIT0: Traditional gamma - SDR
BIT1: Traditional gamma - HDR
BIT2: ST_2084

To switch eotf mode, you can use following command:
echo hdr=value > /sys/class/display/HDMI/color
value could be:
0 - Disable sending Dynamic Range and Mastering InfoFrame
1 - Traditional gamma - SDR
2 - Traditional gamma - HDR
4 - ST_2084
0、1 both means SDR mode， 4 is HDR10/Dolby HDR mode.

Change-Id: Ia3d19bbca9b9368cde8dcb11265fbff4684ac603
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 08ea9d12f34f8ea6f79bdd5b7eb1ff74d2cd796f)

video: rockchip: hdmi: change the way to enable debug log

user can change hdmi_dbg_level value to printf log which you want.
1 : cec
2 : hdmi
3 : hdcp
such as, echo 2 > /sys/module/rockchip_hdmi_sysfs/parameters/hdmi_dbg_level

Change-Id: Iaa5a66c2926789694e0d544196bedc81fb3a755a
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
(cherry picked from commit 919cb0208a877a1b80bf4171d479f36c9a2dbca2)

video: rockchip: hdmi: contrast uboot and kernel resolution

When box is starting, if kernel resolution is different from uboot,
need to clear hdmi->uboot

Change-Id: Iec56862fe20dcaccc12fefae21de55b56ab2fe54
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
(cherry picked from commit 899bf65ac08492fc5aec36a1b23509baa008d409)

video: rockchip: hdmi: yuv420 resolution retain 4K 50/60HZ

Change-Id: I75ae87bbd274af10b7da9b6699d5892e6f864dba
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
(cherry picked from commit 6acb6585c03dd4bf7eaf2a548cb3f836070ba56c)

video: rockchip: hdmi: delete cec grf register operation

CEC GRF register can be replaced by hdmi cec register
CEC_CTRL BIT 5.

Change-Id: Ic27eb242e23c4a9b4de6a77032372eac11b5247c
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 3a94990c47760102a6b314e7b83c75c86af788e6)

Revert "mfd: fusb302: avoid sending notifier to USB/DP during PM suspend"

This reverts commit 082f43af91698a82583053679ec0d0be89b36b2d.

Change-Id: Iae816df6de573c03cf87b0091fb920c4673dbb54
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

PM / Domains: Keep the pd status during system PM phases

If a PM domain is powered off before system suspend,
we hope do nothing in system runtime suspend noirq phase
and system runtime resume noirq phase.

Change-Id: Id72b1f92e10449c48006aced0d49612637402210
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

UPSTREAM: PM / Domains: Allow runtime PM during system PM phases

In cases when a PM domain isn't powered off when genpd's ->prepare()
callback is invoked, genpd runtime resumes and disables runtime PM for the
device. This behaviour was needed when genpd managed intermediate states
during the power off sequence, as to maintain proper low power states of
devices during system PM suspend/resume.

Commit ba2bbfbf6307 (PM / Domains: Remove intermediate states from the
power off sequence), enables genpd to improve its behaviour in that
respect.

The PM core disables runtime PM at __device_suspend_late() before it calls
a system PM "late" callback for a device. When resuming a device, after a
corresponding "early" callback has been invoked, the PM core re-enables
runtime PM.

By changing genpd to allow runtime PM according to the same system PM
phases as the PM core, devices can be runtime resumed by their
corresponding subsystem/driver when really needed.

In this way, genpd no longer need to runtime resume the device from its
->prepare() callback. In most cases that avoids unnecessary and energy-
wasting operations of runtime resuming devices that have nothing to do,
only to runtime suspend them shortly after.

Although, because of changing this behaviour in genpd and due to that
genpd powers on the PM domain unconditionally in the system PM resume
"noirq" phase, it could potentially cause a PM domain to stay powered
on even if it's unused after the system has resumed. To avoid this,
schedule a power off work when genpd's system PM ->complete() callback
has been invoked for the last device in the PM domain.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 4d23a5e84806b202d9231929c9507ef7cf7a0185)

Change-Id: I195392386758b1320107d17f4e54c3c220263a9c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

UPSTREAM: PM / Domains: Remove redundant pm_request_idle() call in genpd

The PM core increases the runtime PM usage count at the system PM prepare
phase. Later when the system resumes, it does a pm_runtime_put() in the
complete phase, which in addition to decrementing the usage count, does
the equivalent of a pm_request_idle().

Therefore the call to pm_request_idle() from within genpd's ->complete()
callback is redundant, so remove it.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 9b002b8f0e386966dfc2dddf47eebed3b71ef876)

Change-Id: I3b6b3cb1b7675f7a9579b57d801efa5ea55c0e4e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

UPSTREAM: PM / Domains: Remove redundant wrapper functions for system PM

Due to the previous changes in genpd, which removed the suspend_power_off
flag, several of the system PM callbacks no longer do any additional
checks but only invoke corresponding pm_generic_* helper functions.

To clean up the code, drop these wrapper functions as they have
become redundant. Instead, assign the system PM callbacks directly
to the pm_generic_*() helper functions.

While changing this, it has bocame clear that some of the current
system PM callbacks in genpd invoke wrong driver callbacks. For
example, the genpd's ->restore() callback invokes pm_generic_resume(),
while that should be pm_generic_restore(). Fix that as well.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 800188538965d90759cea13bcb4f87a214cf5c53)

Change-Id: I463cc0a8c4d6d2e69dd320ff58af3cf2e999e6ee
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

UPSTREAM: PM / Domains: Allow genpd to power on during system PM phases

If a PM domain is powered off when the first device starts its system PM
prepare phase, genpd prevents any further attempts to power on the PM
domain during the following system PM phases. Not until the system PM
complete phase is finalized for all devices in the PM domain, genpd again
allows it to be powered on.

This behaviour needs to be changed, as a subsystem/driver for a device in
the same PM domain may still need to be able to serve requests in some of
the system PM phases. Accordingly, it may need to runtime resume its
device and thus also request the corresponding PM domain to be powered on.

To deal with these scenarios, let's make the device operational in the
system PM prepare phase by runtime resuming it, no matter if the PM domain
is powered on or off. Changing this also enables us to remove genpd's
suspend_power_off flag, as it's being used to track this condition.
Additionally, we must allow the PM domain to be powered on via runtime PM
during the system PM phases.

This change also requires a fix in the AMD ACP (Audio CoProcessor) drm
driver. It registers a genpd to model the ACP as a PM domain, but
unfortunately it's also abuses genpd's "internal" suspend_power_off flag
to deal with a corner case at system PM resume.

More precisely, the so called SMU block powers on the ACP at system PM
resume, unconditionally if it's being used or not. This may lead to that
genpd's internal status of the power state, may not correctly reflect the
power state of the HW after a system PM resume.

Because of changing the behaviour of genpd, by runtime resuming devices in
the prepare phase, the AMD ACP drm driver no longer have to deal with this
corner case. So let's just drop the related code in this driver.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 39dd0f234fc37da071dadbd9b49fe800d62139b4)

Change-Id: I1c964ebd660c8c7a8547f2206c80c25b936e7196
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

UPSTREAM: PM / Domains: Drop unnecessary wakeup code from pm_genpd_prepare()

As the PM core already have wakeup management during the system PM phase,
it seems reasonable that genpd and its users should be able to rely on
that. Therefore let's remove this from pm_genpd_prepare().

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 164a2159a2d6789bc7e3c4b126dde7f3ce865992)

Change-Id: I39f72aa82468327c01b4533d177f797bf2da59a6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

UPSTREAM: PM / Domains: Remove redundant pm_runtime_get|put*() in pm_genpd_prepare()

The PM core increases and decreases the runtime PM usage count in the
system PM prepare phase. This makes some of the pm_runtime_get|put*()
calls in pm_genpd_prepare() redundant, so let's remove them.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 624c8df7d2823ec0df9609025480309322886ed3)

Change-Id: I0e9a2027740147ef6674993039062d2c3cb2513a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: fix dp register fail for rk3399-mid

1. MID board is only one dp port, we need to assign a phy.
2. MID board not use HDMI, we need to disabled it.

Change-Id: I589373fa04b940681910b3c0ee58ee9f9f464916
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

arm64: dts: rk3399-box-next: using drm hdmi audio framework

Change-Id: Ia217fdb6c9f8e77079ff5e5683d277fda6aeab5b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

ARM64: rockchip_defconfig: enable CONFIG_DRM_DW_HDMI_I2S_AUDIO

enable CONFIG_DRM_DW_HDMI_I2S_AUDIO for drm hdmi audio.

Change-Id: I674b4dc0025539f9e9f72f286a90ab53bf83af5c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

arm64: dts: rockchip: add u2phy grf and usb2.0 controller node

Support usb2.0 for rk3328.
Add node usb2phy_grf for usb2.0 phy.
Add node usb_host0_ehci for ehci controller.
Add node usb_host0_ohci for ohci controller.

Change-Id: Ia0adfa4c8cd16735e899491e1dc91d37bd348364
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

phy: rockchip-inno-usb2: add support of u2phy for rk3328

The u2phy driver of kernel 4.4 need add config and specific tuning
for rk3328. This patch add support of u2phy for rk3328.

Change-Id: Ie1bdfc0fde37d7d0b26d0f3aac136481bd6f4c44
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

Documentation: bindings: add DT documentation for u2phy and u2phy grf

Due to the u2phy registers are separated from general grf, we need to
add u2phy grf node and place u2phy node in it. And on some platform,
the 480m clock may need to assign clock parent in dts in stead of
clock driver. So this patch add u2phy grf node and property of
assigned-clocks and assigned-clock-parents to assign parent for 480m
clock.

Change-Id: I88e63745e38265814169136f079a00791f5813b3
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

ARM64: dts: rk3399-tve1205g: fix gpio set error for hall sensor

Change-Id: I39a0be31cf56106efdd11f3ea00234004b7e420c
Signed-off-by: Zhou weixin <zwx@rock-chips.com>

arm64: dts: rockchip: add auto dp config for rk3399-box-rev2-disvr dts

Change-Id: I149ee371a9d11a807bf94c3cff8e3dc36d605853
Signed-off-by: Luo wei <lw@rock-chips.com>

video: rockchip: add auto dp support for vr product

Change-Id: Ic4e4a3c0214c23bd55d883df6d2106646ef33614
Signed-off-by: Luo wei <lw@rock-chips.com>

power: rk818-charger: set sleep otg 5v by otg_in status and dts

Change-Id: I1b2c14dfa64fe382e05717c5e9bb6a5617badba0
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>

drm: bridge/dw_hdmi: add switch state to support hdmi audio

Change-Id: Ib8122f9cc913d2cd15b92a3d6c57c7edf77d0483
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

drm/rockchip: cdn-dp: add switch state to support dp audio

Change-Id: Ifb4f6c8c2ecc0df5a021c38c7b5fe57da5c98e6b
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

power_supply: bq25700: update status when charger pull out

Change-Id: I416aba3e0318544497bdf444df213461fd10ec7e
Signed-off-by: Shunqing Chen <csq@rock-chips.com>

rockchip: clk: rk3399: remove the flag ROCKCHIP_PLL_SYNC_RATE for VPLL and CPLL

to slove the display shaking, when uboot logo display to kernel show.

Change-Id: I804aa09f24bc4fa7b6314a7a5487f0ee1a321724
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: clk: rk3399: support dual pll for vop on drm

attention:
if the vopb is for hdmi,the vopb parent clk must be vpll
and the vopl parent clk is cpll or others plls.
if the vopl is for hdmi,the vopl parent clk must be vpll
and the vopb parent clk is cpll or other plls.

Change-Id: I9056fbdbfcdb7a71f2e7ee5d57a0db8523be66ef
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm64: dts: rockchip: set hdmi ddc channel for excavator linux

Change-Id: Ibef432d0b9a6a38d06e4841b7e97a5cbbea91da9
Signed-off-by: yuyz <yuyz@rock-chips.com>

ARM64: dts: rk3399-box: Add a new infrared remote control button

Change-Id: Idd384a9c8635772f3c53a0a1f60739998db1704a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

ARM64: dts: rk3399: enable rockchip-suspend for box

Change-Id: Ibfaee3b898dc77673b806e6a46570320918b9a5e
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

FROMLIST: serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt

On a Rockchip rk3399-based board during suspend/resume testing, we
found that we could get the console UART into a state where it would
print this to the console a lot:
  serial8250: too much work for irq42

Followed eventually by:
  NMI watchdog: BUG: soft lockup - CPU#0 stuck for 11s!

Upon debugging I found that we're in this state:
  iir = 0x000000cc
  lsr = 0x00000060

It appears that somehow we have a RX Timeout interrupt but there is no
actual data present to receive.  When we're in this state the UART
driver claims that it handled the interrupt but it actually doesn't
really do anything.  This means that we keep getting the interrupt
over and over again.

Normally we don't actually need to do anything special to handle a RX
Timeout interrupt.  We'll notice that there is some data ready and
we'll read it, which will end up clearing the RX Timeout.  In this
case we have a problem specifically because we got the RX TImeout
without any data.  Reading a bogus byte is confirmed to get us out of
this state.

It's unclear how exactly the UART got into this state, but it is known
that the UART lines are essentially undriven and unpowered during
suspend, so possibly during resume some garbage / half transmitted
bits are seen on the line and put the UART into this state.

The UART on the rk3399 is a DesignWare based 8250 UART.  From mailing
list posts, it appears that other people have run into similar
problems with DesignWare based IP.  Presumably this problem is unique
to that IP, so I have placed the workaround there to avoid possibly of
accidentally triggering bad behavior on other IP.  Also note the RX
Timeout behaves very differently in the DMA case, for for now the
workaround is only applied to the non-DMA case.

BUG=chrome-os-partner:59918
TEST=suspend_stress_test

Change-Id: I99974b2977527868c6216ac624dcb8bc9b64cf46
Signed-off-by: Douglas Anderson <dianders@chromium.org>
(am from https://patchwork.kernel.org/patch/9558923/)
Reviewed-on: https://chromium-review.googlesource.com/421577
Reviewed-by: Caesar Wang <wxt@rock-chips.com>

drm/panel: simple: fixup AUO B125HAN03.1 panel timing

Change-Id: I488eb97c4e250de78e606a894c52f757fd18c7bb
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

drm/panel: move hardcode timing top of mode list

Change-Id: I76cc9ae6cfdac77e8ed0953da35b17491f5fae6c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/panel: override panel if dts config exist

Change-Id: I326e28bf334025542f1bc46f80d41eee74b57286
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: dts: rockchip: add dp audio support for rk3399-tve1205g

Change-Id: I63c3faa8d6218d77f29776035ac8098695f65629
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

arm64: rockchip_defconfig: enable cdn dp machine driver

Change-Id: I9568d07c59210cf1132a018c81aadc3e1993ec7f
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

arm64: dts: rockchip: add dual port dp support for rk3399-tve1205g

Change-Id: I6212cf1f829374ef2dac7ecda5ac5f0033ff5ba0
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

clk: rockchip: describe clk_gmac2io_ext using the new muxgrf type on rk3328

Change-Id: I6b86bd2244fda5e1eac52be4b5399230bfc9875e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

dt-bindings: clock: rk3328: add clk_mac2io_ext ID

Change-Id: I1f17c50020d5f37f5cfd6a4d0ecfc195bad2687d
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

ARM64: dts: rk3399: enable rockchip-suspend for evb3

Change-Id: I1d1511965c2eb7c04a7f91f093e95f2eceeb4790
Signed-off-by: shengfei Xu <xsf@rock-chips.com>

arm64: dts: rockchip: add rockchip-suspend node for rk3399

Change-Id: I6af1f487f40c0775102d3b9951617c5d03b884ef
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

arm64: rockchip_defconfig: enable suspend mode config

Change-Id: Ifdf47ad8ff9303f5b94362f73f5115faaa3403d0
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

arm64: rockchip_defconfig: enable SIP interface

Change-Id: I4f805ac550c291f4d0821cf7b2eb1eefe54ce067
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

suspend: rockchip: set the suspend config to ATF

Change-Id: I400aa252c24b814e3da7fa6703a4e03a1c90d572
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

dt-bindings: suspend: remove unused rockchip-pm.h

Which is legacy code, do not need any more.

Change-Id: I15f5cbf1389a6442fca6fbf348d2d94a59510338
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM: dts: rockchip: fix some incorrect supply for miniarm

Redress the supply node for rk3288-miniarm board, which obey strictly
schematic.

Change-Id: I2c38c7ec080bc836e77857af3a6d3ef02345a120
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

drm/rockchip: fix race with kms hotplug and fbdev

Kms hotplug event may race into fbdev helper initial, that would
cause the bug:

[    0.735411] [00000200] *pgd=00000000f6ffe003, *pud=00000000f6ffe003, *pmd=0000000000000000
[    0.736156] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[    0.736648] Modules linked in:
[    0.736930] CPU: 2 PID: 20 Comm: kworker/2:0 Not tainted 4.4.41 #20
[    0.737480] Hardware name: Rockchip RK3399 Board rev2 (BOX) (DT)
[    0.738020] Workqueue: events cdn_dp_pd_event_work
[    0.738447] task: ffffffc0f21f3100 ti: ffffffc0f2218000 task.ti: ffffffc0f2218000
[    0.739109] PC is at mutex_lock+0x14/0x44
[    0.739469] LR is at drm_fb_helper_hotplug_event+0x30/0x114
[    0.756253] [<ffffff8008a344f4>] mutex_lock+0x14/0x44
[    0.756260] [<ffffff8008445708>] drm_fb_helper_hotplug_event+0x30/0x114
[    0.756271] [<ffffff8008473c84>] rockchip_drm_output_poll_changed+0x18/0x20
[    0.756280] [<ffffff8008439fcc>] drm_kms_helper_hotplug_event+0x28/0x34
[    0.756286] [<ffffff800846c444>] cdn_dp_pd_event_work+0x394/0x3c4
[    0.756295] [<ffffff80080b2b38>] process_one_work+0x218/0x3e0
[    0.756302] [<ffffff80080b3538>] worker_thread+0x2e8/0x404
[    0.756308] [<ffffff80080b7e70>] kthread+0xe8/0xf0
[    0.756316] [<ffffff8008082690>] ret_from_fork+0x10/0x40

Change-Id: I8d594183cf8187131418a0096dde840cbf01ed6b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: dw_hdmi: get rid of clock slop

Clock slop is a solution for rk3288, not suitable for rk3399,
after use crtc mode_valid, we can remove the clock slop.

Change-Id: I68121505dfb7e65bf09c26d51c23edc909bdb517
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: cdn-dp: check display mode with crtc mode valid

Change-Id: I431ae8e56c18b827e1995ce0dec125c585d096f9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: dw_hdmi: check display mode with crtc mode valid

Change-Id: I23470e46b97169da0b59153dfc0835833f1aa549
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: vop: support mode_valid for crtc

Change-Id: I51f2377c5bd4bdecf44ad31f11e4e7131c2c10c1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: dts: rk3399-android-next: add cdn display node

Change-Id: I3c940e330ceab488da3d4351de3a3f9500a6fb5e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: dts: rk3399-android-next: use status disabled instead delete node

Change-Id: Ia959ade5dda6f22682293494bafb45bdccba02be
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm: of: don't mask possible_crtcs if remote-point is disabled

Change-Id: I98d42ce5c9a5ed832e455a3d1fc88cf3ec717d69
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ASoC: rockchip: i2s: add other configurable formats

simple-audio-card,bitclock-inversion = <1> : bclk falling edge taken
simple-audio-card,format = "dsp_a" : pcm no delay mode
simple-audio-card,format = "dsp_b" : pcm late 1 mode

Change-Id: I3d99fd04ee63dec46eb74c625b1e43e698092fe5
Signed-off-by: zhangjun <zhangjun@rock-chips.com>

UPSTREAM: PCI: rockchip: Mark PM functions as __maybe_unused

When CONFIG_PM_SLEEP is disabled, we get harmless build warnings:

host/pcie-rockchip.c:1267:12: error: 'rockchip_pcie_resume_noirq'
defined but not used [-Werror=unused-function]
host/pcie-rockchip.c:1240:12: error: 'rockchip_pcie_suspend_noirq'
defined but not used [-Werror=unused-function]

Marking both functions as __maybe_unused avoids the warning without
the need for #ifdef around them.

Change-Id: Ic5f9f9d576049b77fd091488c785d09c46cb9b78
Fixes: 013dd3d5e183 ("PCI: rockchip: Add system PM support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git
commit 0b351c986a5ffedb502632c1b27690c9730d79c4)