Bugfix: this allows multiclasses to have default arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30798 91177308-0d34-0410-b5e6-96231b3b80d8

simplify pack and shift intrinsics with multiclasses

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30797 91177308-0d34-0410-b5e6-96231b3b80d8

Use a multiclass to simplify 'SSE2 Integer comparison'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30796 91177308-0d34-0410-b5e6-96231b3b80d8

move class defns close to uses to make it easier to read

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30795 91177308-0d34-0410-b5e6-96231b3b80d8

simplify horizontal op definitions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30794 91177308-0d34-0410-b5e6-96231b3b80d8

remove more unneeded type info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30793 91177308-0d34-0410-b5e6-96231b3b80d8

remove unneeded definitions and type info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30792 91177308-0d34-0410-b5e6-96231b3b80d8

remove some unneeded type info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30791 91177308-0d34-0410-b5e6-96231b3b80d8

simplify patterns by merging in operand info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30790 91177308-0d34-0410-b5e6-96231b3b80d8

Factor operands into packed unary classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30789 91177308-0d34-0410-b5e6-96231b3b80d8

remove dead/duplicate instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30788 91177308-0d34-0410-b5e6-96231b3b80d8

Pull operand info up into parent class for scalar sse intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30787 91177308-0d34-0410-b5e6-96231b3b80d8

convert the sole sd unary intrinsic to a multiclass for consistency

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30786 91177308-0d34-0410-b5e6-96231b3b80d8

pull operand string into the multiclass

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30785 91177308-0d34-0410-b5e6-96231b3b80d8

Remove RSQRTSS[rm] RCPSS[rm], which are dead.

Introduce SS_IntUnary, a multiclass to replace SS_Int[rm].

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30784 91177308-0d34-0410-b5e6-96231b3b80d8

eliminate redundancy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30783 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug legalizing zero-extending i64 loads into 32-bit loads.  The bottom
part was always forced to be sextload, even when we needed an zextload.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30782 91177308-0d34-0410-b5e6-96231b3b80d8

Set the jt section

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30781 91177308-0d34-0410-b5e6-96231b3b80d8

initialize ivar

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30780 91177308-0d34-0410-b5e6-96231b3b80d8

If a target uses a GOT, put it in the jt data section, not the text
section.  This will fix alpha when Andrew implements
AlphaTargetMachine::getTargetLowering().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30779 91177308-0d34-0410-b5e6-96231b3b80d8

Alpha uses a got

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30778 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for targets to declare that they use a GOT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30777 91177308-0d34-0410-b5e6-96231b3b80d8

jump tables handle pic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30776 91177308-0d34-0410-b5e6-96231b3b80d8

print labels even if a MBB doesn't have a corresponding LLVM BB, just don't
print the LLVM BB label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30775 91177308-0d34-0410-b5e6-96231b3b80d8

add optional input flag to FMRRD

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30774 91177308-0d34-0410-b5e6-96231b3b80d8

add support for calling functions that return double

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30771 91177308-0d34-0410-b5e6-96231b3b80d8

80 col violation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30770 91177308-0d34-0410-b5e6-96231b3b80d8

ugly codegen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30769 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a miscompilation of:

long long foo(long long X) {
  return (long long)(signed char)(int)X;
}

Instead of:

_foo:
        extsb r2, r4
        srawi r3, r4, 31
        mr r4, r2
        blr

we now produce:

_foo:
        extsb r4, r4
        srawi r3, r4, 31
        blr

This fixes a miscompilation in ConstantFolding.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30768 91177308-0d34-0410-b5e6-96231b3b80d8

fix some bugs affecting functions with no arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30767 91177308-0d34-0410-b5e6-96231b3b80d8

fix the stack alignment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30766 91177308-0d34-0410-b5e6-96231b3b80d8

add support for calling functions that have double arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30765 91177308-0d34-0410-b5e6-96231b3b80d8

Still need to support -mcpu=<> or cross compilation will fail. Doh.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30764 91177308-0d34-0410-b5e6-96231b3b80d8

Do away with CPU feature list. Just use CPUID to detect MMX, SSE, SSE2, SSE3, and 64-bit support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30763 91177308-0d34-0410-b5e6-96231b3b80d8

It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if it isn't inlined (at < -O3). Force it to be inlined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30762 91177308-0d34-0410-b5e6-96231b3b80d8

add an accessor

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30761 91177308-0d34-0410-b5e6-96231b3b80d8

MachineBasicBlock::splice was incorrectly updating parent pointers on
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30760 91177308-0d34-0410-b5e6-96231b3b80d8

Make use of getStore().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8

Add getStore() helper function to create ISD::STORE nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30758 91177308-0d34-0410-b5e6-96231b3b80d8

Don't crash if an MBB doesn't have an LLVM BB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30757 91177308-0d34-0410-b5e6-96231b3b80d8

use a const ref for passing the vector to ArgumentLayout

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30756 91177308-0d34-0410-b5e6-96231b3b80d8

implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS and LowerCALL
implement FMDRR
add support for f64 function arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30754 91177308-0d34-0410-b5e6-96231b3b80d8

Alias analysis code clean ups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30753 91177308-0d34-0410-b5e6-96231b3b80d8

add a new SimplifyDemandedVectorElts method, which works similarly to
SimplifyDemandedBits.  The idea is that some operations can be simplified if
not all of the computed elements are needed.  Some targets (like x86) have a
large number of intrinsics that operate on a single element, but pass other
elts through unmodified.  If those other elements are not needed, the
intrinsics can be simplified to scalar operations, and insertelement ops can
be removed.

This turns (f.e.):

ushort %Convert_sse(float %f) {
        %tmp = insertelement <4 x float> undef, float %f, uint 0                ; <<4 x float>> [#uses=1]
        %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1             ; <<4 x float>> [#uses=1]
        %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, uint 2           ; <<4 x float>> [#uses=1]
        %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, uint 3           ; <<4 x float>> [#uses=1]
        %tmp28 = tail call <4 x float> %llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > )               ; <<4 x float>> [#uses=1]
        %tmp37 = tail call <4 x float> %llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > )               ; <<4 x float>> [#uses=1]
        %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > )               ; <<4 x float>> [#uses=1]
        %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer )          ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 )              ; <int> [#uses=1]
        %tmp69 = cast int %tmp to ushort                ; <ushort> [#uses=1]
        ret ushort %tmp69
}

into:

ushort %Convert_sse(float %f) {
entry:
        %tmp28 = sub float %f, 1.000000e+00             ; <float> [#uses=1]
        %tmp37 = mul float %tmp28, 5.000000e-01         ; <float> [#uses=1]
        %tmp375 = insertelement <4 x float> undef, float %tmp37, uint 0         ; <<4 x float>> [#uses=1]
        %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > )           ; <<4 x float>> [#uses=1]
        %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > )            ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 )              ; <int> [#uses=1]
        %tmp69 = cast int %tmp to ushort                ; <ushort> [#uses=1]
        ret ushort %tmp69
}

which improves codegen from:

_Convert_sse:
        movss LCPI1_0, %xmm0
        movss 4(%esp), %xmm1
        subss %xmm0, %xmm1
        movss LCPI1_1, %xmm0
        mulss %xmm0, %xmm1
        movss LCPI1_2, %xmm0
        minss %xmm0, %xmm1
        xorps %xmm0, %xmm0
        maxss %xmm0, %xmm1
        cvttss2si %xmm1, %eax
        andl $65535, %eax
        ret

to:

_Convert_sse:
        movss 4(%esp), %xmm0
        subss LCPI1_0, %xmm0
        mulss LCPI1_1, %xmm0
        movss LCPI1_2, %xmm1
        minss %xmm1, %xmm0
        xorps %xmm1, %xmm1
        maxss %xmm1, %xmm0
        cvttss2si %xmm0, %eax
        andl $65535, %eax
        ret

This is just a first step, it can be extended in many ways.  Testcase here:
Transforms/InstCombine/vec_demanded_elts.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30752 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30751 91177308-0d34-0410-b5e6-96231b3b80d8

Add insertelement/extractelement helper ctors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30750 91177308-0d34-0410-b5e6-96231b3b80d8

Lower some min/max idioms to minss/maxss when unsafe fp math is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30748 91177308-0d34-0410-b5e6-96231b3b80d8

Check that jump tables wind up in the rodata section

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30747 91177308-0d34-0410-b5e6-96231b3b80d8

remove JumpTableTextSection

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30746 91177308-0d34-0410-b5e6-96231b3b80d8

Don't bother setting JumpTableTextSection, it is about to disappear

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30745 91177308-0d34-0410-b5e6-96231b3b80d8

Emit pic jumptables to the same section that the function is emitted to,
allowing label differences to work.  This fixes CodeGen/X86/pic_jumptable.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30744 91177308-0d34-0410-b5e6-96231b3b80d8

Verify that jump tables are emitted to the same section as the function is,
when codegen'ing in pic mode.  This fixes a miscompilation of a switch stmt
in a template, as the template goes to a non-.text section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8

Pass the MachineFunction into EmitJumpTableInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30742 91177308-0d34-0410-b5e6-96231b3b80d8

implement and use getSectionForFunction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30741 91177308-0d34-0410-b5e6-96231b3b80d8

Use getSectionForFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30740 91177308-0d34-0410-b5e6-96231b3b80d8

Use getSectionForFunction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30739 91177308-0d34-0410-b5e6-96231b3b80d8

use getSectionForFunction to decide which section to emit code into

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30738 91177308-0d34-0410-b5e6-96231b3b80d8

Implement getSectionForFunction, use it when printing function body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30737 91177308-0d34-0410-b5e6-96231b3b80d8

move getSectionForFunction to AsmPrinter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30736 91177308-0d34-0410-b5e6-96231b3b80d8

Move getSectionForFunction to AsmPrinter, change it to return a string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30735 91177308-0d34-0410-b5e6-96231b3b80d8

move getSectionForFunction to AsmPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30734 91177308-0d34-0410-b5e6-96231b3b80d8

implement DarwinTargetAsmInfo::getSectionForFunction, use it when outputting
function bodies

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30733 91177308-0d34-0410-b5e6-96231b3b80d8

Give TargetAsmInfo a virtual dtor, add a new getSectionForFunction method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30732 91177308-0d34-0410-b5e6-96231b3b80d8

emit jump table before debug info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30731 91177308-0d34-0410-b5e6-96231b3b80d8

Always emit the jump table after the function so it's part of the same 'atom'
as the function body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30730 91177308-0d34-0410-b5e6-96231b3b80d8

getFilename/getDirectory shouldn't abort if the global has no init.  This
can happen on bugpoint reduced testcases f.e..

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30729 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some typos that can cause a flag value to have more than one use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30727 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a static dtor issue

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30726 91177308-0d34-0410-b5e6-96231b3b80d8

Fix more static dtor issues

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30725 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some more static dtor issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30724 91177308-0d34-0410-b5e6-96231b3b80d8

Added option -disable-x86-shuffle-opti to disable X86 specific vector shuffle optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30723 91177308-0d34-0410-b5e6-96231b3b80d8

Formating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30722 91177308-0d34-0410-b5e6-96231b3b80d8

More extensive alias analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30721 91177308-0d34-0410-b5e6-96231b3b80d8

More long term solution

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30720 91177308-0d34-0410-b5e6-96231b3b80d8

Pattern match min/max nodes when we have sse.  This implements
CodeGen/X86/scalar_sse_minmax.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30719 91177308-0d34-0410-b5e6-96231b3b80d8

pattern match min/max nodes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30718 91177308-0d34-0410-b5e6-96231b3b80d8

add a note :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30717 91177308-0d34-0410-b5e6-96231b3b80d8

This case isn't implemented yet.  It seems unlikely to be needed, but if it
ever is, we want to get an assert instead of silent bad codegen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30716 91177308-0d34-0410-b5e6-96231b3b80d8

Work around for some problems with templates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30715 91177308-0d34-0410-b5e6-96231b3b80d8

Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8

Use $( $| $) to represent alternatives in asm blocks instead of {|}.  This
is needed to support targets where {|} aren't special symbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30712 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an obvious typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30711 91177308-0d34-0410-b5e6-96231b3b80d8

Bugfixes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30709 91177308-0d34-0410-b5e6-96231b3b80d8

Print the MBB ID # along with the bb tag in the -print-machine-instrs output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30708 91177308-0d34-0410-b5e6-96231b3b80d8

ADd a method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30707 91177308-0d34-0410-b5e6-96231b3b80d8

Provide a function that ensures MBB numbering is dense and inorder.  This
can be used by MachineFunctionPasses who need this property.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30706 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify logic further.
Ensure that we copy KnownProperties before calling visitBasicBlock, else
we may leak properties into blocks where they don't belong.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30705 91177308-0d34-0410-b5e6-96231b3b80d8

Implement floating point constants

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30704 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR933 and CodeGen/X86/2006-10-02-BoolRetCrash.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30703 91177308-0d34-0410-b5e6-96231b3b80d8

testcase for PR933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30702 91177308-0d34-0410-b5e6-96231b3b80d8

clean up use of 'explicit'.  This is PR934.
Patch contributed by Kevin Sopp!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30701 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify, now that predsimplify depends on break-crit-edges.
Fix SwitchInst where dest-block is the same as one of the cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30700 91177308-0d34-0410-b5e6-96231b3b80d8

Move break-crit-edges before the predicate simplifier. Allows us to
optimize in more cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30699 91177308-0d34-0410-b5e6-96231b3b80d8

Revert previous patch. Still breaking things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30698 91177308-0d34-0410-b5e6-96231b3b80d8

Fix for PR929. The PHI nodes were being gone through for each instruction
in a successor block for every block...resulting in some O(N^k) algorithm
which wasn't very good for performance. Calculating this information up
front and keeping it in a map made it much faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30697 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR932 and Analysis/Dominators/2006-10-02-BreakCritEdges.ll:
The critical edge block dominates the dest block if the destblock dominates
all edges other than the one incoming from the critical edge.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30696 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase for PR932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30695 91177308-0d34-0410-b5e6-96231b3b80d8

These don't have immediate operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30694 91177308-0d34-0410-b5e6-96231b3b80d8

Move DominatorTree to immediately follow DominatorTreeBase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30693 91177308-0d34-0410-b5e6-96231b3b80d8

fix the names of the 64bit fp register
initial support for returning 64bit floating point numbers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30692 91177308-0d34-0410-b5e6-96231b3b80d8