CMake: Eliminate unused checks and #undef(s) as below;

STACK_DIRECTION
YYTEXT_POINTER
HAVE_NAMESPACES
HAVE_STD_ITERATOR
HAVE_FWD_ITERATOR
HAVE_BI_ITERATOR
HAVE_GLOBAL_HASH_MAP
HAVE_GLOBAL_HASH_SET
HAVE_GNU_EXT_HASH_MAP
HAVE_GNU_EXT_HASH_SET
HAVE_STD_EXT_HASH_MAP
HAVE_STD_EXT_HASH_SET

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137423 91177308-0d34-0410-b5e6-96231b3b80d8

MachOWriter: Don't crash on fixups with arithmetic, emit a relocation instead. This matches what as does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137414 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Config/llvm-config.h: Reorder and reword to follow (generated) config.h.in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137413 91177308-0d34-0410-b5e6-96231b3b80d8

configure: Update since r136721.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137412 91177308-0d34-0410-b5e6-96231b3b80d8

Fix up this paragraph (including a nasty typo).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137408 91177308-0d34-0410-b5e6-96231b3b80d8

findDeadCallerSavedReg fix: Missing NULL terminator in register arrays.

Fix by Ivan Baev. Sorry I don't have a unit test, but the fix is obvious so I don't want to delay it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137404 91177308-0d34-0410-b5e6-96231b3b80d8

Clarify the definition of SequentiallyConsistent operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137403 91177308-0d34-0410-b5e6-96231b3b80d8

Don't convert objc_autoreleaseReturnValue to objc_autorelease if the result
is returned through a bitcast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137402 91177308-0d34-0410-b5e6-96231b3b80d8

A virtual destructor for the class with virtual methods!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137400 91177308-0d34-0410-b5e6-96231b3b80d8

Don't let arbitrary calls disrupt nested retain+release pairs if
the retains and releases all use the same SSA pointer value.

Also, don't let CFG hazards disrupt nested retain+release pair
optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137399 91177308-0d34-0410-b5e6-96231b3b80d8

Use an actual reverse-CFG reverse-postorder for the bottom-up traversal,
rather than plain postorder, so that CFG constructs like single-exit loops
are reliably visited in a sensible order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137398 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify the interference checking code a bit.

This is possible now that we now longer provide an interface to iterate
the interference overlaps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137397 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up formatting a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137393 91177308-0d34-0410-b5e6-96231b3b80d8

ARM vector compare to zero instruction assembly parsing support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8

Fix mismatched tag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137388 91177308-0d34-0410-b5e6-96231b3b80d8

Revision to Atomics guide, per Chris's comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137386 91177308-0d34-0410-b5e6-96231b3b80d8

A slew of unit tests for the recent LoopInfo::updateUnloop feature
checked in at r137276 and r137341.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137385 91177308-0d34-0410-b5e6-96231b3b80d8

Allow loop unrolling to get known trip counts from ScalarEvolution.

SCEV unrolling can unroll loops with arbitrary induction variables. It
is a prerequisite for -disable-iv-rewrite performance. It is also
easily handles loops of arbitrary structure including multiple exits
and is generally more robust.

This is under a temporary option to avoid affecting default
behavior for the next couple of weeks. It is needed so that I can
checkin unit tests for updateUnloop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137384 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the InterferenceResult class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137381 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate the last use of InterferenceResult.

The Query class now holds two iterators instead of an InterferenceResult
instance. The iterators are used as bookmarks for repeated
collectInterferingVRegs calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137380 91177308-0d34-0410-b5e6-96231b3b80d8

Enclose directive .cprestore with .set macro and nomacro to silence assembler
warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137378 91177308-0d34-0410-b5e6-96231b3b80d8

Fix tests per now-correct encoding as of r137371.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137376 91177308-0d34-0410-b5e6-96231b3b80d8

Remove no-longer-true comments. These are for the assembler, also.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137375 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STRT assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8

Make the USAT16 operand decoder auto-generate-able.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137371 91177308-0d34-0410-b5e6-96231b3b80d8

Add another accidentally omitted predicate operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137370 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing predicate operand on SMLA and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137368 91177308-0d34-0410-b5e6-96231b3b80d8

ARM load shifted register pre-index fix shift value asm parser encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8

DataTypes.h.cmake: Tweak INT32_MIN for MSVC. MSC treats -2147483648 as -(2147483648U).

It caused an unexpected behavior since r137254.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137365 91177308-0d34-0410-b5e6-96231b3b80d8

Handle new register classes in Thumb2 mode.  Should fix the ARM buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137364 91177308-0d34-0410-b5e6-96231b3b80d8

Making SEL decodings auto-generate-able.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137363 91177308-0d34-0410-b5e6-96231b3b80d8

Add a dag combine to xform 256-bit shuffles into simple vector
inserts and extracts. This simple combine makes us generate only 1
instruction instead of 11 in the v8 case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137362 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the test added by Nadav in r137308. Make it more strict:
1) check for the "v" version of movaps
2) add a couple of CHECK-NOT to guarantee the behavior
3) move to a more appropriate test file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137361 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137359 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STRHT assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137358 91177308-0d34-0410-b5e6-96231b3b80d8

Fix decoding support for STREXD and LDREXD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137356 91177308-0d34-0410-b5e6-96231b3b80d8

Remove more dead code.

collectInterferingVRegs will be the primary function for interference
checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137354 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STRH assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137353 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typos in comments, and delete an unused function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137352 91177308-0d34-0410-b5e6-96231b3b80d8

Add isIndirectBranch flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137351 91177308-0d34-0410-b5e6-96231b3b80d8

Privatize an unused part of the LiveIntervalUnion::Query interface.

No clients are iterating over interference overlaps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137350 91177308-0d34-0410-b5e6-96231b3b80d8

Fix decoding for indexed STRB and LDRB.  Fixes <rdar://problem/9926161>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137347 91177308-0d34-0410-b5e6-96231b3b80d8

Remove some dead code.

The InterferenceResult iterator turned out to be less important than we
thought it would be.  LiveIntervalUnion clients want higher level
information, like the list of interfering virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137346 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up. Remove unused template parameter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137345 91177308-0d34-0410-b5e6-96231b3b80d8

Improve operand validation for Thumb2 addressing modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137344 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STRD assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137342 91177308-0d34-0410-b5e6-96231b3b80d8

Fix for LoopInfo::updateUnloop. Remove subloop blocks from former
ancestor loops.

I have a unit test that depends on scev-unroll, which unfortunately
isn't checked in. But I will check it in when I can.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137341 91177308-0d34-0410-b5e6-96231b3b80d8

Continue to tighten decoding by performing more operand validation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137340 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137339 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STRBT assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8

Add FIXME.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137336 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STRB assembly parsing and encoding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137335 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a copy/paste error so that LDRB(register) actually gets tested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137333 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STR(register) assembly parsing and encoding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137332 91177308-0d34-0410-b5e6-96231b3b80d8

ARM STR(immediate) assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137331 91177308-0d34-0410-b5e6-96231b3b80d8

Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137325 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR10492 by teaching MOVHLPS and MOVLPS mask matching to be more strict.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137324 91177308-0d34-0410-b5e6-96231b3b80d8

Tighten operand decoding of addrmode2 instruction.  The offset register cannot be PC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137323 91177308-0d34-0410-b5e6-96231b3b80d8

Correct immediate range for shifter operands.  Patch by James Molloy, with additional encoding fixes added by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137322 91177308-0d34-0410-b5e6-96231b3b80d8

Plug a memory leak.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137321 91177308-0d34-0410-b5e6-96231b3b80d8

Improve error checking in the new ARM disassembler.  Patch by James Molloy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137320 91177308-0d34-0410-b5e6-96231b3b80d8

ARM push of a single register encodes as pre-indexed STR.

Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup. Another thorough review by Nick!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137317 91177308-0d34-0410-b5e6-96231b3b80d8

ARM pop of a single register encodes as post-indexed LDR.

Per the ARM ARM, a 'pop' of a single register encodes as an LDR,
not an LDM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137316 91177308-0d34-0410-b5e6-96231b3b80d8

PTX: Add basic documentation to CodeGenerator.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137315 91177308-0d34-0410-b5e6-96231b3b80d8

Add a comment, per Bruno's CR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137313 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX] When joining  two XMM registers into a YMM register, make sure that the
lower XMM register gets in first. This will allow the SUBREG pattern to
elliminate the first vector insertion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137310 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX] If the data which is going to be saved is already in two XMM registers
(for example, after integer operation), do not pack the registers into a YMM
before saving. Its better to save as two XMM registers.

Before:
                vinsertf128         $1, %xmm3, %ymm0, %ymm3
                vinsertf128         $0, %xmm1, %ymm3, %ymm1
                vmovaps              %ymm1, 416(%rsp)

After:
                vmovaps              %xmm3, 416+16(%rsp)
                vmovaps              %xmm1, 416(%rsp)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137308 91177308-0d34-0410-b5e6-96231b3b80d8

add missing colon, thanks peter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137306 91177308-0d34-0410-b5e6-96231b3b80d8

fix PR10605 / rdar://9930964 by adding a pretty scary missed check.
It's somewhat surprising anything works without this.  Before we would
compile the testcase into:

test:                                   # @test
movl $4, 8(%rdi)
movl 8(%rdi), %eax
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp)          # 4-byte Spill
je .LBB0_2

now we produce:

test:                                   # @test
movl 8(%rdi), %eax
movl $4, 8(%rdi)
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp)          # 4-byte Spill
je .LBB0_2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137303 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup: Remove Int_ CVTSS2SI* forms

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137297 91177308-0d34-0410-b5e6-96231b3b80d8

Splats for v8i32/v8f32 can be handled by VPERMILPSY. This was causing
infinite recursive calls in legalize. Fix PR10562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137296 91177308-0d34-0410-b5e6-96231b3b80d8

Use the splat index to generate the desired shuffle. Otherwise we
could only get undefs and the vector shuffle becomes an undef,
generating wrong code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137295 91177308-0d34-0410-b5e6-96231b3b80d8

Fix X86TargetLowering::LowerExternalSymbol so that it actually works in non-trivial cases.  This hasn't been an issue before because the function isn't normally called (but apparently is used to generate a tail-call to sin() on ELF x86-32 with PIC and SSE2).

Fixes PR9693.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137292 91177308-0d34-0410-b5e6-96231b3b80d8

Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137286 91177308-0d34-0410-b5e6-96231b3b80d8

Stay within 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137283 91177308-0d34-0410-b5e6-96231b3b80d8

ARM LDRT assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137282 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up. 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137277 91177308-0d34-0410-b5e6-96231b3b80d8

Reapplying r136844.

An algorithm for incrementally updating LoopInfo within a
LoopPassManager. The incremental update should be extremely cheap in
most cases and can be used in places where it's not feasible to
regenerate the entire loop forest.

- "Unloop" is a node in the loop tree whose last backedge has been removed.
- Perform reverse dataflow on the block inside Unloop to propagate the
  nearest loop from the block's successors.
- For reducible CFG, each block in unloop is visited exactly
  once. This is because unloop no longer has a backedge and blocks
  within subloops don't change parents.
- Immediate subloops are summarized by the nearest loop reachable from
  their exits or exits within nested subloops.
- At completion the unloop blocks each have a new parent loop, and
  each immediate subloop has a new parent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137276 91177308-0d34-0410-b5e6-96231b3b80d8

ARM tests for LDRSHT assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137274 91177308-0d34-0410-b5e6-96231b3b80d8

ARM tests for LDRSH assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137272 91177308-0d34-0410-b5e6-96231b3b80d8

ARM tests for LDRSBT assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137271 91177308-0d34-0410-b5e6-96231b3b80d8

ARM tests for LDRSB assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137270 91177308-0d34-0410-b5e6-96231b3b80d8

Add FIXME.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137265 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup. Remove an extraneous GraphTraits specialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137264 91177308-0d34-0410-b5e6-96231b3b80d8

ARM tests for LDRHT assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137263 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/X86/opt-shuff-tstore.ll: Add explicit -mtriple=x86_64-linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137262 91177308-0d34-0410-b5e6-96231b3b80d8

ARM tests for LDRH(register) assembly parsing and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137261 91177308-0d34-0410-b5e6-96231b3b80d8

ARM LDRH(immediate) assembly parsing and encoding support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137260 91177308-0d34-0410-b5e6-96231b3b80d8

Add FIXME

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137258 91177308-0d34-0410-b5e6-96231b3b80d8

ARM LDRD(register) assembly parsing and encoding.

Add support for literal encoding of #-0 along the way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137254 91177308-0d34-0410-b5e6-96231b3b80d8

Distinguish between two copies of one inlined variable. Take 2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137253 91177308-0d34-0410-b5e6-96231b3b80d8

While extending definition range of a debug variable, consult lexical scopes also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137250 91177308-0d34-0410-b5e6-96231b3b80d8

Revert unintentional parts of previous check-in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137249 91177308-0d34-0410-b5e6-96231b3b80d8

Start using LexicalScopes utility. No intetional functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137246 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo. Not quite sure how that slipped in there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137245 91177308-0d34-0410-b5e6-96231b3b80d8

ARM LDRD(immediate) assembly parsing and encoding support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137244 91177308-0d34-0410-b5e6-96231b3b80d8

Changes per Jeffrey's comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137243 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the test. Add cpu target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137241 91177308-0d34-0410-b5e6-96231b3b80d8

When performing a truncating store, it is sometimes possible to rearrange the
data in-register prior to saving to memory.  When we reorder the data in memory
we prevent the need to save multiple scalars to memory, making a single regular
store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137238 91177308-0d34-0410-b5e6-96231b3b80d8