New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6494 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: FunctionResolve/2003-05-31-AllInternalDecls.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6486 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for: -o -

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6485 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6484 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase for behavior we depend on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6483 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: FuncResolve/2003-05-31-InternalDecl.ll
Count resolutions correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6482 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6481 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify funcresolve a bit more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6480 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: FunctionResolve/2003-05-31-FuncPointerResolve.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6479 91177308-0d34-0410-b5e6-96231b3b80d8

Add another testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6478 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6477 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed comment width, changed arg to be const, fixed indentation, removed unnecessary includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6476 91177308-0d34-0410-b5e6-96231b3b80d8

* Correct title
* Give credit to John for making the page

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6475 91177308-0d34-0410-b5e6-96231b3b80d8

*** empty log message ***

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6474 91177308-0d34-0410-b5e6-96231b3b80d8

Made a single common InvalidRegNum = -1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6473 91177308-0d34-0410-b5e6-96231b3b80d8

Renamed a variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6472 91177308-0d34-0410-b5e6-96231b3b80d8

Support for annul/pred and other future flags on op codes.
Support for recording the physical register for implcit references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6471 91177308-0d34-0410-b5e6-96231b3b80d8

Minor changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6470 91177308-0d34-0410-b5e6-96231b3b80d8

Added MachineCodeForInstruction object as an argument to
TmpInstruction constructors because every TmpInstruction object has
to be registered with a MachineCodeForInstruction to prevent leaks.
This simplifies the user's code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6469 91177308-0d34-0410-b5e6-96231b3b80d8

Allow explicit physical registers for implicit operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6468 91177308-0d34-0410-b5e6-96231b3b80d8

Changes to allow explicit physical register arguments that have been
preallocated.  While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6467 91177308-0d34-0410-b5e6-96231b3b80d8

Several bug fixes: globals in call operands were not being pulled out;
globals in some other places may not have been pulled out either;
globals in phi operands were being put just before the phi instead of
in the predecessor basic blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6466 91177308-0d34-0410-b5e6-96231b3b80d8

Extensive changes to the way code generation occurs for function
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6465 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting previous beautification changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6464 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed rewriting of branches -- they now work forward and backward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6463 91177308-0d34-0410-b5e6-96231b3b80d8

Removed useless code -- the byte order of output code is correct as is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6462 91177308-0d34-0410-b5e6-96231b3b80d8

The 'rd' register is consistently mentioned last in instruction definitions.
Created new classes from which instructions inherit their ordering of fields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6461 91177308-0d34-0410-b5e6-96231b3b80d8

* Put back into action SLL/SRL/SRA{r,i}6 instructions
* Fixed page numbers referring to the Sparc manual

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6460 91177308-0d34-0410-b5e6-96231b3b80d8

Code beautification, no functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6459 91177308-0d34-0410-b5e6-96231b3b80d8

3 more bugs from the SPEC codes and from richards_benchmark.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6458 91177308-0d34-0410-b5e6-96231b3b80d8

Enabling some of these passes causes lli to break

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6457 91177308-0d34-0410-b5e6-96231b3b80d8

The actual order of parameters in a 2-reg-immediate assembly instructions is
"rs1, imm, rd": most importantly, rd goes last.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6456 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6454 91177308-0d34-0410-b5e6-96231b3b80d8

Since malloc is no longer used, no need to free() memory.
Fixed BasicBlock patching by supplying correct type for the displacement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6453 91177308-0d34-0410-b5e6-96231b3b80d8

When converting virtual registers to immediate constants, change the opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6452 91177308-0d34-0410-b5e6-96231b3b80d8

Added saveBBreferences() for BasicBlock resolution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6451 91177308-0d34-0410-b5e6-96231b3b80d8

getValueOp() now takes a MachineInstr as well as a MachineOperand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6450 91177308-0d34-0410-b5e6-96231b3b80d8

Added:
* ability to save BasicBlock references to be resolved later
* register remappings from the enum values to the real hardware numbers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6449 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed the namespace to match SparcInternals.h; added notes on some missing
sections of instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6448 91177308-0d34-0410-b5e6-96231b3b80d8

The register types need to be visible outside of the class to be useful.
For one, converting register numbers based on class in the code emitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6447 91177308-0d34-0410-b5e6-96231b3b80d8

Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.
Code beautification for the rest of the code: changed layout to match the rest
of the code base.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6446 91177308-0d34-0410-b5e6-96231b3b80d8

Make LLI behave just like LLC with regard to the compile passes it uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6444 91177308-0d34-0410-b5e6-96231b3b80d8

Add SRoA pass to gccas

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6442 91177308-0d34-0410-b5e6-96231b3b80d8

Move indvars pass after mem2reg pass where it is more likely to be useful

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6441 91177308-0d34-0410-b5e6-96231b3b80d8

Okay totally give up on trying to optimize aggregates that cannot be completely
broken up into their elements.  Too many programs break because of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6440 91177308-0d34-0410-b5e6-96231b3b80d8

Made the register and immediate versions of instructions consecutive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6439 91177308-0d34-0410-b5e6-96231b3b80d8

add a check that allows the SRoA pass to avoid breaking programs, even if their
behavior is technically undefined

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6438 91177308-0d34-0410-b5e6-96231b3b80d8

Because the format of the shift instructions is `shift r, shcnt, r', the
instructions of format 3.12 and 3.13 cannot inherit from F3rdrs1, because that
implies that the two registers are the first two parameters to the instruction.

Thus I made the instructions inherit from F3rd again, and manually added an rs1
field AFTER the shcnt field in the instruction, which maps to the appropriate
place in the instruction.

The other changes are just elimination of unnecessary spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6437 91177308-0d34-0410-b5e6-96231b3b80d8

Sorry, correcting small typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6433 91177308-0d34-0410-b5e6-96231b3b80d8

Added configurable options for the Linker and Archiver.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6432 91177308-0d34-0410-b5e6-96231b3b80d8

Added the CloneTrace function which clones traces. It takes a vector of basic blocks, removes
internal phi nodes, and returns a new vector of basic blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6431 91177308-0d34-0410-b5e6-96231b3b80d8

Added support for cloning a trace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6430 91177308-0d34-0410-b5e6-96231b3b80d8

Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well.
SparcV9_F3.td: F3_12 and F3_13 instructions have rd and rs1 fields. Also,
 their fields were totally screwed up. This seems to fix the problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6429 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: ScalarRepl/2003-05-30-MultiLevel.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6428 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6427 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: ScalarRepl/2003-05-29-ArrayFail.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6425 91177308-0d34-0410-b5e6-96231b3b80d8

Fix call to mmap, so that it can be used on sparc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6424 91177308-0d34-0410-b5e6-96231b3b80d8

 so far everything compiles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6423 91177308-0d34-0410-b5e6-96231b3b80d8

Implementation of Equivalence Classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6422 91177308-0d34-0410-b5e6-96231b3b80d8

Changes to support function pointers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6421 91177308-0d34-0410-b5e6-96231b3b80d8

Added support for function pointers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6420 91177308-0d34-0410-b5e6-96231b3b80d8

Prevent lines from wrapping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6419 91177308-0d34-0410-b5e6-96231b3b80d8

Added documentation for the project options

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6418 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6417 91177308-0d34-0410-b5e6-96231b3b80d8

Get rid of extraneous ""s

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6416 91177308-0d34-0410-b5e6-96231b3b80d8

Add comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6415 91177308-0d34-0410-b5e6-96231b3b80d8

Initial checkin

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6414 91177308-0d34-0410-b5e6-96231b3b80d8

New testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6412 91177308-0d34-0410-b5e6-96231b3b80d8

Since there is now another derived .inc file, ignore them all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6411 91177308-0d34-0410-b5e6-96231b3b80d8

Use an absolute path to TableGen because not everyone (e.g. automatic tester)
has their path set up by this point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6410 91177308-0d34-0410-b5e6-96231b3b80d8

Added a path to the current version of the built TableGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6409 91177308-0d34-0410-b5e6-96231b3b80d8

Check in old tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6408 91177308-0d34-0410-b5e6-96231b3b80d8

Minor reordering of options

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6407 91177308-0d34-0410-b5e6-96231b3b80d8

Removed configuration options that are better served in Makefile.config.
Fixed the LibInstDir macro.
Added the use of the FLEX variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6405 91177308-0d34-0410-b5e6-96231b3b80d8

Moved the FLEX and BISON macros from Makefile.common since they are
configuration options like CC and CXX.
Updated LLVMGCCDIR so that it refers to the valid LLVM gcc code.
Added pathnames and flags to be used by some of the tests.
Moved configuration options from Makefile.common to here since they
should all be in one place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6404 91177308-0d34-0410-b5e6-96231b3b80d8

Added the target-independent part of TableGen data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6403 91177308-0d34-0410-b5e6-96231b3b80d8

Added project options to the Makefile.common

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6402 91177308-0d34-0410-b5e6-96231b3b80d8

Run more post-link xforms

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6400 91177308-0d34-0410-b5e6-96231b3b80d8

Change tests to use testrunner
new test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6399 91177308-0d34-0410-b5e6-96231b3b80d8

Fix formatting in file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6398 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate unnecessary ->get calls that are now automatically handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6397 91177308-0d34-0410-b5e6-96231b3b80d8

* Separate all of the grunt work of inlining out into the Utils library.
* Make the function inliner _significantly_ smarter.  :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6396 91177308-0d34-0410-b5e6-96231b3b80d8

Don't require the user to do something like isa<foo>(II->get()).  The ->get
should be implicit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6395 91177308-0d34-0410-b5e6-96231b3b80d8

dyn_cast_or_null should work just the same as dyn_cast does

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6394 91177308-0d34-0410-b5e6-96231b3b80d8

Doxygenify comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6393 91177308-0d34-0410-b5e6-96231b3b80d8

When TableGen finds an error in the SparcV9.td file, it exits with a non-zero
exit code. This, in turn, makes an empty file SparcV9CodeEmitter.inc, and only
much later, produces a link error because the key function that TableGen creates
isn't found.

Using a temporary file in the middle forces a good .INC file to be generated by
TableGen, and it will keep trying until you fix the input file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6392 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed misspelling and broke a line that was wrapping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6391 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed to use the correct format of the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6390 91177308-0d34-0410-b5e6-96231b3b80d8

This should work better with re-generating the SparcV9CodeEmitter.inc file.
Also, added a rule to delete the generated .inc file on `make clean'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6389 91177308-0d34-0410-b5e6-96231b3b80d8

* Broke up SparcV9.td into separate files as it was getting unmanageable
* Added some Format 4 classes, but not instructions
* Added notes on missing sections with FIXMEs
* Added RDCCR instr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6388 91177308-0d34-0410-b5e6-96231b3b80d8

mmap() seems to be failing on Sparc, so just use malloc()/free() .

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6387 91177308-0d34-0410-b5e6-96231b3b80d8

Output the opcode name of the instruction being emitted to cerr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6386 91177308-0d34-0410-b5e6-96231b3b80d8

Correctly write out binary data as chars, before they're cast to ints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6385 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed ordering of elements in instructions: although the binary instructions
list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is
instr rd, imm, rs1, and that is how they are constructed in the instruction
selector. This fixes the discrepancy.

Also fixed some comments along the same lines and fixed page numbers referring
to where instructions are described in the Sparc manual.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6384 91177308-0d34-0410-b5e6-96231b3b80d8

Add dependency to make TableGen rule fire.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6383 91177308-0d34-0410-b5e6-96231b3b80d8

Three kinds of boolean values handled incorrectly:
-- setCC of FP type used by a Phi: have to save in reg.
-- setNE of FP type used by a branch: cannot use result directly in branch!
-- setCC used outside the same basic block: have to save in reg. for now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6382 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed an error preventing compilation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6381 91177308-0d34-0410-b5e6-96231b3b80d8

Added the 'r' and 'i' annotations to instructions as their opcode names have
changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6380 91177308-0d34-0410-b5e6-96231b3b80d8

Added a debugging code emitter that prints code to a file, debug to std::cerr,
and passes the real code to a memory-outputting code emitter. This may be
removed at a later point in development.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6379 91177308-0d34-0410-b5e6-96231b3b80d8

Keep track of the current BasicBlock being processed so that a referencing
MachineInstr can later be patched up correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6378 91177308-0d34-0410-b5e6-96231b3b80d8