Reid Spencer [Mon, 19 Mar 2007 23:36:19 +0000 (23:36 +0000)]
Make this test a little simpler/faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35193
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Reid Spencer [Mon, 19 Mar 2007 23:28:16 +0000 (23:28 +0000)]
Add test case for PR1261, currently XFAILed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35192
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Devang Patel [Mon, 19 Mar 2007 22:21:25 +0000 (22:21 +0000)]
Document LoopPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35191
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Reid Spencer [Mon, 19 Mar 2007 21:29:50 +0000 (21:29 +0000)]
APIntify the isHighOnes utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35190
91177308-0d34-0410-b5e6-
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Reid Spencer [Mon, 19 Mar 2007 21:19:02 +0000 (21:19 +0000)]
Fix coding standards violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35189
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Reid Spencer [Mon, 19 Mar 2007 21:10:28 +0000 (21:10 +0000)]
Implement isMaxValueMinusOne in terms of APInt instead of uint64_t.
Patch by Sheng Zhou.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35188
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Reid Spencer [Mon, 19 Mar 2007 21:08:07 +0000 (21:08 +0000)]
Implement isMinValuePlusOne using facilities of APInt instead of uint64_t
Patch by Zhou Sheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35187
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Reid Spencer [Mon, 19 Mar 2007 21:04:43 +0000 (21:04 +0000)]
Implement isOneBitSet in terms of APInt::countPopulation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35186
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Reid Spencer [Mon, 19 Mar 2007 20:58:18 +0000 (20:58 +0000)]
1. Use APInt::getSignBit to reduce clutter (patch by Sheng Zhou)
2. Replace uses of the "isPositive" utility function with APInt::isPositive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35185
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Reid Spencer [Mon, 19 Mar 2007 20:47:50 +0000 (20:47 +0000)]
Remove a redundant clause in an if statement.
Patch by Sheng Zhou.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35184
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Reid Spencer [Mon, 19 Mar 2007 20:40:51 +0000 (20:40 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35183
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Reid Spencer [Mon, 19 Mar 2007 20:40:22 +0000 (20:40 +0000)]
Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned"
parameter on ConstantInt::get to indicate the signedness of the intended
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35182
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Reid Spencer [Mon, 19 Mar 2007 20:39:08 +0000 (20:39 +0000)]
Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as a
negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35181
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Reid Spencer [Mon, 19 Mar 2007 20:37:47 +0000 (20:37 +0000)]
Implement extension of sign bits for negative values in the uint64_t
constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35180
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Reid Spencer [Mon, 19 Mar 2007 20:36:48 +0000 (20:36 +0000)]
Add an indication of signedness to the uint64_t constructor so sign bits
can be extended. This helps fix test/Assembler/2007-03-19-NegValue.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35179
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Reid Spencer [Mon, 19 Mar 2007 20:35:26 +0000 (20:35 +0000)]
Test case noticed by Sheng that fails because negative values that are
greater than 64-bits don't have the sign bits extended on construction of
the APInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35178
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Anton Korobeynikov [Mon, 19 Mar 2007 20:19:08 +0000 (20:19 +0000)]
Fix mingw32 build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35177
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Duncan Sands [Mon, 19 Mar 2007 19:56:18 +0000 (19:56 +0000)]
Test handling of ARRAY_REF when the component type is of unknown size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35176
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Reid Spencer [Mon, 19 Mar 2007 18:41:37 +0000 (18:41 +0000)]
For PR1258:
Test that invalid numbered value references get an error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35175
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Reid Spencer [Mon, 19 Mar 2007 18:40:50 +0000 (18:40 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35174
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Reid Spencer [Mon, 19 Mar 2007 18:39:36 +0000 (18:39 +0000)]
For PR1248:
Eliminate support for type planes in numbered values. This simplifies the
data structures involved in managing forward definitions, etc. Instead of
requiring maps from type to value, we can now just use a vector of values.
These changes also required rewrites of some support functions such as
InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes
were made as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35173
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Reid Spencer [Mon, 19 Mar 2007 18:34:28 +0000 (18:34 +0000)]
Add and Operator== method to ValID so equality can be done properly for
named or numbered ValIDs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35172
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Reid Spencer [Mon, 19 Mar 2007 18:32:53 +0000 (18:32 +0000)]
For PR1258:
Radically simplify the SlotMachine. There is no need to keep Value planes
around any more. This change causes slot numbering to number all un-named,
non-void values starting at 0 and incrementing monotonically through the
function, regardless of type (including BasicBlocks). Getting slot numbers
is now a single lookup operation instead of a double lookup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35171
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Reid Spencer [Mon, 19 Mar 2007 18:27:35 +0000 (18:27 +0000)]
For PR1258:
Revise numeric value references to accommodate collapsed type planes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35170
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Chris Lattner [Mon, 19 Mar 2007 18:25:57 +0000 (18:25 +0000)]
fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35169
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Reid Spencer [Mon, 19 Mar 2007 18:25:55 +0000 (18:25 +0000)]
Use opt instead of gccas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35168
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Chris Lattner [Mon, 19 Mar 2007 18:25:48 +0000 (18:25 +0000)]
add a testcase the resent patches fail on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35167
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Reid Spencer [Mon, 19 Mar 2007 18:08:42 +0000 (18:08 +0000)]
Don't upgrade these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35166
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Evan Cheng [Mon, 19 Mar 2007 18:08:26 +0000 (18:08 +0000)]
Remove -reduce-joining-phys-regs options. Make it on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35165
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Duncan Sands [Mon, 19 Mar 2007 14:25:02 +0000 (14:25 +0000)]
Fix obvious typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35164
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Evan Cheng [Mon, 19 Mar 2007 07:48:02 +0000 (07:48 +0000)]
Fix naming inconsistencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163
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Evan Cheng [Mon, 19 Mar 2007 07:20:03 +0000 (07:20 +0000)]
Special LDR instructions to load from non-pc-relative constantpools. These are
rematerializable. Only used for constant generation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162
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Evan Cheng [Mon, 19 Mar 2007 07:09:02 +0000 (07:09 +0000)]
Constant generation instructions are re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161
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Evan Cheng [Mon, 19 Mar 2007 06:22:07 +0000 (06:22 +0000)]
Added isReMaterializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160
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Evan Cheng [Mon, 19 Mar 2007 06:20:37 +0000 (06:20 +0000)]
Recognize target instruction flag 'isReMaterializable'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159
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Evan Cheng [Mon, 19 Mar 2007 06:19:16 +0000 (06:19 +0000)]
Add a TargetInstrDescriptor flag to mark an instruction as "re-materializable".
It means the instruction can be easily re-materialized at any point. e.g.
constant generation, load from constantpool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35158
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Zhou Sheng [Mon, 19 Mar 2007 05:22:18 +0000 (05:22 +0000)]
Add isStrictPositive() to APInt to determine if this APInt Value > 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35156
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Evan Cheng [Mon, 19 Mar 2007 04:22:35 +0000 (04:22 +0000)]
Minor bug fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35153
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Chris Lattner [Mon, 19 Mar 2007 00:39:32 +0000 (00:39 +0000)]
fix a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152
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Chris Lattner [Mon, 19 Mar 2007 00:17:19 +0000 (00:17 +0000)]
add PR#
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35151
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Chris Lattner [Mon, 19 Mar 2007 00:16:43 +0000 (00:16 +0000)]
implement the next chunk of SROA with memset/memcpy's of aggregates. This
implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35150
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Chris Lattner [Mon, 19 Mar 2007 00:15:43 +0000 (00:15 +0000)]
add pr#
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35149
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Chris Lattner [Mon, 19 Mar 2007 00:11:30 +0000 (00:11 +0000)]
new testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35148
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Chris Lattner [Mon, 19 Mar 2007 00:09:00 +0000 (00:09 +0000)]
testcase for SROA with memset etc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35147
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Nick Lewycky [Sun, 18 Mar 2007 22:58:46 +0000 (22:58 +0000)]
Clean up this code and fix subtract miscompile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35146
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Chris Lattner [Sun, 18 Mar 2007 22:51:34 +0000 (22:51 +0000)]
Implement InstCombine/and-xor-merge.ll:test[12].
Rearrange some code to simplify it now that shifts are binops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35145
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Chris Lattner [Sun, 18 Mar 2007 22:50:57 +0000 (22:50 +0000)]
new testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35144
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Chris Lattner [Sun, 18 Mar 2007 22:41:33 +0000 (22:41 +0000)]
minor updates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143
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Nick Lewycky [Sun, 18 Mar 2007 14:37:20 +0000 (14:37 +0000)]
This is implemented. We now generate:
entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142
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Evan Cheng [Sun, 18 Mar 2007 09:05:55 +0000 (09:05 +0000)]
- Merge UsedBlocks info after two virtual registers are coalesced.
- Use distance to closest use to determine whether to abort coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141
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Evan Cheng [Sun, 18 Mar 2007 09:02:31 +0000 (09:02 +0000)]
Keep UsedBlocks info accurate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140
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Evan Cheng [Sun, 18 Mar 2007 03:26:04 +0000 (03:26 +0000)]
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35139
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Nick Lewycky [Sun, 18 Mar 2007 01:09:32 +0000 (01:09 +0000)]
Propagate ValueRanges across equality.
Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35138
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Anton Korobeynikov [Sat, 17 Mar 2007 14:48:06 +0000 (14:48 +0000)]
Silence warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35137
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Evan Cheng [Sat, 17 Mar 2007 09:29:54 +0000 (09:29 +0000)]
Track the BB's where each virtual register is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35135
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Evan Cheng [Sat, 17 Mar 2007 09:27:35 +0000 (09:27 +0000)]
Joining a live interval of a physical register with a virtual one can turn out
to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!
Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35134
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Evan Cheng [Sat, 17 Mar 2007 08:53:30 +0000 (08:53 +0000)]
Use SmallSet instead of std::set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35133
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Evan Cheng [Sat, 17 Mar 2007 08:22:49 +0000 (08:22 +0000)]
If sdisel has decided to sink GEP index expression into any BB. Replace all uses
in that BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35132
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Evan Cheng [Sat, 17 Mar 2007 03:18:32 +0000 (03:18 +0000)]
GEP index sink test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35131
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Devang Patel [Sat, 17 Mar 2007 00:14:52 +0000 (00:14 +0000)]
Test case for X86 inline asm constraint 'I'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35130
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Devang Patel [Sat, 17 Mar 2007 00:13:28 +0000 (00:13 +0000)]
Support 'I' inline asm constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129
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Lauro Ramos Venancio [Fri, 16 Mar 2007 22:54:16 +0000 (22:54 +0000)]
Only ARMv6 has BSWAP.
Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128
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Evan Cheng [Fri, 16 Mar 2007 18:32:30 +0000 (18:32 +0000)]
Turn on GEP index sinking by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35127
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Evan Cheng [Fri, 16 Mar 2007 17:50:20 +0000 (17:50 +0000)]
Stupid bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35126
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Bill Wendling [Fri, 16 Mar 2007 09:44:46 +0000 (09:44 +0000)]
And now support for MMX logical operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125
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Evan Cheng [Fri, 16 Mar 2007 08:46:27 +0000 (08:46 +0000)]
Sink a binary expression into its use blocks if it is a loop invariant
computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123
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Evan Cheng [Fri, 16 Mar 2007 08:43:56 +0000 (08:43 +0000)]
Added isLegalAddressExpression(). Only allows X +/- C for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122
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Evan Cheng [Fri, 16 Mar 2007 08:42:32 +0000 (08:42 +0000)]
Added isLegalAddressExpression hook to test if the given expression can be
folded into target addressing mode for the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121
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Evan Cheng [Fri, 16 Mar 2007 08:41:06 +0000 (08:41 +0000)]
These forward declarations are not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35120
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Nick Lewycky [Fri, 16 Mar 2007 02:37:39 +0000 (02:37 +0000)]
Add more comments and update to new asm syntax.
Add new micro-optimizations.
Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35119
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Bill Wendling [Thu, 15 Mar 2007 21:24:36 +0000 (21:24 +0000)]
Multiplication support for MMX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118
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Evan Cheng [Thu, 15 Mar 2007 21:19:28 +0000 (21:19 +0000)]
Debugging output stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35117
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Reid Spencer [Thu, 15 Mar 2007 03:26:42 +0000 (03:26 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35116
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Reid Spencer [Thu, 15 Mar 2007 03:25:34 +0000 (03:25 +0000)]
Revert last changes as they introduced other problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35115
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Evan Cheng [Wed, 14 Mar 2007 23:26:40 +0000 (23:26 +0000)]
ARM isel should match ldr x +/- x * (2^n) to ldr [x, +/- x, lsl #log2(n)].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35114
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Reid Spencer [Wed, 14 Mar 2007 23:13:06 +0000 (23:13 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35113
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Reid Spencer [Wed, 14 Mar 2007 23:11:45 +0000 (23:11 +0000)]
The sign information was not propagating into the rename map so only the
last entry stored in the map could be retrieved for a given integer type.
Propagating the sign information required an invasive change to ensure that
all ValueRef (ValID) instances get the right sign information as well. Also,
put in some assertions to ensure the RenameMap always gives us out the type
that is expected.
This fixes PR1256 and
test/Assembler/2007-03-14-UgpradeLocalSignless.ll
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Reid Spencer [Wed, 14 Mar 2007 23:08:04 +0000 (23:08 +0000)]
For PR1256:
Carry sign with ValID and make TypeInfo sortable (useful in a map).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35111
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Reid Spencer [Wed, 14 Mar 2007 23:07:24 +0000 (23:07 +0000)]
Test case for PR1256.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35110
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Evan Cheng [Wed, 14 Mar 2007 22:43:40 +0000 (22:43 +0000)]
Estimate a cost using the possible number of scratch registers required and use
it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35109
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Evan Cheng [Wed, 14 Mar 2007 22:11:11 +0000 (22:11 +0000)]
Under X86-64 large code model, do not emit 32-bit pc relative calls.
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Evan Cheng [Wed, 14 Mar 2007 21:03:53 +0000 (21:03 +0000)]
Notes about codegen issues.
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Duncan Sands [Wed, 14 Mar 2007 20:24:53 +0000 (20:24 +0000)]
Test that the size of a view converted object is determined by the target
type, not the source type.
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Evan Cheng [Wed, 14 Mar 2007 20:20:19 +0000 (20:20 +0000)]
Clean up.
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Evan Cheng [Wed, 14 Mar 2007 19:44:58 +0000 (19:44 +0000)]
Oops.
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Jim Laskey [Wed, 14 Mar 2007 19:32:21 +0000 (19:32 +0000)]
Change e-mail address.
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Jim Laskey [Wed, 14 Mar 2007 19:31:19 +0000 (19:31 +0000)]
Add link to exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35102
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Jim Laskey [Wed, 14 Mar 2007 19:30:33 +0000 (19:30 +0000)]
Adding credit for PPC changes.
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Jim Laskey [Wed, 14 Mar 2007 19:29:42 +0000 (19:29 +0000)]
First draft of exception handling doc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35100
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Jeff Cohen [Wed, 14 Mar 2007 15:27:17 +0000 (15:27 +0000)]
Make older versions of bison happy.
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Jeff Cohen [Wed, 14 Mar 2007 15:25:21 +0000 (15:25 +0000)]
Fix for VS 2005 problem supplied by Morten Ofstad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35098
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Evan Cheng [Wed, 14 Mar 2007 10:51:55 +0000 (10:51 +0000)]
X86-64 JIT is in large code model. Need stubs for direct calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097
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Evan Cheng [Wed, 14 Mar 2007 10:48:08 +0000 (10:48 +0000)]
x86-64 JIT stub codegen.
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Evan Cheng [Wed, 14 Mar 2007 10:44:30 +0000 (10:44 +0000)]
Preliminary support for X86-64 JIT stub codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095
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Zhou Sheng [Wed, 14 Mar 2007 09:07:33 +0000 (09:07 +0000)]
ShiftAmt might equal to zero. Handle this situation.
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Zhou Sheng [Wed, 14 Mar 2007 03:21:24 +0000 (03:21 +0000)]
Enable KnownZero/One.clear().
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Evan Cheng [Tue, 13 Mar 2007 23:31:47 +0000 (23:31 +0000)]
New test.
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Evan Cheng [Tue, 13 Mar 2007 23:26:41 +0000 (23:26 +0000)]
This got better.
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Evan Cheng [Tue, 13 Mar 2007 23:25:11 +0000 (23:25 +0000)]
Try schedule def + use closer whne Sethi-Ullman numbers are the same.
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4
Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2
This creates more short live intervals which work better with the register
allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35089
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Evan Cheng [Tue, 13 Mar 2007 21:05:54 +0000 (21:05 +0000)]
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2]
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