Implement the getHighBitsSet and getLowBitsSet functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35308 91177308-0d34-0410-b5e6-96231b3b80d8

Get the signs in the right place!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35307 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a link.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35306 91177308-0d34-0410-b5e6-96231b3b80d8

Undo the last change and make this really implement remainder and not
modulus. The previous change was a result of incorrect documentation in
the LangRef.html.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35305 91177308-0d34-0410-b5e6-96231b3b80d8

Flip the srem tests around. Previous commit was to correct an apparent
bug in the srem implementation. Turns out it was a documentation bug
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35304 91177308-0d34-0410-b5e6-96231b3b80d8

Correct the description of srem. remainder follows the dividend not the
divisor!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35303 91177308-0d34-0410-b5e6-96231b3b80d8

Correct the implementation of srem to be remainder, not modulus. The sign of
the result must follow the sign of the divisor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35302 91177308-0d34-0410-b5e6-96231b3b80d8

Fix incorrect test cases for srem. The definition of srem is a remainder so
that the sign of the result follows the sign of the divisor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35301 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up this interface:
1. Group similar methods into doxygen groups
2. Reorganize the groups into a consist flow.
3. Significantly improve the quality of the documentation on several methods
4. Rewrite srem and sdiv to eliminate a copy and improve readability.
5. Eliminate unneeded forward references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35300 91177308-0d34-0410-b5e6-96231b3b80d8

don't rely on ADL

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35299 91177308-0d34-0410-b5e6-96231b3b80d8

add a valuetype for v1i64, which is needed by mmx.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35298 91177308-0d34-0410-b5e6-96231b3b80d8

Make some codes more efficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35297 91177308-0d34-0410-b5e6-96231b3b80d8

add a bad case evan though of.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35296 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1205:
Convert some calls to ConstantInt::getZExtValue() into getValue() and
use APInt facilities in the subsequent computations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35294 91177308-0d34-0410-b5e6-96231b3b80d8

Adjust offset to compensate for big endian machines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35293 91177308-0d34-0410-b5e6-96231b3b80d8

Autodetect MMX & SSE stuff for AMD processors

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35292 91177308-0d34-0410-b5e6-96231b3b80d8

This is dead. DEAD I tells you!!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35291 91177308-0d34-0410-b5e6-96231b3b80d8

PR1260:
Add final support to get the QT example to compile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure SEXTLOAD of the specific type is supported on the target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8

Add more test cases for APIntified InstCombine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35288 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1205:
* APIntify visitAdd and visitSelectInst
* Remove unused uint64_t versions of utility functions that have been
  replaced with APInt versions.
This completes most of the changes for APIntification of InstCombine. This
passes llvm-test and llvm/test/Transforms/InstCombine/APInt.

Patch by Zhou Sheng.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35287 91177308-0d34-0410-b5e6-96231b3b80d8

Also replace uses of SRL if that's also folded during ReduceLoadWidth().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35286 91177308-0d34-0410-b5e6-96231b3b80d8

Add test case for testing InstCombine with arbitrary precision integer
types. These tests mimic the integer test cases in the normal InstCombine
test suite but use "strange" integer bit widths.

Most tests written by Zhou Sheng, a few by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35284 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1205:
APIntify visitDiv, visitMul and visitRem.

Patch by Zhou Sheng.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35283 91177308-0d34-0410-b5e6-96231b3b80d8

switch AddReachableCodeToWorklist from being recursive to being iterative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35282 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1205:
APIntify several utility functions supporting logical operators and shift
operators.

Patch by Zhou Sheng.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35281 91177308-0d34-0410-b5e6-96231b3b80d8

Add the 'explicit' keyword to several constructors that accept one
argument that don't appear intended as implicit-conversion operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35280 91177308-0d34-0410-b5e6-96231b3b80d8

Test handling of switches with wide case ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35279 91177308-0d34-0410-b5e6-96231b3b80d8

Fix constant fold of div by zero and rem by zero to match IEEE 754
requirements. We must return NaN in some cases and correctly signed
infinity in other cases. Passes CFP2006 (not that that says much).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35277 91177308-0d34-0410-b5e6-96231b3b80d8

Make the "KnownZero ^ TypeMask" computation just once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35276 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35275 91177308-0d34-0410-b5e6-96231b3b80d8

A couple of bug fixes for reducing load width xform:
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35274 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1205:
APInt support for logical operators in visitAnd, visitOr, and visitXor.

Patch by Zhou Sheng.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35273 91177308-0d34-0410-b5e6-96231b3b80d8

The -funcresolve and -raise options no longer exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35272 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1205:
* APIntify commonIntCastTransforms
* APIntify visitTrunc
* APIntify visitZExt

Patch by Zhou Sheng.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35271 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1205:
* Re-enable the APInt version of MaskedValueIsZero.
* APIntify the Comput{Un}SignedMinMaxValuesFromKnownBits functions
* APIntify visitICmpInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35270 91177308-0d34-0410-b5e6-96231b3b80d8

We generate a shufflevector instruction, so we don't need the builtin
intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35269 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup obsolete stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35268 91177308-0d34-0410-b5e6-96231b3b80d8

Be more explicit concerning argument sizes.
Use VC++ byteswap intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35267 91177308-0d34-0410-b5e6-96231b3b80d8

Support added for shifts and unpacking MMX instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8

Change uses of Function::front to Function::getEntryBlock for readability.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35265 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak non-debug builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35264 91177308-0d34-0410-b5e6-96231b3b80d8

Make this test actually match the generated code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35263 91177308-0d34-0410-b5e6-96231b3b80d8

Add noreturn function attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35262 91177308-0d34-0410-b5e6-96231b3b80d8

Add tests for nounwind and noreturn function attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35261 91177308-0d34-0410-b5e6-96231b3b80d8

Add the NoUnwind function attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35260 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35259 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for the noreturn and nounwind function attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35258 91177308-0d34-0410-b5e6-96231b3b80d8

Fix broken optimization disabled by a logic bug.

Analyze GEPs. If the indices are all zero, transfer whether the pointer is
known to be not null through the GEP.

Add a few more cases for xor and shift instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35257 91177308-0d34-0410-b5e6-96231b3b80d8

Preview nounwind function attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35256 91177308-0d34-0410-b5e6-96231b3b80d8

Another test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35255 91177308-0d34-0410-b5e6-96231b3b80d8

More opportunities to reduce load size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35254 91177308-0d34-0410-b5e6-96231b3b80d8

Test case for PR1257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35253 91177308-0d34-0410-b5e6-96231b3b80d8

Fix for PR1257. Bug in live range shortening as a result of copy coalescing
where the destination is dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35252 91177308-0d34-0410-b5e6-96231b3b80d8

Test case for PR1248

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35251 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1145:
Add the NoUnwindAttribute to allow explicit marking of functions that do
not unwind the stack via the unwind instruction. This is akin to gcc's
NoThrow attribute and used for optimizing exception handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35250 91177308-0d34-0410-b5e6-96231b3b80d8

More LangRef fixes. Corrected names of intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35249 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed va_arg example. Reported by Roman Samoilov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35248 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1248:
* Fix some indentation and comments in InsertRangeTest
* Add an "IsSigned" parameter to AddWithOverflow and make it handle signed
  additions. Also, APIntify this function so it works with any bitwidth.
* For the icmp pred ([us]div %X, C1), C2 transforms, exit early if the
  div instruction's RHS is zero.
* Finally, for icmp pred (sdiv %X, C1), -C2, fix an off-by-one error. The
  HiBound needs to be incremented in order to get the range test correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35247 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35246 91177308-0d34-0410-b5e6-96231b3b80d8

repair x86 performance, dejagnu problems from previous change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8

Add TODO list for MSIL backend

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35244 91177308-0d34-0410-b5e6-96231b3b80d8

Add Roman to credits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35243 91177308-0d34-0410-b5e6-96231b3b80d8

Let the new backend begin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35242 91177308-0d34-0410-b5e6-96231b3b80d8

add generation of unnecessary push/pop around calls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35241 91177308-0d34-0410-b5e6-96231b3b80d8

New test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35240 91177308-0d34-0410-b5e6-96231b3b80d8

fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35239 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35237 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1243:
Okay, really fix it this time. Make sure the CurFun.Linkage is set early
and consolidate some duplicate code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35236 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35235 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1256:
Make Signedness information pervasive throughout all types and values.
There is no easy way to get around this. Because the GEP instruction can
index through an arbitrarily complex value structure, it is necessary to
keep track of signedness information throughout that structure. This change
makes Signedness a full class, capable of representing Signedness in
arbitrarily shaped types. The class is then used throughout llvm-upgrade to
track signedness and differentiate between globals, locals, and functions
based on their signedness.

For PR1243:
This patch also removes bogus warnings about renaming internal globals. It
now only emits such warnings when renaming non-internal globals because
they may affect linkage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35234 91177308-0d34-0410-b5e6-96231b3b80d8

Protect R31's frame offset from being used by callee-saved registers, when R31
is the frame pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35233 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug in getAllOnesValue() which broke
some test cases for bitwidth > 64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35232 91177308-0d34-0410-b5e6-96231b3b80d8

Mark re-materializable instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35230 91177308-0d34-0410-b5e6-96231b3b80d8

Updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35229 91177308-0d34-0410-b5e6-96231b3b80d8

Potential spiller improvement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35228 91177308-0d34-0410-b5e6-96231b3b80d8

do not share old induction variables when this would result in invalid
instructions (that would have to be split later)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8

maintain LiveIn when splitting blocks (register scavenging needs it)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35226 91177308-0d34-0410-b5e6-96231b3b80d8

DominanceFrontier::calculate().
Avoid recursion, Use iterative algorithm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35225 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some VC++ warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35224 91177308-0d34-0410-b5e6-96231b3b80d8

Fix (and simplify) 48-bit byte swap.
Get pos/neg infinity the correct way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35223 91177308-0d34-0410-b5e6-96231b3b80d8

LoopSimplify::FindPHIToPartitionLoops()
Use ETForest instead of DominatorSet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35222 91177308-0d34-0410-b5e6-96231b3b80d8

LoopSimplify::FindPHIToPartitionLoops()
Use ETForest instead of DominatorSet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35221 91177308-0d34-0410-b5e6-96231b3b80d8

Code clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35220 91177308-0d34-0410-b5e6-96231b3b80d8

Minor bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35219 91177308-0d34-0410-b5e6-96231b3b80d8

bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:
    mov lr, pc
    bx lr
So, the function was not called.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-gcc now requires -fnested-functions to enable them in C.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35217 91177308-0d34-0410-b5e6-96231b3b80d8

Break up huge line so that this file is almost readable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35216 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35215 91177308-0d34-0410-b5e6-96231b3b80d8

Don't delete things before their last use (avoids bad reads).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35214 91177308-0d34-0410-b5e6-96231b3b80d8

CopyToReg source operand can be a physical register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35213 91177308-0d34-0410-b5e6-96231b3b80d8

Test handling of structs with multiple variable-sized fields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35212 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify isHighOnes().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35211 91177308-0d34-0410-b5e6-96231b3b80d8

Ada testcase for structs with multiple variable sized fields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35210 91177308-0d34-0410-b5e6-96231b3b80d8

Test that ARRAY_RANGE_REF returns an array not an element.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35209 91177308-0d34-0410-b5e6-96231b3b80d8

First cut trivial re-materialization support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35208 91177308-0d34-0410-b5e6-96231b3b80d8

Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35207 91177308-0d34-0410-b5e6-96231b3b80d8

New entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35206 91177308-0d34-0410-b5e6-96231b3b80d8

Added MRegisterInfo hook to re-materialize an instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8

Two changes:
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8