Add a new constructor to TargetData that builds a TargetData from its
string representation.

This is part of PR 761.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28234 91177308-0d34-0410-b5e6-96231b3b80d8

Two simplifications for token factor nodes: simplify tf(x,x) -> x.
simplify tf(x,y,y,z) -> tf(x,y,z).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28233 91177308-0d34-0410-b5e6-96231b3b80d8

New scheduling test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28232 91177308-0d34-0410-b5e6-96231b3b80d8

Add capability to scheduler to commute nodes for profit.
If a two-address code whose first operand has uses below, it should be commuted
when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8

Typo! How did we commute nodes before?!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28229 91177308-0d34-0410-b5e6-96231b3b80d8

For extra sanity checking, fill free'd memory with garbage so we know that
people aren't reusing machine code buffers at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28228 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some bugs in the freelist manipulation code.

Finally, implement ExecutionEngine::freeMachineCodeForFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28227 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor scheduler code. Move register-reduction list scheduler to a
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8

Significantly revamp allocation of machine code to use free lists, real
allocation policies and much more.  All this complexity, and we have no
functionality change, woo! :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28225 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor some code, making it simpler.
When doing the initial pass of constant folding, if we get a constantexpr,
simplify the constant expr like we would do if the constant is folded in the
normal loop.

This fixes the missed-optimization regression in
Transforms/InstCombine/getelementptr.ll last night.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28224 91177308-0d34-0410-b5e6-96231b3b80d8

Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28223 91177308-0d34-0410-b5e6-96231b3b80d8

Also add super- register class info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28222 91177308-0d34-0410-b5e6-96231b3b80d8

Also add super- register classes info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28221 91177308-0d34-0410-b5e6-96231b3b80d8

Set weight of zero length intervals to infinite to prevent them from being
spilled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28220 91177308-0d34-0410-b5e6-96231b3b80d8

Backing out previous check-in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28219 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some problems linking stuff in libTarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28218 91177308-0d34-0410-b5e6-96231b3b80d8

If the live interval legnth is essentially zero, i.e. in every live range
the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28217 91177308-0d34-0410-b5e6-96231b3b80d8

Update test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28216 91177308-0d34-0410-b5e6-96231b3b80d8

Two changes:

1. Implement InstCombine/deadcode.ll by not adding instructions in unreachable
   blocks (due to constants in conditional branches/switches) to the worklist.
   This causes them to be deleted before instcombine starts up, leading to
   better optimization.

2. In the prepass over instructions, do trivial constprop/dce as we go.  This
   has the effect of improving the effectiveness of #1.  In addition, it
   *significantly* speeds up instcombine on test cases with large amounts of
   constant folding code (for example, that produced by code specialization
   or partial evaluation).  In one example, it speeds up instcombine from
   0.0589s to 0.0224s with a release build (a 2.6x speedup).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28215 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase, check that dead code doesn't pessimize instcombine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28214 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the PowerPC JIT-only failure on UnitTests/Vector/sumarray-dbl, which is
really a bad codegen bug that LLC happens to get lucky with. I must chat with
Nate for the proper fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28213 91177308-0d34-0410-b5e6-96231b3b80d8

Templatify RegReductionPriorityQueue

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28212 91177308-0d34-0410-b5e6-96231b3b80d8

Add alloca/malloc ctors that don't take array sizes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28211 91177308-0d34-0410-b5e6-96231b3b80d8

Add an assertion for a common error

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28210 91177308-0d34-0410-b5e6-96231b3b80d8

Watch out for the following case:
1. Use expects a chain output.
2. Node is expanded into multiple target ops.
3. One of the inner node produces a chain, the outer most one doesn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28209 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a load folding bug. It is exposed by a multi- resulting instructions
def : Pat<> pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28208 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28207 91177308-0d34-0410-b5e6-96231b3b80d8

This method doesn't need to be virtual, thanks to Reid for pointing this out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28206 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a regression in my patch from last night that broke the llvmgcc4 build on
ppc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28205 91177308-0d34-0410-b5e6-96231b3b80d8

Indent .data/.text in the .s file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28204 91177308-0d34-0410-b5e6-96231b3b80d8

Another instruction scheduling test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28203 91177308-0d34-0410-b5e6-96231b3b80d8

Add pseudo dependency to force a def&use operand to be scheduled last (unless
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28201 91177308-0d34-0410-b5e6-96231b3b80d8

Debugging info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28200 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a completed entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28199 91177308-0d34-0410-b5e6-96231b3b80d8

Test case for PR770

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28198 91177308-0d34-0410-b5e6-96231b3b80d8

PR 770 - permit coallescing of registers in subset register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28197 91177308-0d34-0410-b5e6-96231b3b80d8

Added sub- register classes information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28196 91177308-0d34-0410-b5e6-96231b3b80d8

Add sub-register class information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28195 91177308-0d34-0410-b5e6-96231b3b80d8

Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28194 91177308-0d34-0410-b5e6-96231b3b80d8

Implement MASM sections correctly, without a "has masm sections flag" and a
bunch of special case code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28193 91177308-0d34-0410-b5e6-96231b3b80d8

Oh yeah, there are two of these now, unify both.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28192 91177308-0d34-0410-b5e6-96231b3b80d8

Setting SwitchToSectionDirective properly in the MASM backend permits a bunch
of code to be unified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28191 91177308-0d34-0410-b5e6-96231b3b80d8

MASM doesn't have one of these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28190 91177308-0d34-0410-b5e6-96231b3b80d8

Don't prefix section directives with a tab.  Doing so causes blank lines to
be emitted to the .s file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28189 91177308-0d34-0410-b5e6-96231b3b80d8

Make the masm codepath work like the normal code path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28188 91177308-0d34-0410-b5e6-96231b3b80d8

Preserve prior behavior

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28187 91177308-0d34-0410-b5e6-96231b3b80d8

The MASM asmprinter has been fixed, these hacks are no longer needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28186 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the MASM asmprinter's lies.  It does not want to emit code to .text/.data
it wants it emitted to _text/_data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28185 91177308-0d34-0410-b5e6-96231b3b80d8

Split SwitchSection into SwitchTo{Text|Data}Section methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28184 91177308-0d34-0410-b5e6-96231b3b80d8

Split SwitchSection into the SwitchTo{Text|Data}Section functions, to better
support assemblers that distinguish the two.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28183 91177308-0d34-0410-b5e6-96231b3b80d8

Some notes and thoughts to myself

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28182 91177308-0d34-0410-b5e6-96231b3b80d8

Patch to make some xforms preserve each other.  Patch contributed by
Domagoj Babic!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28181 91177308-0d34-0410-b5e6-96231b3b80d8

Use the -dumpversion option to llvm-gcc which gives us just the version #
and is unlikely to change in future releases. This also simplifies the
parsing of the full and major llvm-gcc version numbers in the script.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28180 91177308-0d34-0410-b5e6-96231b3b80d8

Move some methods out of line so that MutexGuard.h isn't needed in a public header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28179 91177308-0d34-0410-b5e6-96231b3b80d8

Move methods out of line so that MutexGuard.h isn't required in the header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28178 91177308-0d34-0410-b5e6-96231b3b80d8

Another bad case I noticed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28177 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28176 91177308-0d34-0410-b5e6-96231b3b80d8

Make the case I just checked in stronger.  Now we compile this:

short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8

Implement and_sext.ll:test3, generating:

_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28173 91177308-0d34-0410-b5e6-96231b3b80d8

Yet more readme updating

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28172 91177308-0d34-0410-b5e6-96231b3b80d8

Compile this:

short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8

New note about something bad happening in target independent optimizers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28170 91177308-0d34-0410-b5e6-96231b3b80d8

Proving once again that I am not as smart as the compiler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28169 91177308-0d34-0410-b5e6-96231b3b80d8

Fold more shifts into inserts, and update the README

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28168 91177308-0d34-0410-b5e6-96231b3b80d8

Fold shifts with undef operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28167 91177308-0d34-0410-b5e6-96231b3b80d8

When tracking demanded bits, if any bits from the sext of an SRA are demanded,
then so is the input sign bit.  This fixes mediabench/g721 on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8

Make emission of jump tables a bit less conservative; they are now required
to be only 31.25% dense, rather than 75% dense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28165 91177308-0d34-0410-b5e6-96231b3b80d8

Fixing truncate. Previously we were emitting truncate from r16 to r8 as
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28164 91177308-0d34-0410-b5e6-96231b3b80d8

Move the definition of value_use_iterator::getOperandNo to User.h where the
definition of the User class is available, this fixes the  build with some
compiler versions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28163 91177308-0d34-0410-b5e6-96231b3b80d8

Update some stuff now that the new rlwimi code has gone in

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28162 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR772

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28161 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unncessary include

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28160 91177308-0d34-0410-b5e6-96231b3b80d8

This test passes now, remove xfail marker

Change test to be a positive test instead of a negative test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28159 91177308-0d34-0410-b5e6-96231b3b80d8

Typo's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28158 91177308-0d34-0410-b5e6-96231b3b80d8

Unlike Unix, Windows won't let a file be implicitly replaced via renaming without explicit permission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28157 91177308-0d34-0410-b5e6-96231b3b80d8

New rlwimi implementation, which is superior to the old one. There are
still a couple missed optimizations, but we now generate all the possible
rlwimis for multiple inserts into the same bitfield.  More regression tests
to come.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28156 91177308-0d34-0410-b5e6-96231b3b80d8

Use ComputeMaskedBits to determine # sign bits as a fallback.  This allows us
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28155 91177308-0d34-0410-b5e6-96231b3b80d8

Add some more sign propagation cases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8

Apply bug fix supplied by Greg Pettyjohn for a bug he found:  '<invalid>' is not a legal path on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28153 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify some code, add a couple minor missed folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28152 91177308-0d34-0410-b5e6-96231b3b80d8

constant fold sign_extend_inreg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28151 91177308-0d34-0410-b5e6-96231b3b80d8

remove cases handled elsewhere

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8

Add some more simple sign bit propagation cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some loose ends in MASM support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28148 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase we handle right now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28147 91177308-0d34-0410-b5e6-96231b3b80d8

Use the new TargetLowering::ComputeNumSignBits method to eliminate
sign_extend_inreg operations.  Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:

short test(short X, short x) {
  int Y = X+x;
  return (Y >> 1);
}
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

into:

_test:
        add r2, r3, r4
        srawi r3, r2, 1
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test:
        add r2, r3, r4
        srawi r2, r2, 1
        extsh r3, r2
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r2, r2, 1
        extsh r3, r2
        blr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8

Add some really really simple code for computing sign-bit propagation.

This will certainly be enhanced in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8

Add some new methods for computing sign bit information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28144 91177308-0d34-0410-b5e6-96231b3b80d8

When inserting casts, be careful of where we put them.  We cannot insert
a cast immediately before a PHI node.

This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28143 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28142 91177308-0d34-0410-b5e6-96231b3b80d8

Move some code around.

Make the "fold (and (cast A), (cast B)) -> (cast (and A, B))" transformation
only apply when both casts really will cause code to be generated.  If one or
both doesn't, then this xform doesn't remove a cast.

This fixes Transforms/InstCombine/2006-05-06-Infloop.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28141 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase from ghostscript that inf looped instcombine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28140 91177308-0d34-0410-b5e6-96231b3b80d8

Teach the X86 backend about non-i32 inline asm register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8

Fold (trunc (srl x, c)) -> (srl (trunc x), c)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8

Fold trunc(any_ext).  This gives stuff like:

27,28c27
<       movzwl %di, %edi
<       movl %edi, %ebx
---
>       movw %di, %bx

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8

Shrink shifts when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8

Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8

Print a grouping around inline asm blocks so that we can tell when we are
using them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28134 91177308-0d34-0410-b5e6-96231b3b80d8

Print *some* grouping around inline asm blocks so we know where they are.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28133 91177308-0d34-0410-b5e6-96231b3b80d8