XiaoDong Huang [Mon, 22 May 2017 11:24:42 +0000 (19:24 +0800)]
soc: rockchip: support rk322x pm config
Change-Id: I29c5685f09a846b62196ab8614ebe168bfed75ef
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Elaine Zhang [Tue, 23 May 2017 09:45:33 +0000 (17:45 +0800)]
clk: rockchip: rk3328: add flag CLK_IGNORE_UNUSED for hclk_vop_niu
Change-Id: I770a83ad357f18d3258755b6c1d43ef82248951e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Elaine Zhang [Tue, 23 May 2017 03:07:12 +0000 (11:07 +0800)]
ARM64: dts: rockchip: rk3399-opp: fix up the gpu_opp_table
Change-Id: I2e13b74ce3ff8509753605b9b0a02fb1c8d0f765
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
wlq [Thu, 11 May 2017 10:05:01 +0000 (18:05 +0800)]
arm64: dts: rk3399: sapphire: set syr83x vsel gpio type input
Change-Id: I5c809885038e81570d993ebbc94ae757ba4b9acd
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Zorro Liu [Mon, 22 May 2017 03:48:57 +0000 (11:48 +0800)]
driver: sensor-dev: use copy_to_user&©_from_user to do the user point
Change-Id: Ibbff2eecc71643c95ae91d0cd8a8469fd43a3cea
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
chenjh [Thu, 18 May 2017 06:58:02 +0000 (14:58 +0800)]
power: rk818-charger: move irq init to the last step
init irq later than workqueue_struct and delayed_work to
avoid NULL ponint
Change-Id: I715296a715cb07149a6dce236a3b8ccafe00622e
Signed-off-by: chenjh <chenjh@rock-chips.com>
Mark Yao [Wed, 17 May 2017 09:44:55 +0000 (17:44 +0800)]
drm/rockchip: vop: support vop dump when iommu page fault
Change-Id: I164fc7e8cb7392143959d53709bcdf61713fb3d8
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Finley Xiao [Sat, 25 Mar 2017 09:34:08 +0000 (17:34 +0800)]
arm64: dts: rk3368: add dfi and dmc device nodes
Add dfi and dmc nodes in the device tree for the ARM64 rk3368 SoC.
To support ddr frequency scaling function, we need enable dmc and
dfi nodes.
Change-Id: I155b838a8773ff1842058bebb1ed2747ca8e2e0b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
chenjh [Wed, 17 May 2017 09:27:56 +0000 (17:27 +0800)]
power: rk818-charger: add TS2 voltage detect when update input current
rk818's input charge voltage limit function doesn't works well. If software
set input current over than charger's max support value, rk818 may cause
charger over current protect which means disconnecting.
To solve this problem, we need to detect vbus voltage by TS2 pin, if vbus
is upper than 4.4v, we can safely adjust input current step by step from
low to high until meeting the target input current value.
Change-Id: I01d63974f251ad8ef0037158b66f4b85d3928baf
Signed-off-by: chenjh <chenjh@rock-chips.com>
zhangjun [Thu, 18 May 2017 01:35:40 +0000 (09:35 +0800)]
ASoc: hdmi_codec: fix startup error when multicodecs are used
due to playback and capture will call startup at the same time
when voip call, but hdmi_codec driver only support playback
[ 51.134149] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[ 51.134179] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[ 51.134197] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
[ 51.143250] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[ 51.143277] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[ 51.143294] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
[ 51.157546] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[ 51.157584] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[ 51.157603] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
Change-Id: I970695dbe19f070579aacd044e6a01c44e687a2e
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
XiaoDong Huang [Thu, 18 May 2017 12:06:35 +0000 (20:06 +0800)]
arm64: dts: rk3368: add wakeup-config in rockchip-suspend
Change-Id: Ibf4ba154d59e99332e68ca5451b0045e15fa850d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
zzc [Thu, 18 May 2017 01:28:20 +0000 (09:28 +0800)]
net: wireless: rockchip_wlan: enable GET_CUSTOM_MAC_ENABLE
Change-Id: I544df96a365ab62b12388e5df3c2fcfa23204e32
Signed-off-by: zzc <zzc@rock-chips.com>
zzc [Tue, 16 May 2017 07:22:29 +0000 (15:22 +0800)]
arm64: rockchip_defconfig: fix softap error
fix error:
05-16 06:42:05.688 347 596 V NatController: runCmd(/system/bin/ip6tables -w -t raw -A natctrl_raw_PREROUTING -i wlan0 -m rpfilter --invert ! -s fe80::/64 -j DROP) res=1
05-16 06:42:05.726 347 596 E NatController: Error setting forward rules
05-16 06:42:05.791 602 622 E TetherInterfaceSM: Exception enabling Nat: java.lang.IllegalStateException: command '53 nat enable wlan0 eth0 1 192.168.43.0/24' failed with '400 53 Nat op
eration failed (No such device)'
05-16 06:42:05.794 347 841 D TetherController: Sending update msg to dnsmasq [update_ifaces|wlan0]
05-16 06:42:05.796 347 596 D TetherController: untetherInterface(wlan0)
Change-Id: Iae2ec50bef0915aecc1b2befb014a87731e61643
Signed-off-by: zzc <zzc@rock-chips.com>
Finley Xiao [Thu, 18 May 2017 08:28:56 +0000 (16:28 +0800)]
cpufreq: rockchip: fix warning caused by passing invalid cpu id
------------[ cut here ]------------
[ 105.026874] WARNING: at drivers/cpufreq.c:290
[ 105.026883] Modules linked in: pvrsrvkm(O)
[ 105.026900]
[ 105.026915] CPU: 0 PID: 1 Comm: init Tainted: G O 4.4.66 #1875
[ 105.026924] Hardware name: Rockchip Sheep board (DT)
[ 105.026937] task:
ffffffc07b490000 ti:
ffffffc07b484000 task.ti:
ffffffc07b484000
[ 105.026964] PC is at cpufreq_cpu_get+0x20/0x8c
[ 105.026978] LR is at cpufreq_update_policy+0x28/0x130
[ 105.026989] pc : [<
ffffff80088246bc>] lr : [<
ffffff80088273b8>]
pstate:
60400145
[ 105.026997] sp :
ffffffc07b487a60
[ 105.027004] x29:
ffffffc07b487a60 x28:
ffffffc07b484000
[ 105.027017] x27:
ffffff8008b82000 x26:
000000000000008e
[ 105.027028] x25:
000000000000011d x24:
0000000000000001
[ 105.027039] x23:
0000000000000008 x22:
0000000000000008
[ 105.027051] x21:
ffffff8009166000 x20:
ffffff800923cd50
[ 105.027063] x19:
ffffffc07a71c600 x18:
0000000000ffffeb
Change-Id: I45de2f755617a5a5903dc5f15e289f8705ceb80d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Jianqun Xu [Thu, 18 May 2017 01:12:32 +0000 (09:12 +0800)]
i2c: rk3x: fix to dev_warn_ratelimited
In some case, the log will look bad such as:
[ 12.393926] rk3x-i2c
ff150000.i2c: irq in STATE_IDLE, ipd = 0x51
[[[[[[[[[[[[.[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[
Let's limit the printk:
[ 180.446547] rk3x_i2c_irq:
1726030 callbacks suppressed
[ 180.446592] rk3x-i2c
ff150000.i2c: irq in STATE_IDLE, ipd = 0x51
Change-Id: Ie91163ad3085e5dba127790b50e3beb359510120
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
xiaoyao [Thu, 18 May 2017 01:16:09 +0000 (09:16 +0800)]
arm64: dts: rockchip: rk3328-evb: add gpio control for vcc_sd
Change-Id: Ib504aa0505bd6bea328c5fdd73d237baddcf17a5
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
William Wu [Wed, 17 May 2017 09:00:48 +0000 (17:00 +0800)]
arm: dts: rk322x-android: enable u2phy1 otg-port
Change-Id: Ib6caa6366704509ca5c708a6bfee0e9fc6d26abe
Signed-off-by: William Wu <william.wu@rock-chips.com>
William Wu [Wed, 17 May 2017 08:56:50 +0000 (16:56 +0800)]
arm: dts: rockchip: add u2phy1 otg-port node for rk322x SoC
Change-Id: I42efd4227428df38c643c174fb2babcd61064a72
Signed-off-by: William Wu <william.wu@rock-chips.com>
William Wu [Wed, 17 May 2017 08:34:38 +0000 (16:34 +0800)]
phy: rockchip-inno-usb2: add cfgs for phy1 port1 of rk322x SoC
This patch adds port configuration for usb2 phy1 port1 of rk322x
SoC. For the current rockchip inno usb2 phy driver framework, it
can only support usb2 phy which comprises with one otg-port and
one host-port.
However, rk322x SoC usb2 phy1 comprises with two host-ports, so
we use otg id index for phy1 port1 configuration, and make phy1
port1 work the same as otg-port host mode.
Change-Id: Iaa10c2438c6b7b052c7f3830252ba4ebd91ff23f
Signed-off-by: William Wu <william.wu@rock-chips.com>
Huang, Tao [Thu, 18 May 2017 02:51:27 +0000 (10:51 +0800)]
ARM: rockchip: Add workaround for unknown write of thread_info
We see the cpu of thread_info was changed by unknown reason sometimes,
which cause rq spinlock deadlock while schedule. Until we found the
root cause, we have to add this workaround.
Change-Id: Ib943ccb47a57fe4b267a1da853366363cd7f1f52
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Tang Yun ping [Tue, 16 May 2017 12:19:43 +0000 (20:19 +0800)]
PM / devfreq: rockchip_dmc: add unify params for ddr frequency scanning.
1. add unify params for ddr frequency scanning.
2. add dram side and phy side odt disable frequency configurate
independent.
Change-Id: Ied97dbee8d30a1a6e95d4c252986121092c484d8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Tue, 16 May 2017 12:11:32 +0000 (20:11 +0800)]
clk: rockchip: using unify parameters for ddr frequency scanning.
Change-Id: Ibd3befd3cd674af263402f6984ee6d605eb087c8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Finley Xiao [Tue, 16 May 2017 09:00:04 +0000 (17:00 +0800)]
cpufreq: rockchip: limit frequency when reboot
If i2c driver adds a shutdown callback function, the callback will be
executed before cpu's shutdown callback when reboot system, it will
fail to scale voltage like the following.
rk3x-i2c
ff650000.i2c: Access denied - device already shutdown
rk3x-i2c
ff650000.i2c: Access denied - device already shutdown
rk3x-i2c
ff650000.i2c: Access denied - device already shutdown
rk3x-i2c
ff650000.i2c: Access denied - device already shutdown
cpu cpu4: _set_opp_voltage: failed to set voltage
(950000 950000
1350000 mV):-5
So add a reboot notifier to limit frequency before i2c's shutdown callback,
and the cpu's shutdown callback will do nothing.
Change-Id: Ic5bb21b511c6f799dc62fd9db237d90522b7d4ee
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Zhangbin Tong [Tue, 2 May 2017 10:46:32 +0000 (18:46 +0800)]
net: stmmac: dwmac-rk: read mac address from devinfo first
Change-Id: I2888dcfc57c2e5a266fdf1058f9ab70e04034f22
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Finley Xiao [Tue, 16 May 2017 02:53:46 +0000 (10:53 +0800)]
cpufreq: rockchip: optimize rockchip_cpufreq_driver_init()
Actually there is no need to use two loops.
Change-Id: Ieafdc265307e21fc7195f3d80b42483a2d53d413
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Zorro Liu [Wed, 17 May 2017 07:25:53 +0000 (15:25 +0800)]
ARM64: dts: rockchip: modify battery sample register value of rk3368-p9 according to hardware board
Change-Id: I50fc124f06b8c2b5af20d5e44a93f68d28d748a0
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Zhangbin Tong [Mon, 15 May 2017 02:45:26 +0000 (10:45 +0800)]
ARM64: dts: rk3399: android: add compatible for stb_devinfo node
Change-Id: Ib45c5ff21f884fba12e39be63740f90bfc4bbc27
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Finley Xiao [Mon, 15 May 2017 02:12:34 +0000 (10:12 +0800)]
PM / devfreq: rockchip_dmc: Avoid glitches due to slow CPU
We weren't giving enough time for DMC to change frequencies
when the CPU was running slow.
Change-Id: I84e1a4ad7b5ccddafb0016f3d5d6eef147a58591
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Mon, 15 May 2017 01:42:29 +0000 (09:42 +0800)]
PM / devfreq: Lock CPU online/offline in rockchip_dmcfreq_target()
To protect against races with concurrent CPU online/offline, call
get_online_cpus() before change frequency.
Change-Id: I5b97cd7eff6a1c4828ab30bc165fb2aa8b460bb3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
wlq [Tue, 16 May 2017 12:22:12 +0000 (20:22 +0800)]
arm64: dts: rk3368: p9: set mipi_dsi_host delay 200ms
Change-Id: Ibed9c624072f590ed2aeee8529e133a505624e8d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Xu Jianqun [Tue, 16 May 2017 08:55:52 +0000 (16:55 +0800)]
arm64: dts: rk3368-sheep: add rk818 battery node
Change-Id: I7e0f0ea93a2019ea022c9fe8e72f412af0ec6be9
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Rocky Hao [Tue, 16 May 2017 02:18:57 +0000 (10:18 +0800)]
arm: dts: rk322x-android: update shut mode and enable this module
gpio is not connected by default and we suggest cru mode as the default
shut mode.
Change-Id: I74593092b145e51e5f5b52ab028e650b7fe67f5e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Rocky Hao [Tue, 16 May 2017 02:15:33 +0000 (10:15 +0800)]
arm: dts: rockchip: rk322x: update tsadc's frequence setting
update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.
Change-Id: I04f3ee230819af1fce44518b5cbee7700c4d67fd
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Zorro Liu [Tue, 16 May 2017 08:47:45 +0000 (16:47 +0800)]
drivers: inv_mpu: remove no use debug
Change-Id: Ife1fae1323e2ed262a2f7063e5bb313cb304033f
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Daniel Vetter [Thu, 11 Feb 2016 22:04:51 +0000 (20:04 -0200)]
UPSTREAM: dma-buf: Add ioctls to allow userspace to flush
The userspace might need some sort of cache coherency management e.g. when CPU
and GPU domains are being accessed through dma-buf at the same time. To
circumvent this problem there are begin/end coherency markers, that forward
directly to existing dma-buf device drivers vfunc hooks. Userspace can make use
of those markers through the DMA_BUF_IOCTL_SYNC ioctl. The sequence would be
used like following:
- mmap dma-buf fd
- for each drawing/upload cycle in CPU 1. SYNC_START ioctl, 2. read/write
to mmap area 3. SYNC_END ioctl. This can be repeated as often as you
want (with the new data being consumed by the GPU or say scanout device)
- munmap once you don't need the buffer any more
BackPort:
upstream kernel change dma-buf api with the commit(
831e9da
dma-buf: Remove range-based flush), avoid effect too much to
current kernel, Just compatible dma-buf api to current version.
v2 (Tiago): Fix header file type names (u64 -> __u64)
v3 (Tiago): Add documentation. Use enum dma_buf_sync_flags to the begin/end
dma-buf functions. Check for overflows in start/length.
v4 (Tiago): use 2d regions for sync.
v5 (Tiago): forget about 2d regions (v4); use _IOW in DMA_BUF_IOCTL_SYNC and
remove range information from struct dma_buf_sync.
v6 (Tiago): use __u64 structured padded flags instead enum. Adjust
documentation about the recommendation on using sync ioctls.
v7 (Tiago): Alex' nit on flags definition and being even more wording in the
doc about sync usage.
v9 (Tiago): remove useless is_dma_buf_file check. Fix sync.flags conditionals
and its mask order check. Add <linux/types.h> include in dma-buf.h.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455228291-29640-1-git-send-email-tiago.vignatti@intel.com
(cherry picked from commit
c11e391da2a8fe973c3c2398452000bed505851e)
Change-Id: I92916babe7fb0ab3bf3ce9dc966408f2e05fe83d
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Elaine Zhang [Tue, 16 May 2017 07:39:37 +0000 (15:39 +0800)]
rockchip: clk: rk3368: remove the flag ROCKCHIP_PLL_SYNC_RATE for CPLL
to slove the display shaking, when uboot logo display to kernel show.
Change-Id: I5856581fabd0171be09993878ffb4ef1af0fb204
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
chenjh [Mon, 15 May 2017 02:02:31 +0000 (10:02 +0800)]
firmware: rockchip: use 'nsec_ctx->und_lr' to deliver fiq break point's PC
'nsec_ctx->mon_lr' is not the fiq break point's PC, because it will
be override as 'sip_fiq_debugger_uart_irq_tf_cb' for optee-os to
jump to fiq_debugger handler. As 'nsec_ctx->und_lr' is not used for
kernel, optee-os uses it to deliver fiq break point's PC.
Change-Id: I5a831638e8228766d03d92674e3e29facdd116f8
Signed-off-by: chenjh <chenjh@rock-chips.com>
Elaine Zhang [Mon, 15 May 2017 06:34:30 +0000 (14:34 +0800)]
arm64: dts: rockchip: rk3328-evb: add clk dts node for rk805
Change-Id: I30f061a8325d7207133bfd0ab7d82b79664262cf
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Elaine Zhang [Mon, 15 May 2017 06:33:32 +0000 (14:33 +0800)]
arm: dts: rk3229-echo-v10: add clk dts node for rk805
Change-Id: Idff25c5e311f282c67f8dbabbd104019f19bbb6a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Elaine Zhang [Mon, 15 May 2017 06:31:05 +0000 (14:31 +0800)]
mfd: rk808: add rk808-clkout mfd cell for rk805
support rk805 two clk output,xin32k and rk805-clkout2.
Change-Id: If4f820f53feaf6ab2804f4acd0cce925667b7bc0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Huang, Tao [Mon, 15 May 2017 08:05:00 +0000 (16:05 +0800)]
Revert "arm64: rockchip_defconfig: enable CONFIG_IKCONFIG"
This reverts commit
28f4152aad7fc402f6f545f07f4193aac7a05087.
For pass Android 7.1 CTS:
android.security.cts.KernelSettingsTest#testNoConfigGz
Change-Id: I9bd7d4c6c06b7d43fa51a7f02eecca8cedc61c1d
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 15 May 2017 08:01:40 +0000 (16:01 +0800)]
Revert "ARM: rockchip_defconfig: enable CONFIG_IKCONFIG"
This reverts commit
b90c069d1edf02a11533cf6ba401316e36b6702b.
For pass Android 7.1 CTS:
android.security.cts.KernelSettingsTest#testNoConfigGz
Change-Id: Ia45a95bbb9aafaf0b38b7bd4647f20878403eaae
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Xu Jianqun [Mon, 15 May 2017 02:48:58 +0000 (10:48 +0800)]
arm: dts: rk3288: add dts for rk3288 evb with act8846 and edp
Change-Id: I861ebd4f6fbe04809f1d450d1a6fd139125c9f67
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
buluess.li [Mon, 8 May 2017 08:01:45 +0000 (16:01 +0800)]
arm64: dts: rk3399-android-6.0: use ion for iep
Change-Id: If3dd5da95abb462ac15d56de26aaeff1b95f5a65
Signed-off-by: buluess.li <buluess.li@rock-chips.com>
Frank Wang [Fri, 12 May 2017 03:17:48 +0000 (11:17 +0800)]
arm: dts: add gpio power-key support for rk322x SoC
Change-Id: I45d6e0ffe5444b26165324048c0e88d6fca19bab
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Zorro Liu [Fri, 12 May 2017 09:22:58 +0000 (17:22 +0800)]
ARM64: dts: rockchip: reduce cma size of rk3368-android
Change-Id: I33407879b63acfaf6da994a5c99633b3e2ad388b
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Zhangbin Tong [Tue, 2 May 2017 10:44:56 +0000 (18:44 +0800)]
soc: rockchip: add devinfo parser driver
Change-Id: I8e16d5ee8a1456de43e46e68bee60e7fb2a7b266
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Zhangbin Tong [Tue, 2 May 2017 10:41:04 +0000 (18:41 +0800)]
ARM64: dts: rk3399: android: add memory reserved for deviceinfo
Change-Id: Iff4cdc07f1a79d832af85dc23ed1001002fe2e6a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Sugar Zhang [Fri, 12 May 2017 09:20:43 +0000 (17:20 +0800)]
ARM: dts: rk322x: fix i2s1 pinctrl error
Change-Id: I29fa27ea159b86d3cdfbaf6d9c620e53bc52afd9
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Sugar Zhang [Fri, 12 May 2017 09:17:04 +0000 (17:17 +0800)]
ARM: dts: rk322x: add spdif node
Change-Id: Id8ccff720d3e42e0df8fa8fd5007127fa9af2147
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Sugar Zhang [Fri, 12 May 2017 09:16:26 +0000 (17:16 +0800)]
ASoC: rockchip: add support for rk3228 spdif
Change-Id: I3f0ae976ef055086f48c2b95b5e45a9eac7487ad
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Mark Yao [Fri, 24 Mar 2017 11:46:46 +0000 (19:46 +0800)]
drm/rockchip: vop: add line_flag 0/1 for ddr freq change
Change-Id: Icae9fe3d3600a478f68220545c17b393b4aff1ec
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
zain wang [Thu, 11 May 2017 07:46:25 +0000 (15:46 +0800)]
mfd: fusb302: Don't mistake meaningful packets for Good_CRC
If a partner port sends a packet at approximately the same time as we
send a packet, we may end up with the initial packet followed by the
GOOD_CRC reply in our HW FIFO. Don't automatically discard the first
packet in the FIFO. Instead, discard the packet only if it's a GOOD_CRC
packet. And, modify our get_message function to automatically discard
GOOD_CRC in search of a meaningful packet.
In addition, due to interrupt latency, we can't rely on receiving one
interrupt per incoming packet. If our Rx FIFO is non-empty, assume that
it contains at least one packet.
Change-Id: Iaad80a4c55eea3e9e2791d81d7c5d28ce97bd2f5
Signed-off-by: zain wang <wzz@rock-chips.com>
Huang Jiachai [Wed, 19 Apr 2017 13:04:36 +0000 (21:04 +0800)]
ARM64: dts: rk3368: add rk3368-sheep-lvds.dts for sheep board
Change-Id: Iaf65b8c8f928397e1a3641a7521ee2efed230d31
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Frank Wang [Fri, 12 May 2017 06:26:38 +0000 (14:26 +0800)]
arm: rockchip_defconfig: enable CONFIG_KEYBOARD_GPIO
This adds enable CONFIG_KEYBOARD_GPIO to support gpio-keys driver.
Change-Id: Ib2e127a3d017ad69b1bf6c0b0a795d0bce44af0e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Mark Yao [Fri, 12 May 2017 06:23:12 +0000 (14:23 +0800)]
drm/rockchip: vop: correct rk322x vop define
Change-Id: If4c3b2e54f3621f7b1120401d9a049d780aa9b4f
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
David Wu [Fri, 12 May 2017 06:15:51 +0000 (14:15 +0800)]
arm: dts: rk322x: Add io-domain support for rk3229-evb and rk3229-echo-v10
The power domain of VCCIO3 is selected from maskrom,
so we don't need to configure it.
Change-Id: I11f87fe6f178943daa5ec9dcc22f4f505fe58163
Signed-off-by: David Wu <david.wu@rock-chips.com>
David Wu [Fri, 12 May 2017 03:31:46 +0000 (11:31 +0800)]
arm: dts: rk322x: Add io-domain node
Change-Id: I1707bc7e4ed166b1aee14d69c7e25a57ab535d83
Signed-off-by: David Wu <david.wu@rock-chips.com>
David Wu [Fri, 12 May 2017 03:30:37 +0000 (11:30 +0800)]
PM / AVS: rockchip-io: Add rk322x io-domains support
Change-Id: Iaa91c932fdd9a9589945b0c6e19bc73517f7b322
Signed-off-by: David Wu <david.wu@rock-chips.com>
chenzhen [Fri, 12 May 2017 02:00:04 +0000 (10:00 +0800)]
ARM: dts: rk3229-evb: enable GPU device
Change-Id: Ifab6284e56d1e833990b53d1aa555f55b520c955
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 9 May 2017 07:40:49 +0000 (15:40 +0800)]
arm: dts: rk3229-echo-v10: enable GPU device
Change-Id: I4336bd134afea2b8ad55ebb104c877548c16b582
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 9 May 2017 07:39:39 +0000 (15:39 +0800)]
arm: dts: rk322x: add mali-400 GPU device
Change-Id: I4fb5d27a34e57bb17db2c79ffdc655223ce8c338
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 9 May 2017 03:42:36 +0000 (11:42 +0800)]
ARM: rockchip_defconfig: enable driver for Mali400 GPU
Change-Id: Idcccf39fc0a5d2d340325e1b3445c8c0d3dcbcc3
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:26:06 +0000 (16:26 +0800)]
ARM: dts: rk322x: add 'nvmem-cells' property for opp_table0
This patch adds nvmem-cells property to opp_table0 node so that
cpufreq driver can get cpu leakage value.
Change-Id: Ic39525de46762dfe867ecb86123be6fa7ccad95c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:05:10 +0000 (16:05 +0800)]
ARM: dts: rockchip: add efuse device node for rk322x
Add a efuse node in the device tree for the rk322x SoC.
Change-Id: I9a771c2065bb222b754f5a37b193edd4abb3f3a7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
zhangjun [Thu, 11 May 2017 06:27:48 +0000 (14:27 +0800)]
arm64: rockchip_defconfig: enable HDMI_ANALOG
Change-Id: Icae9ce3e01f063c8b6e169b9d386b6eeeed54961
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
zhangjun [Thu, 11 May 2017 03:31:14 +0000 (11:31 +0800)]
ASoC: rockchip: add machine driver for built-in hdmi and codec IC
this patch is used for rockchip built-in HDMI and audio codec
IC which are wired to the same i2s line(such as rk3368).
so we use a DAI link CPU to multicodecs.
Change-Id: Ibc5fdeb2091836dc28675aacdc099d76e0b7d752
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
shengfei Xu [Fri, 21 Apr 2017 03:31:34 +0000 (11:31 +0800)]
dt-bindings: suspend: rockchip: add PMU_USB_LINESTAE_WAKEUP_EN config for wakeup
Change-Id: I73b992b57344f24eb37b360bc479264996ff72d1
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 10:06:12 +0000 (18:06 +0800)]
PM / devfreq: rockchip_dmc: Fix error handling
It never has the mutex_lock counterpart before goto.
Change-Id: I937e79bc65433cb1c173fe0cb221e7d69586046c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
shengfei Xu [Fri, 5 May 2017 07:43:53 +0000 (15:43 +0800)]
arm: dts: rk3288-evb: enable rockchip-suspend node
Change-Id: I1bc5f75d3bf49b7f5a532d7dbe7206edc6932c36
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
shengfei Xu [Fri, 5 May 2017 07:38:27 +0000 (15:38 +0800)]
arm: dts: rk3288: add rockchip-suspend node
Change-Id: Id5700548a6034248ed5ad3226dd652d0833eec13
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
shengfei Xu [Fri, 5 May 2017 07:34:14 +0000 (15:34 +0800)]
soc: rockchip: support rk3288 pm config
Change-Id: Icbd23af68bdf7a4fcad59a5d227988a13b2873af
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:01:10 +0000 (16:01 +0800)]
nvmem: rockchip-efuse: add support for rk322x-efuse
This adds the necessary data for handling efuse on the rk322x.
Change-Id: Iadd37923f5949a03630a936d5a41b955d443b2d8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:08:30 +0000 (16:08 +0800)]
ARM: dts: rk3229: add cpu-supply property for cpu node in evb board
This patch adds the cpu-supply property so that cpu can do dvfs
Change-Id: I6cfc1c8e467652ad9b748c6a9980b00006181910
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 03:37:31 +0000 (11:37 +0800)]
ARM: dts: rk3229: add cpu-supply property for cpu node in echo-v1 board
This patch adds the cpu-supply property so that cpu can do dvfs
Change-Id: I5edff7fabd1de23407e8fcb7d70e3b0eeee2ee0e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 06:49:37 +0000 (14:49 +0800)]
ARM: dts: rk3229: add a new cpu opp table
This patch adds some new frequencies for rk3229 boards
Change-Id: Ie35efc3f04350bcfd1eae31a72adfc9166bef781
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 03:27:09 +0000 (11:27 +0800)]
ARM: dts: rk322x: add operating-points-v2 property for cpu
This patch adds a new opp table for cpu
Change-Id: I59384ab8ab649ca4672adf64c52f16da76777ce4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 03:14:13 +0000 (11:14 +0800)]
clk: rockchip: rk3228: add
1464000000 into cpuclk rate table
This patch adds 1464000000Hz for armclk
Change-Id: I3e4c18acf13036b778f18fe166ae47682a97feeb
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 07:04:27 +0000 (15:04 +0800)]
dt-bindings: rockchip: vop: add gamma_table range
Change-Id: Iafbff319d33c9436963572e05911ccfe676a4852
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Ander Conselvan de Oliveira [Tue, 4 Apr 2017 16:52:21 +0000 (17:52 +0100)]
FROMLIST: drm: Pass CRTC ID in userspace vblank events
With the atomic API, it is possible that a single commit affects
multiple crtcs. If the user requests an event with that commit, one
event will be sent for each CRTC, but it is not possible to distinguish
which crtc an event is for in user space. To solve this, the reserved
field in struct drm_vblank_event is repurposed to include the crtc_id
which the event is for.
The DRM_CAP_CRTC_IN_VBLANK_EVENT is added to allow userspace to query if
the crtc field will be set properly.
[daniels: Rebased, using Maarten's forward-port.]
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(am from https://patchwork.kernel.org/patch/
9662099/)
Change-Id: Ibe6949782e5df5363d4eaa3e98b3ff413239cf26
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
zain wang [Wed, 10 May 2017 03:21:30 +0000 (11:21 +0800)]
mfd: fusb302: ignored the timeout if vdm got the message.
The PD spec define the source should ensure that a message requesting
a response is responded within 30ms(tSenderResponse). But if the
message responded is received close to 30ms, we may hit the case:
tcpm_get_message(); //get the data and close to 30ms
... takes about 600us, meanwhile the 30ms timer came.
auto_vdm_machine
vdm_send... //we get the message, but timeout.
So, let's ignored the timeout if we get the message.
Change-Id: I64ced1bd2d32d8ef996dcec27cf35c3e333386f8
Signed-off-by: zain wang <wzz@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:57:06 +0000 (14:57 +0800)]
arm: dts: rockchip: add gamma table support for rk322x
Change-Id: I9aa8af01bd989ff244153d53c8b9b8ca06d3f834
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:56:57 +0000 (14:56 +0800)]
arm: dts: rockchip: add gamma table support for rk3288
Change-Id: Idb4cd93b8a696925ac56b98c1619999949e6fd84
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:56:43 +0000 (14:56 +0800)]
arm64: dts: rockchip: add gamma table support for rk3368
Change-Id: Ia0390aa0ffe99a2c2b6ba82ecd83610683d49eac
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:14:49 +0000 (14:14 +0800)]
arm64: dts: rockchip: add gamma table support for rk3399
Rk3399 vopb's gamma table size is 1024, vopl's gamma
table size is 256
Change-Id: Iea9cd70f82dfa9c9c8ae53a24c8153eebb981e7a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Mon, 27 Apr 2015 18:39:35 +0000 (11:39 -0700)]
drm/rockchip: add support for gamma table
Introduce support for rockchip gamma table,
Rockchip have two version gamma table design:
The old version design was introduced by Dominik Behr's gamma patch
(https://chromium-review.googlesource.com/272209):
Gamma table has to be uploaded when the LUT is disabled which only takes
effect at the end of a frame, therefore actual hardware updates is done
from a worker and can take more than one frame.
In order to solve gamma table switch issues, after rk3399,
H/W add a gamma table update mechanism, can update without lut disable.
And gamma table's size also has two version:
one is 10 bit per component, 1024 entries,
the other one is 8 bit per component, 256 entries
Change-Id: I8145d1c42a28d57f11e95d24be2341011360334d
Signed-off-by: Dominik Behr <dbehr@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Finley Xiao [Tue, 9 May 2017 13:53:37 +0000 (21:53 +0800)]
PM / devfreq: rockchip_dmc: avoid waiting for vop line flag indefinitely
It may disable vop_crtc when scaling frequency, in this case,
devfreq thread will wait for vop line flag indefinitely, the
system will crash.
Change-Id: I7043b285c329ff23e2fc9c5b5f3a165c37ef6378
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Tue, 9 May 2017 13:34:24 +0000 (21:34 +0800)]
drm/rockchip: vop: export rockchip_drm_register_notifier_to_dmc
This function registers a notifier to dmc devfreq, devfreq thread will
lock the mutex of vop when scaling frequency, so vop_crtc will not be
disabled when it is waiting for line flag.
Change-Id: I886e5dc5d36a0f14f35662cec3423a2c5550a7a6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Tue, 9 May 2017 13:31:31 +0000 (21:31 +0800)]
drm/rockchip: vop: add vop enable/disable mutex lock
It may disable vop_crtc when waiting for line flag, in this case,
we would not get line flag any more. So the lock should be added
to prevent rockchip_wait_line_flag() from vop_crtc_disable();
Change-Id: I312fd46e64006bf69e3c57f54513230b90866e21
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
zhangyunlong [Tue, 9 May 2017 03:41:19 +0000 (11:41 +0800)]
camera: rockchip: camsys driver v0.0x21.0xf
add reference count for marvin
Change-Id: Ic410da2524a8972d782ccfdcb121e1727b02e9d8
Signed-off-by: zhangyunlong <dalon.zhang@rock-chips.com>
xcq [Thu, 20 Apr 2017 08:27:16 +0000 (16:27 +0800)]
camera: rockchip: fix some compiled errors and warn
fix spin_unlock error use and some potential problems.
Change-Id: I860c225f2acb5e28827ad3f6b702b0dc7828bb0f
Signed-off-by: xcq <shawn.xu@rock-chips.com>
Tang Yun ping [Sat, 6 May 2017 03:22:30 +0000 (11:22 +0800)]
ARM: rockchip_defconfig: default to enable rockchip dmc
Change-Id: Ia52708079d41379d0c530b08d6a3a6bf109ee98c
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Tue, 11 Apr 2017 08:14:47 +0000 (16:14 +0800)]
PM / devfreq: rockchip_dmc: add support for rk3288
This adds the necessary data for handling dmcfreq on the rk3288.
Change-Id: I042222f899d03ec1832ac47b48db8c6c46c3b0d3
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Wed, 12 Apr 2017 08:24:16 +0000 (16:24 +0800)]
PM / devfreq: event: add support for rk3288 dfi
This adds the necessary data for handling dfi on the rk3288.
Access the dfi via registers provided by GRF (general register
files) module.
Change-Id: Ic7241af3c20a269ab362055dea04d260e01c50de
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Thu, 4 May 2017 12:49:58 +0000 (20:49 +0800)]
clk: rockchip: support setting ddr clock via SIP Version 2 APIs
1. Add support setting ddr clock via SIP Version 2 APIs
2. RK3288 using SIP Vision 2.
Change-Id: I935e43b1885a96650dc86e3eb6d79de6795062a9
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Mon, 8 May 2017 11:30:56 +0000 (19:30 +0800)]
sip: rockchip: fix bus about make kernel failure
When undefine "CONFIG_ROCKCHIP_SIP", define an empty sip function
to avoid make kernel failure.
Change-Id: Id6bcf1cec1c11f09511852e015631d14279ca8bc
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Mark Yao [Fri, 5 May 2017 07:24:43 +0000 (15:24 +0800)]
drm: add drm_device_get_by_name support
Change-Id: Ifbd0f403ca2302e9329a16d7b69db5ee056cadf7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Huibin Hong [Thu, 27 Apr 2017 01:13:53 +0000 (09:13 +0800)]
Revert "fiq debugger: add resume for debug uart"
This reverts commit
0e7d751d6c004970348bdacb6961e06e7775cb92.
If enable no console suspend, it will do resume when printing log,
which causes problem. Remove resume of kernel, and add resume of
trust firmware or other power management code.
Change-Id: I3e8e704140134a6aad5c0eb2f14fde36fb108ad3
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Frank Wang [Wed, 10 May 2017 03:23:49 +0000 (11:23 +0800)]
arm: dts: add vdd_arm and vdd_log regulator for rk3229-evb
Change-Id: I1a0bbee3e5b9a43f2a79285c04497ec598697404
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Xu Jianqun [Wed, 10 May 2017 01:21:04 +0000 (09:21 +0800)]
arm64: dts: rk3368-android: revert to use uart2 for debug
Change-Id: I5e6c88e185a2ad39b082ad4b989589cd46ecb874
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>