UPSTREAM: ASoC: rockchip: i2s: compatible with different chips

there maybe more than one i2s module inside chip, and these i2s modules
have different channels features.

for example: there are 3 i2s in rk3066, one support 8 channels playback
and 2 channels capture, but the others only support 2 channels playback
and 2 channels capture.

in order to compatible with these various chips, we add playback and
capture property to specify these values.

there are default channels configuration in driver: 8 channels playback
and 2 channels capture. if not add property, we use the default values.

Change-Id: I45f3214160877223ba9722bd38a36584e416b14d
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit c4f9374ddc461ed76be30f4d354a6d1ecb94dfa5)

UPSTREAM: ASoC: rockchip: i2s: change bclk and lrck according to sample rates

This patch sets the dividers autonomously.

when i2s works on master mode, and sample rates changed. We need to change
bclk and lrck at the same time for cpu internal side.

As the input source clock to the module is MCLK_I2S,
and by the divider of the module, the clock generator generates
SCLK and LRCK to transmitter and receiver.

Change-Id: I377f0f08656659787b980785fab0b69197b7b80b
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 2458c37779ddb91b4109949d86f5a5e193ba415b)

ARM64: dts: rk336x: fix enable incorrect HCLK_I2Sx when startup

This patch like below:
----
commit 3860aa1ccfe01adb6c3fd09e880d812ceb408e5c
Author: Heiko Stuebner <heiko@sntech.de>
Date:   Sat Jan 9 03:18:51 2016 +0100

    ARM: dts: rockchip: swap i2s clock ordering on rk3036

    For sound setups using the simple-card mechanism, the main clock
    (sysclk) is expected to be the first element. For the i2s-driver
    itself it doesn't matter, as it uses named clocks, so we can just
    swap them.
----
If we set HCLK_I2Sx at first, rockchip_i2s_set_sysclk will set the
HCLK_I2S freq (from example is 100MHz) to set the i2s_div, it is
incorrect.

Change-Id: Iab69d541c47d1293a784ebffc23f6c1ceaf9c0b1
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

drm/rockchip: get rid of rockchip_drm_crtc_mode_config

We need to take care of the vop status when use rockchip_drm_crtc_mode_config,
if vop is disabled, the function would failed, that is terrible.

Save connector type and output mode on drm_display_mode->private_flags on
connector mode_fixup, then we can configure the type and mode safely
on crtc mode_set.

Change-Id: I129cf8a2f100fc19fe96f1d8985e905bea477e28
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rk3399: fix enable incorrect HCLK_I2Sx when startup

This patch like below:
----
commit 3860aa1ccfe01adb6c3fd09e880d812ceb408e5c
Author: Heiko Stuebner <heiko@sntech.de>
Date:   Sat Jan 9 03:18:51 2016 +0100

    ARM: dts: rockchip: swap i2s clock ordering on rk3036

    For sound setups using the simple-card mechanism, the main clock
    (sysclk) is expected to be the first element. For the i2s-driver
    itself it doesn't matter, as it uses named clocks, so we can just
    swap them.
----
If we set HCLK_I2Sx at first, rockchip_i2s_set_sysclk will set the
HCLK_I2S freq (from example is 100MHz) to set the i2s_div, it is
incorrect.

Change-Id: I2b424ded3845b8ccd3ef233e43c5f9f915544547
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

arm64: dts: set right backlight pwm polarity for rk3399-tb

Change-Id: Icaf5a12d3979ec6e31b8dbeaa5df46c6128f62c6
Signed-off-by: David Wu <david.wu@rock-chips.com>

iommu/rockchip: enable upstream iommu on ARM64 platform

Change-Id: I8470750d63b890322d48bc47c07c516f2e3ba270
Signed-off-by: Simon <xxm@rock-chips.com>

iommu/rockchip: enable upstream iommu build on ARM64 platform

Change-Id: Ied95b0a8d531210729a960b90dab81f1e25e9035
Signed-off-by: Simon <xxm@rock-chips.com>

iommu/rockchip: add ARM64 cache flush operation for iommu

Change-Id: I5848ca01a38e902a436b5b4abccfe235e2746cc1
Signed-off-by: Simon <xxm@rock-chips.com>

Documentation: add rockchip,rk3399-lcdc to rockchip_lcdc.txt

Change-Id: I4a82256650e2bc1e4861202a6002b5c2dca07cb1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rk3399: Add vpu and rkvdec resource node

Add vpu and rkvdec resource node to enable video codec
supporting for rk3399 android.

Change-Id: I1689955858355b6061957dc43eea17f9b8d71096
Signed-off-by: alpha.lin <alpha.lin@rock-chips.com>

FROMLIST: drm/rockchip: dw_hdmi: Don't call platform_set_drvdata()

The Rockchip dw_hdmi driver just called platform_set_drvdata() to get
your hopes up that maybe, somehow, you'd be able to retrieve the 'struct
rockchip_hdmi' from a pointer to the 'struct device'.  You can't.  When
we call dw_hdmi_bind() the main driver calls dev_set_drvdata(), which
clobbers our setting.

Let's just remove the platform_set_drvdata() to avoid dashing people's
hopes.

(am from https://patchwork.kernel.org/patch/8523401/)

Change-Id: I28c4dcff37f6800b841e0492eb2613dcff7d1c81
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

FROMLIST: drm/rockchip: vop: Fix vop crtc cleanup

This fixes a few problems in the vop crtc cleanup (handling error
paths and cleanup upon exit):

* The vop_create_crtc() error path had an unsafe version of the
  iterator used for iterating over all planes (though it was
  destroying planes in the iterator so should have used the safe
  version)

* vop_destroy_crtc() - wasn't calling vop_plane_destroy(), which made
  slub_debug unhappy, at least if we ended up running this due to a
  deferred probe.

* In vop_create_crtc() if we were missing the "port" device tree node
  we would fail but not return an error (found by code inspection).

Fix these problems.

(am from https://patchwork.kernel.org/patch/8523361/)

Change-Id: I3c00faca6e2fc10edc5b4576012ac28b6809a2f3
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

FROMLIST: drm/rockchip: dw_hdmi: Call drm_encoder_cleanup() in error path

The drm_encoder_cleanup() was missing both from the error path of
dw_hdmi_rockchip_bind().  This caused a crash when slub_debug was
enabled and we ended up deferring probe of HDMI at boot.

This call isn't needed from unbind() because if dw_hdmi_bind() returns
no error then it takes over the job of freeing the encoder (in
dw_hdmi_unbind).

(am from https://patchwork.kernel.org/patch/8523331/)

Change-Id: Ibf5c39a5db304177a9f16d8dc691221512002348
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

FROMLIST: drm/rockchip: vop: Disable planes when disabling CRTC

When a VOP is re-enabled, it will start scanning right away the
framebuffers that were configured from the last time, even if those have
been destroyed already.

To prevent the VOP from trying to access freed memory, disable all its
windows when the CRTC is being disabled, then each window will get a
valid framebuffer address before it's enabled again.

Link: http://lkml.kernel.org/g/CAAObsKAv+05ih5U+=4kic_NsjGMhfxYheHR8xXXmacZs+p5SHw@mail.gmail.com
(am from https://patchwork.kernel.org/patch/8643631/)

Change-Id: Iaacb1624b4351a94d663ec73d9174b0fd4bc4b54
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

FROMLIST: drm/rockchip: vop: Don't reject empty modesets

So that when DRM_IOCTL_MODE_SETCRTC is called without a FB nor mode, the
CRTC gets disabled.

Link: http://lkml.kernel.org/g/CAAObsKAv+05ih5U+=4kic_NsjGMhfxYheHR8xXXmacZs+p5SHw@mail.gmail.com
(am from https://patchwork.kernel.org/patch/8618471/)

Change-Id: I3a36e20f727f2087d718acec886766b743de2d9b
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

FROMLIST: drm/rockchip: cancel pending vblanks on close

When closing the DRM device while a vblank is pending, we access
file_priv after it has been free'd, which gives:

  Unable to handle kernel NULL pointer dereference at virtual address 00000000
  ...
  PC is at __list_add+0x5c/0xe8
  LR is at send_vblank_event+0x54/0x1f0
  ...
  [<c02952e8>] (__list_add) from [<c031a7b4>] (send_vblank_event+0x54/0x1f0)
  [<c031a760>] (send_vblank_event) from [<c031a9c0>] (drm_send_vblank_event+0x70/0x78)
  [<c031a950>] (drm_send_vblank_event) from [<c031a9f8>] (drm_crtc_send_vblank_event+0x30/0x34)
  [<c031a9c8>] (drm_crtc_send_vblank_event) from [<c0339ad8>] (vop_isr+0x224/0x28c)
  [<c03398b4>] (vop_isr) from [<c0081780>] (handle_irq_event_percpu+0x12c/0x3e4)

This can be triggered somewhat reliably with:

modetest -M rockchip -v -s ...

Add a preclose hook to the driver so that we can discard any pending
vblank events when the device is closed.

(am from https://patchwork.kernel.org/patch/8568111)

Change-Id: Icce075cf22f3a9d7b2157c29a47b370160b0c8d8
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: dts: add i2c0, i2c1, i2c4 rise and fall time for rk3399-tb

Change-Id: Ibbd7d7ee7bfce25fe104b03ea742c0bab2b4b586
Signed-off-by: David Wu <david.wu@rock-chips.com>

arm64: dtsi: rk3399-tb: add node of GPU

Change-Id: I52f15bf127b360a2bfe1356de1ed7f4d97b4534b
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

drm/rockchip: analogix_dp: add rk3399 eDP support

RK3399 and RK3288 shared the same eDP IP controller, so this time we
just need to append the RK3399 compatible name to analogix_dp documentation
and driver code.

Change-Id: I3fee6893c56698ee2948b9df2f3ffb7729fe75ef
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

drm: bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1

There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit 45970584ead0a5dfe27a6edef198ede536ad37ba (FROMLIST: drm: bridge:
analogix/dp: add some rk3288 special registers setting).

The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.

Change-Id: I8cb806d23144697225f626aaa2af19e6379dfe51
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

Merge branch 'android-4.4' of https://android.googlesource.com/kernel/common

* android-4.4: (34 commits)
  sdcardfs: remove unneeded __init and __exit
  sdcardfs: Remove unused code
  fs: Export d_absolute_path
  sdcardfs: remove effectless config option
  inotify: Fix erroneous update of bit count
  fs: sdcardfs: Declare LOOKUP_CASE_INSENSITIVE unconditionally
  trace: cpufreq: fix typo in min/max cpufreq
  sdcardfs: Add support for d_canonical_path
  vfs: add d_canonical_path for stacked filesystem support
  sdcardfs: Bring up to date with Android M permissions:
  Changed type-casting in packagelist management
  Port of sdcardfs to 4.4
  Included sdcardfs source code for kernel 3.0
  ANDROID: usb: gadget: Add support for MTP OS desc
  CHROMIUM: usb: gadget: f_accessory: add .raw_request callback
  CHROMIUM: usb: gadget: audio_source: add .free_func callback
  CHROMIUM: usb: gadget: f_mtp: fix usb_ss_ep_comp_descriptor
  CHROMIUM: usb: gadget: f_mtp: Add SuperSpeed support
  FROMLIST: mmc: block: fix ABI regression of mmc_blk_ioctl
  FROMLIST: mm: ASLR: use get_random_long()
  ...

Change-Id: I88fa8a7f6bfc80bee98503b9ede0fee08d62814c

Revert "mmc: block: ioctl return EINVAL if cmd unknown"

This reverts commit 7c1abbfe2a27bae41202d4b46687f82eba0c1d5b.
Will fixes by aosp commit "mmc: block: fix ABI regression of mmc_blk_ioctl"

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

clk: rockchip: rk3399: Add more pll rates for HDMI

Modify the 594MHz parameter for higher VCO freq to reduce the jitter.

Change-Id: I78784210b69d6895758192c84724b982fcc9e72d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

sdcardfs: remove unneeded __init and __exit

Change-Id: I2a2d45d52f891332174c3000e8681c5167c1564f

sdcardfs: Remove unused code

Change-Id: Ie97cba27ce44818ac56cfe40954f164ad44eccf6

pinctrl: rockchip: fix pull setting error for rk3399

Change-Id: Ie52226e751510373abc75754ab756a36ae4f3aaa
Signed-off-by: David Wu <david.wu@rock-chips.com>

ARM64: dts: rk3399-tb: add sound node

Change-Id: Ibcb2e6baae871c6456e1cbe6b145cb64bb007c7d
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

ARM64: configs: rockchip_defconfig: enable es8316 codec

Change-Id: I799d23f12b26b99da8d77c3c67c30393e461c589
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

ASoC: es8316: add codec driver

Change-Id: I6896036a7af922747180535939074f399f8c38d1
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

ARM64: rockchip_defconfig: enable mp8865 regulator

Change-Id: I612fbe41e97f4e06dc154f76a256c7996d7ea09a
Signed-off-by: Zain Wang <wzz@rock-chips.com>

regulator: add devicetree bindings for mp8865 regulators

Change-Id: Ie837faba6a9f599dcfc5cdbdaffe12ca81060957
Signed-off-by: Zain Wang <wzz@rock-chips.com>

ARM64: dts: rk3399-tb: add support for mp8865

Change-Id: I71072722fde924f151986d6d2dc916cb868e7b98
Signed-off-by: Zain Wang <wzz@rock-chips.com>

regulator: mp8865: add regulator driver for MP8865

Change-Id: I5fa8423e5d1e301a008dcdfd60f93c442f6211a8
Signed-off-by: Zain Wang <wzz@rock-chips.com>

UPSTREAM: soc: rockchip: power-domain: Modify power domain driver for rk3399

This driver is modified to support RK3399 SoC.

Change-Id: Id4d040a78e7e18d78e9644b14e0611fc6ab44abe
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[small indentation fixups]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
 v4.7-armsoc/drivers commit fd8b62cc38b356bcdf20ac8f1a647db7b11240cf)

UPSTREAM: dt-bindings: add binding for rk3399 power domains

Add binding documentation for the power domains
found on Rockchip RK3399 SoCs

Change-Id: I51d70a08c86b5361ac5d51151711e07ffa3046ef
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
 v4.7-armsoc/drivers commit e6e270aecbb0ed605b7267fdf6f828945014de24)

UPSTREAM: soc: rockchip: power-domain: add support for sub-power domains

This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.

Change-Id: Ie2a79aab6e1e073157c06d44252ef327caee5261
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[restructured error handling in subdomain-addition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
 v4.7-armsoc/drivers commit 6be05b5ec16132f3df3f1d857ab01e30f726b542)

UPSTREAM: soc: rockchip: power-domain: allow domains only handling idle requests

On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a (shared) parent-
domain.

So allow such types of domains. For them, we can determine their
state (on/off) by checking the inverse idle-state instead.

There exist one special case if both idle as well power handling
were set as not present, but as the domain-data is defined in the
code itself, we can expect the reasonable developer to define them
in a correct way, without adding more checks.

Change-Id: Ic82cb387565a39043d5d52e62a94910de10d4bbd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
 v4.7-armsoc/drivers commit 1fe767a56c32730a947fc2bfcac5d14490bde6ff)

UPSTREAM: soc: rockchip: power-domain: make idle handling optional

Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.

Change-Id: I46d869e1de9e03ec0664518effbcf2642053391e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
 v4.7-armsoc/drivers commit 6aa841c8097fee1b17b343719c45694e3166ca34)

ARM64: dts: rk3399-tb: enable gpu node

Change-Id: I1199eae97ec4400a96bab02ca8ed1db522fa742d
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

video: rockchip: mipi: 3399: add support rk3399

Change-Id: I52fbecb5c6739b8ed1e35c3c3be7778a189874a6
Signed-off-by: xubilv <xbl@rock-chips.com>

arm64: dtsi: rk3399: add node of GPU

Change-Id: If48ed7f58aa00c28122ac77a8d79ab675f3a6208
Signed-off-by: chenzhen <chenzhen@rock-chips.com>

phy: rockchip-usb: Fixed the port cannot be resumed after suspended.

selecting utmi interface signals from utmi interface of usb20
host0 controller to usb2phy, when phy is resumed.

Change-Id: I487e836b89177cd8bc2dc56400f4dc277c8d2bf0
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

ARM64: rockchip_defconfig: open rk322x vop

Change-Id: I9df6706a34fecadd5f149cd566b31323dafb51c2
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

ARM64: dts: rk3399-monkey: add fb node

Change-Id: I1afb5fde325e9227e30fcdd5efbea4f44818de59
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

dtsi: screen-timing: lcd-tv080wum-nl0-mipi: for rk3399 monkey

Change-Id: I01ca2bd999973820317bcf46f8a7d3e85d59a606
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: vop: 3399: add support rk3399

Change-Id: Icbccfdd4fb841df67c0ade1cfd141fb574d837f0
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

clk: rockchip: rk3399: use the FRACMUX type for spdif and i2s0~2

Change-Id: I1f0f60185e70bb894010137db8a35dda218201f2
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

video: rockchip: mipi: enable clk before write register

Change-Id: I717ed1143c53e7c2cd04697e8cc3984f89e29504
Signed-off-by: xubilv <xbl@rock-chips.com>

clk: rockchip: rk3399: pclkin_isp1_wrapper should source from pclkin_cif

Change-Id: Id2ccc4003fcd286594fa2c2fc366f7c922417883
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

ARM64: dts: rk3399: remove the reference pmugrf and grf

We don't need to reference the pmugrf/grf in the clock driver any more.

Change-Id: Ibda203163c84ab4004e1225e5868267024069199
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

ARM64: dts: rk3399-monkey: support the gt9xx touchscreen

Change-Id: Iabe2264bf9cffe09259b17912d6391dfb87ee4dd
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

clk: rockchip: rk3399: remove re-enable pmucru clk_gate/pclk_alive

These are not gating default when the SoC startup, so we don't need
to re-enable them.

Change-Id: I956a31345fe7f24b973db6c9e49d87a2988ac7d6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

iommu/rockchip: add more judgement for virtual device who using iommu

A virtual device like "drm" call iommu_attach_device may fail.
Current only judge if a device has "group", this is not enough,
"group->iommu_data" is needed

Change-Id: I1a66d6016dfef867d83aa4cccaf223ced4e07161
Signed-off-by: Simon <xxm@rock-chips.com>

arm64: dts: add i2c0, i2c1 rise and fall time for rk3366-tb

Change-Id: I74d70eb8a058ae97844695dbf6bc4d01827c7bef
Signed-off-by: David Wu <david.wu@rock-chips.com>

clk: rockchip: rk3399: add some aclk/dclk IDs for vop0/vop1

Change-Id: If59b057892ad8bfe250ac763905150518cdc8631
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

Revert "iommu: rk-iovmm: change compatible name to a unified name"

This reverts commit 3a1bdfa3a4bd6e3bb0a1328ef50a4d3278560222.

This patch broken old rkfb driver, so revert it.

Change-Id: I7ccd93d8ff2086cca9c1b31932278435cbffc59f

arm64: rockchip: remove unused files

Change-Id: Ied0e45214df40f8b278114ddcb5cad4d4ce9dc81
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM64: dts: rk3366: support arm64 cpuidle-dt

Change-Id: Ia5a0bf96609092c22f3bdb327cdfde6f505163c6
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>

ARM64: dts: rockchip: configure clock frequency for rk3399 tsadc

As the rk3399 SoCs requires initial configuration for tsadc clock
frequency. The tsadc can be specified in a device tree node through
assigned-clocks.

The tsadc clock needs 500KHz~800KHz frequency to work on rk3399 SoCs.
We can add the assigned-clock to prevent the firmware
or loader has *not* set the division frequency from the source clock.

Change-Id: Ieb4cd5aad7d299baab20a9fb9d39211fe00896ff
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

ARM64: dts: rockchip: add the grf found on rk3399 tsadc

This patch adds the rockchip,grf to match the driver.

Change-Id: If477634fd38f1ebc539ade6c620a63d0cfee9111
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

thermal: rockchip: handle the power sequence for rk3399 SoCs

This adds the grf property to handle the tsadc power sequence on
rk3399 SoCs.

The rk3399 tsadc can work with this patch on now.

while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp;sleep .5; done
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41666
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555

Change-Id: I0155826bddf0017ea4985920268b333a20278bbe
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

UPSTREAM: mmc: core: fix __mmc_switch timeout caused by preempt

there is a time window between __mmc_send_status() and time_afer(),
on some eMMC chip, the timeout_ms is only 10ms, if this thread was
scheduled out during this period, then, even card has already changes
to transfer state by the result of CMD13, this part of code also treat
it to timeout error.
So, need calculate timeout first, then call __mmc_send_status(), if
already timeout and card still in programing state, then treat it to
the real timeout error.

Change-Id: I7499d3d41711ea5abe6baec780d2988dc60dfc5b
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 3bbb0deea6d5c6d5ed38ae927a5bf9b0cd7c8639)

UPSTREAM: mmc: sdhci: Fix override of timeout clk wrt max_busy_timeout

Normally the timeout clock frequency is read from the capabilities
register.  It is also possible to set the value prior to calling
sdhci_add_host() in which case that value will override the
capabilities register value.  However that was being done after
calculating max_busy_timeout so that max_busy_timeout was being
calculated using the wrong value of timeout_clk.

Fix that by moving the override before max_busy_timeout is
calculated.

The result is that the max_busy_timeout and max_discard
increase for BSW devices so that, for example, the time for
mkfs.ext4 on a 64GB eMMC drops from about 1 minute 40 seconds
to about 20 seconds.

Note, in the future, the capabilities setting will be tidied up
and this override won't be used anymore.  However this fix is
needed for stable.

Change-Id: Ifd327b7c534a346f3537432d7bce7d8f1aebef3f
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org # v3.18+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 995136247915c5cee633d55ba23f6eebf67aa567)

thermal: rockchip: update the tsadc table for rk3399

This patch fixes the incorrect conversion table.
The Code to Temperature mapping is updated based on sillcon results.

Change-Id: If8ae3f5fb59786a8db8bf79276ecea44ab92ffc9
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

ARM64: dts: rk3399-monkey: set usbdrd_dwc3_0 in peripheral mode

Set dwc3_0 in peripheral only mode until Type-C function is
ready, and then we can set dwc3_0 in drd mode.

Change-Id: I0ccb92db97244d7a34dd17c58757fc5aa1b11dac
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

ARM64: dts: rk3399: add pmu node

Change-Id: I9128738f72518bcb04f7e5d3fdb6638f476df667
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

Revert "ARM64: dts: rk3399: add pmu node"

This reverts commit 0b622df3499e3dcaebd619fa966b13588131b83d.

arm pmu driver do not support PPI in two
cluster well. So drop it.

Change-Id: I69f43ad1703589805c7e86749badda8bf802d51a

iommu/rockchip: add map_sg callback for rk_iommu_ops

Change-Id: I7a677ba0c06c4031661681a26333b1e9a2aafd26
Signed-off-by: Simon <xxm@rock-chips.com>

iommu/rockchip: fix devm_request_irq and devm_free_irq parameter

When rk_iommu_attach_device or rk_iommu_detach_device be called, the second
parameter "dev" represent the device who own the iommu, so it is not resonable
using "dev" for devm_request_irq's first parameter. To avoid potential error,
we must use iommu device itself "iommu->dev" instead, the same as devm_free_irq.

Change-Id: Id9f4097d6f1b916308475854dcf75ce86d9494fc
Signed-off-by: Simon <xxm@rock-chips.com>

ARM64: dts: rockchip: rk3399: add usb2.0 phy node

Change-Id: Ie972043ecc62f9cbca5083e3047268f91be73b2c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

phy: rockchip-usb: support usb2.0 phy for rk3399 SoC

1. Add a new compatible for rk3399;
2. Support gpio operation for vbus-drv.

Change-Id: I2eb1ac377db0bcb907d009c56fba22f1951c128e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

Documentation: bindings: update one property for Rockchip usb-phy

vbus_drv-gpio property updated

Change-Id: I528b10f1c41cbadff2b4f0d1b1b63f7d2cb51a97
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

drivers: firmware: psci: notify regulators on system-suspend

On some systems regulators need to do special actions on suspend/resume.
These get set from the generic regulator_suspend_prepare and
regulator_suspend_finish functions so these should be called from the
psci suspend ops as well.

Change-Id: I6fbf7b39ceae936ed5bd9df6719ccd3cd360840f
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

ARM64: dts: rk3399: add some properties to config dwc3

RK3399 dwc3 has some hardware properties, which is platform
dependent, including the following properties:
1. Set PHYIF to 1 to use 16-bit UTMI+ interface;
2. Clear ENBLSLPM to 0 to disable sleep and l1 suspend;
3. Clear U2_FREECLK_EXITSTS to 0;
4. Clear DEV_FORCE_20_CLK_FOR_30_CLK to 0;
5. Clear DELAYP1TRANS to 0;

Change-Id: I85de326e3c2177c66966f1239bcab838df01492d
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

usb: dwc3: add dis_del_phy_power_chg_quirk

Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether delay PHY power change from P0
to P1/P2/P3 when link state changing from U0 to U1/U2/U3
respectively.

Change-Id: I23e33f8b13001d6f86d6473ad43a261d9bda8f79
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

usb: dwc3: add DWC3_GUCTL1 reg

Change-Id: I67dfabf539b85281904b9c4dfbc764bacecb7ac3
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

clk: rockchip: rk3399: add peri hp/lp0/lp1 noc clocks into critical

Change-Id: Id136016c27b17944fc33a848fb137c3452dd6289
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

clk: rockchip: rk3399: Keep critical independently for the PMUCRU and CRU

Fix add critical clock for PMUCRU too late in the rk3399_clk_init. It
will be crash if there is one clock want to disable its parent which is
the PPLL.

Change-Id: I3fa236ab78571c8c8ec5d423228d00dbb02f24e6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

UPSTREAM: ASoC: rt5640: Correct the digital interface data select

this patch corrects the interface adc/dac control register definition
according to datasheet.

Change-Id: I0777577d365140b642141596112b662d3a80538b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
(cherry picked from git.kernel.org broonie/sound.git for-next
 commit 653aa4645244042826f105aab1be3d01b3d493ca)

fs: Export d_absolute_path

The 0-day build bot reports the following build error, seen if SDCARD_FS
is built as module.

ERROR: "d_absolute_path" undefined!

Fixes: 84a1b7d3d312 ("Included sdcardfs source code for kernel 3.0")
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Guenter Roeck <groeck@chromium.org>

ARM64: dts: rockchip: rk3399: set each cpu's opp-microvolt to 900000uV

In order to lower the temperature, lower the voltage.

Change-Id: Iae2d103c88ab5b72c3d003c1f84f74e1694c7e1e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

clk: rockchip: rk3399: fix PPLL is redefined and ID shouldn't be 0

PPLL is 8 and redefined by SCLK_I2C4_PMU, and clock IDs shouldn't be 0.

Change-Id: I50f89487034c1f1ef41d257de00b7f3ec53f7f4c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

usb: dwc3: make usb2 phy interface configurable in DT

Add snps,phyif_utmi_16_bits devicetree property. USB2 phy
interface is hardware property, and it's platform dependent,
so we need to configure it in devicetree to set the core to
support a UTMI+ PHY with an 8- or 16-bit interface.

And according to dwc3 databook, the GUSB2PHYCFG.USBTRDTIM
must set to the required values for the usb2 phy interface.

Change-Id: If1c636edc6be3c9a79b4b0b89737a925d8dd3abe
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

usb: dwc3: add dis_u2_freeclk_exists_quirk

Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.

Change-Id: I84ea6eeccb9fc2ea6d13ef586f1166d5fa132606
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

Merge branch 'linux-linaro-lsk-v4.4-android' of git://git.linaro.org/kernel/linux-linaro-stable.git

* linux-linaro-lsk-v4.4-android: (477 commits)
  arm64: vdso: Mark vDSO code as read-only
  ARM/vdso: Mark the vDSO code read-only after init
  x86/vdso: Mark the vDSO code read-only after init
  lkdtm: Verify that '__ro_after_init' works correctly
  arch: Introduce post-init read-only memory
  x86/mm: Always enable CONFIG_DEBUG_RODATA and remove the Kconfig option
  mm/init: Add 'rodata=off' boot cmdline parameter to disable read-only kernel mappings
  asm-generic: Consolidate mark_rodata_ro()
  Linux 4.4.6
  ld-version: Fix awk regex compile failure
  target: Drop incorrect ABORT_TASK put for completed commands
  block: don't optimize for non-cloned bio in bio_get_last_bvec()
  MIPS: smp.c: Fix uninitialised temp_foreign_map
  MIPS: Fix build error when SMP is used without GIC
  ovl: fix getcwd() failure after unsuccessful rmdir
  ovl: copy new uid/gid into overlayfs runtime inode
  userfaultfd: don't block on the last VM updates at exit time
  powerpc/powernv: Fix OPAL_CONSOLE_FLUSH prototype and usages
  powerpc/powernv: Add a kmsg_dumper that flushes console output on panic
  powerpc: Fix dedotify for binutils >= 2.26
  ...

ARM64: dts: rockchip: rk3399: add cpul/cpub assingment clk rate

set clk_cpul:816M clk_cpub:1008M when clk tree init

Change-Id: I8f493ce8479fc670aa05d651db5be354d6870c98
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

ARM64: dts: rk3399-tb: limit emmc freq to 50MHz

Change-Id: Ib9b7c7d7574077e9c265e292b61e6eb0a4511bd8
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

clk: rockchip: rk3399: fix the incorrect name of uart1~3

Change-Id: I32764eb21d31e4527dc90239cb3d4a450f2def6d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

ARM64: dts: rk3366: update gpu's opp table

Change-Id: I1c3ccc7b896b4fe95f834a957a4ebe2aef482806
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

sdcardfs: remove effectless config option

CONFIG_SDCARD_FS_CI_SEARCH only guards a define for
LOOKUP_CASE_INSENSITIVE, which is never used in the
kernel. Remove both, along with the option matching
that supports it.

Change-Id: I363a8f31de8ee7a7a934d75300cc9ba8176e2edf
Signed-off-by: Daniel Rosenberg <drosen@google.com>

inotify: Fix erroneous update of bit count

Patch "vfs: add d_canonical_path for stacked filesystem support"
erroneously updated the ALL_INOTIFY_BITS count. This changes it back

Change-Id: Idb04edc736da276159d30f04c40cff9d6b1e070f

fs: sdcardfs: Declare LOOKUP_CASE_INSENSITIVE unconditionally

Attempts to build sdcardfs as module fail with

fs/sdcardfs/lookup.c: In function '__sdcardfs_lookup':
fs/sdcardfs/lookup.c:243:5: error: 'LOOKUP_CASE_INSENSITIVE' undeclared

This occurs because the define is enclosed with #ifdef
CONFIG_SDCARD_FS_CI_SEARCH. If SDCARD_FS_CI_SEARCH is configured to be
built as module, this does not work. Alternatives would be to use #if
IS_ENABLED(CONFIG_SDCARD_FS_CI_SEARCH), or to declare SDCARD_FS_CI_SEARCH
as bool, but that does not work because the define is used unconditionally
in the source.

Note that LOOKUP_CASE_INSENSITIVE is only set but not evaluated in the
current source code, so setting the flag has no real effect.

Fixes: 84a1b7d3d312 ("Included sdcardfs source code for kernel 3.0")
Cc: Daniel Rosenberg <drosen@google.com>
Signed-off-by: Guenter Roeck <groeck@chromium.org>

trace: cpufreq: fix typo in min/max cpufreq

Change-Id: Ieed402d3a912b7a318826e101efe2c24b07ebfe4
Signed-off-by: Thierry Strudel <tstrudel@google.com>

ARM64: defconfig: add the basic config for 3399 ChromeOS

With this defconfig which inherits from rockchip_defconfig,
ChromeOS boots up to command line.

Change-Id: I646fea9b26d9c235da16d0d2b559290ee5029a12
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>

ARM64: dts: rk3366-tb: add regulator-ramp-delay of vdd_arm

Change-Id: If4eb8f964592d2f6c0e418659b12f672dc9abb94
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>

Documentation: bindings: add compatible entry for Rockchip USB2.0 PHY

1. Compatible "rockchip,rk3399-usb-phy" support to RK3399;
2. Add host_drv_gpio optional property for usb2.0 vbus control.

Change-Id: Idfc6898ca2c519c46dae66d396f501b38e8d73bd
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

ARM64: rockchip_defconfig: enable dwc3 and xhci drivers

Change-Id: I3c3dae4bf999cb3e7141d88bdfa60e50ab46e2fd
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

usb: dwc3: rockchip: Add device tree binding

Rockchip USB3.0 core wrapper consist of USB3.0 IP from Synopsys
(SNPS) and HS, SS PHY's control and configuration registers.

Change-Id: I116b66c3b417cfecc968414db9912813a0ef2c5d
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

usb: dwc3: of-simple: add compatible for rk3399

Change-Id: I0a74fcd97c5be7887b4d14bb708a58a10f70e71c
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>