Unbreak the test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76051 91177308-0d34-0410-b5e6-96231b3b80d8

Expand 32-bit bitconverts via memory

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8

Fix incomin arg stack frame offset in case we need to generate stack frame

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8

Fix instruction mnemonics for some fp_to_sint operations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76048 91177308-0d34-0410-b5e6-96231b3b80d8

i32 values are passed extended also on stack. Handle this in generic way

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76047 91177308-0d34-0410-b5e6-96231b3b80d8

We definitely have 1-0 bools

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76046 91177308-0d34-0410-b5e6-96231b3b80d8

Revert the commit, it just hides the real bug

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8

Out GR128 regclass is not a 'real' i128 one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76044 91177308-0d34-0410-b5e6-96231b3b80d8

Add missed condbranch opcodes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76043 91177308-0d34-0410-b5e6-96231b3b80d8

Handle bitconverts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76042 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak mvi and friends - emit only 'significant' part of the operand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76041 91177308-0d34-0410-b5e6-96231b3b80d8

Expand fp_to_uint too

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76040 91177308-0d34-0410-b5e6-96231b3b80d8

We don't have FP truncstores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76039 91177308-0d34-0410-b5e6-96231b3b80d8

Expand uint_to_fp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76038 91177308-0d34-0410-b5e6-96231b3b80d8

Emit proper rounding mode for fp_to_sint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76037 91177308-0d34-0410-b5e6-96231b3b80d8

f32/f64 regs are stored on stack if we're short in FP regs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76036 91177308-0d34-0410-b5e6-96231b3b80d8

Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8

Make FP zero to be legal FP immediate via LOAD ZERO

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76034 91177308-0d34-0410-b5e6-96231b3b80d8

Loads are not two-address in any way

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76033 91177308-0d34-0410-b5e6-96231b3b80d8

Add LOAD NEGATIVE instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76032 91177308-0d34-0410-b5e6-96231b3b80d8

LOAD COMPLEMENT instruction is not really two-addr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76031 91177308-0d34-0410-b5e6-96231b3b80d8

Add multiple add/sub instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76030 91177308-0d34-0410-b5e6-96231b3b80d8

Handle FP callee-saved regs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76029 91177308-0d34-0410-b5e6-96231b3b80d8

Proper FP extloads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76028 91177308-0d34-0410-b5e6-96231b3b80d8

Add proper PWS impdef's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76027 91177308-0d34-0410-b5e6-96231b3b80d8

Propagate FP select_cc to dag inserters

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76026 91177308-0d34-0410-b5e6-96231b3b80d8

Implement fp_to_sint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76025 91177308-0d34-0410-b5e6-96231b3b80d8

Implement FP regs spills / restores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76024 91177308-0d34-0410-b5e6-96231b3b80d8

Add fabs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76023 91177308-0d34-0410-b5e6-96231b3b80d8

Add fneg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76022 91177308-0d34-0410-b5e6-96231b3b80d8

We don't have native sine / cosine instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76021 91177308-0d34-0410-b5e6-96231b3b80d8

More sint_to_fp stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76020 91177308-0d34-0410-b5e6-96231b3b80d8

Add bunch of FP instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76019 91177308-0d34-0410-b5e6-96231b3b80d8

We don't have any FP extloads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76018 91177308-0d34-0410-b5e6-96231b3b80d8

Implement all comparisons

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76017 91177308-0d34-0410-b5e6-96231b3b80d8

Add constpool lowering / printing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76016 91177308-0d34-0410-b5e6-96231b3b80d8

Allow FP arguments pass / return

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76015 91177308-0d34-0410-b5e6-96231b3b80d8

Register FP regclasses

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76014 91177308-0d34-0410-b5e6-96231b3b80d8

Add FP regs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76013 91177308-0d34-0410-b5e6-96231b3b80d8

Fix fallout from prev. patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76012 91177308-0d34-0410-b5e6-96231b3b80d8

Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8

Use divide single for 32 bit signed divides

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76010 91177308-0d34-0410-b5e6-96231b3b80d8

Add missed operands types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76009 91177308-0d34-0410-b5e6-96231b3b80d8

Missed part of prev. patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76008 91177308-0d34-0410-b5e6-96231b3b80d8

Another attempt to fix prologue emission

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76007 91177308-0d34-0410-b5e6-96231b3b80d8

Implement 'large' PIC model

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8

Implement shifts properly (hopefilly - finally!)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8

Remove redundand register move

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76004 91177308-0d34-0410-b5e6-96231b3b80d8

Properly handle divides. As a bonus - implement memory versions of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8

Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76002 91177308-0d34-0410-b5e6-96231b3b80d8

32 bit rotate is not twoaddr instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76001 91177308-0d34-0410-b5e6-96231b3b80d8

32 bit shifts have only 12 bit displacements

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8

Add proper register aliases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75999 91177308-0d34-0410-b5e6-96231b3b80d8

Properly generate stack frame

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75998 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak indirect branches

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75997 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75996 91177308-0d34-0410-b5e6-96231b3b80d8

Do not forget to save R15 when we allocate stack frame

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75995 91177308-0d34-0410-b5e6-96231b3b80d8

All calls clobbers R14

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75994 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak calls to vararg functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75993 91177308-0d34-0410-b5e6-96231b3b80d8

Stupid typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75992 91177308-0d34-0410-b5e6-96231b3b80d8

Typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75991 91177308-0d34-0410-b5e6-96231b3b80d8

Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8

Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75989 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for 12 bit displacements

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8

We already have reserved call frame regardless whether variable sized frame objects were present or not

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75987 91177308-0d34-0410-b5e6-96231b3b80d8

Emit proper lowering of load from arg stack slot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8

Implement dynamic allocas

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8

Add jump tables

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8

Exapnd br_jt into indirect branch. Provide pattern for indirect branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75983 91177308-0d34-0410-b5e6-96231b3b80d8

Implement 64 bit immediates

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75982 91177308-0d34-0410-b5e6-96231b3b80d8

Add rotates

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75981 91177308-0d34-0410-b5e6-96231b3b80d8

Add patterns for integer negate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8

Provide proper patterns for and with imm instructions. Tune the tests accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75979 91177308-0d34-0410-b5e6-96231b3b80d8

Add 32 bit and reg-imm and disable invalid patterns for now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75978 91177308-0d34-0410-b5e6-96231b3b80d8

Add z9 and z10 target processors. Mark z10-only instructions as such.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8

Fix MUL64rm instruction asmprinting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75976 91177308-0d34-0410-b5e6-96231b3b80d8

Preliminary asmprinting of globals

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75975 91177308-0d34-0410-b5e6-96231b3b80d8

Implement asmprinting for odd-even regpairs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75974 91177308-0d34-0410-b5e6-96231b3b80d8

32-bit ri addressing mode has only 12-bit displacement

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75973 91177308-0d34-0410-b5e6-96231b3b80d8

Forgot to add

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75972 91177308-0d34-0410-b5e6-96231b3b80d8

Do not put bunch of target-specific stuff into common namespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75971 91177308-0d34-0410-b5e6-96231b3b80d8

Print signed imms properly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75970 91177308-0d34-0410-b5e6-96231b3b80d8

Provide hooks for spilling / restoring stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75969 91177308-0d34-0410-b5e6-96231b3b80d8

Revert thinko

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75968 91177308-0d34-0410-b5e6-96231b3b80d8

Temporary workaround problem with signed 32-bit imm's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75967 91177308-0d34-0410-b5e6-96231b3b80d8

Implement InsertBranch() hook

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75966 91177308-0d34-0410-b5e6-96231b3b80d8

Pipehole pattern for i32 imm's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75965 91177308-0d34-0410-b5e6-96231b3b80d8

Bunch of sext_inreg patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75964 91177308-0d34-0410-b5e6-96231b3b80d8

Provide normal 32 bit load and store

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75963 91177308-0d34-0410-b5e6-96231b3b80d8

Proper lower 'small' results

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8

Completel forgot about unconditional branches

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75961 91177308-0d34-0410-b5e6-96231b3b80d8

Lower addresses of globals

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75960 91177308-0d34-0410-b5e6-96231b3b80d8

Test (incomplete) for easy muls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75959 91177308-0d34-0410-b5e6-96231b3b80d8

Provide "wide" muls and divs/rems

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75958 91177308-0d34-0410-b5e6-96231b3b80d8

Fix thinko

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75957 91177308-0d34-0410-b5e6-96231b3b80d8

Fix epic bug with invalid regclass for R0D

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75956 91177308-0d34-0410-b5e6-96231b3b80d8

Let RegisterInfo decide whether it can emit cross-class copy or not

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75955 91177308-0d34-0410-b5e6-96231b3b80d8

More register pairs (now 32 bit ones)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75954 91177308-0d34-0410-b5e6-96231b3b80d8

Add even-odd register pairs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75953 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak due to mainline api change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75952 91177308-0d34-0410-b5e6-96231b3b80d8