Preserve MachineMemOperands in ARMLoadStoreOptimizer.

Fixes PR8113.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144409 91177308-0d34-0410-b5e6-96231b3b80d8

ARM allow Q registers in vldm/vstm register lists.

rdar://9672822

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144407 91177308-0d34-0410-b5e6-96231b3b80d8

build/Make: Switch back to llvm-config for now, I foolishly forgot to think
about cross compiles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144406 91177308-0d34-0410-b5e6-96231b3b80d8

Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144399 91177308-0d34-0410-b5e6-96231b3b80d8

Move X86 specific test in X86 directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144395 91177308-0d34-0410-b5e6-96231b3b80d8

Move X86 specific test in X86 directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144394 91177308-0d34-0410-b5e6-96231b3b80d8

Remove FIXME comment that should have been removed with r144351.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144392 91177308-0d34-0410-b5e6-96231b3b80d8

allow non-device function calls in PTX when natively handling device-side printf

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144388 91177308-0d34-0410-b5e6-96231b3b80d8

add rules in tabgen for PTX COPY_ADDRESS of frameindex

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144387 91177308-0d34-0410-b5e6-96231b3b80d8

Clients are responsible for initializing the targets, remove it from the disassembler API.

This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness
should be unaffected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144385 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144384 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144383 91177308-0d34-0410-b5e6-96231b3b80d8

Add lowering for AVX2 shift instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144380 91177308-0d34-0410-b5e6-96231b3b80d8

Rename variables to avoid confusion.  No functionallity change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144377 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for using immediates with select instructions.
rdar://10412592

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144376 91177308-0d34-0410-b5e6-96231b3b80d8

Do not try to detect DAG combine patterns for integer multiply-add/sub if value
type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144373 91177308-0d34-0410-b5e6-96231b3b80d8

64-bit atomic instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144372 91177308-0d34-0410-b5e6-96231b3b80d8

Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144371 91177308-0d34-0410-b5e6-96231b3b80d8

Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144370 91177308-0d34-0410-b5e6-96231b3b80d8

64-bit versions of jal, jalr and bal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144368 91177308-0d34-0410-b5e6-96231b3b80d8

Emit Mips64's sequence of instructions that set global register in prologue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144367 91177308-0d34-0410-b5e6-96231b3b80d8

Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
VK_Mips_GPOFF_HI/LO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144366 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure to expand SIGN_EXTEND_INREG for NEON vectors.  PR11319, round 3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144361 91177308-0d34-0410-b5e6-96231b3b80d8

Initialize variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144360 91177308-0d34-0410-b5e6-96231b3b80d8

When loading a value, treat an i1 as an i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144356 91177308-0d34-0410-b5e6-96231b3b80d8

If we have a DIE with an AT_specification use that instead of the normal
addr DIE when adding to the dwarf accelerator tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144354 91177308-0d34-0410-b5e6-96231b3b80d8

Get rid of an optimization in SCCP which appears to have many issues.  Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which
lead to it trying to re-mark a value marked as a constant with a different value.  It also appears to trigger very rarely.

Fixes PR11357.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144352 91177308-0d34-0410-b5e6-96231b3b80d8

Reenable compact unwinding now that <rdar://problem/10430076> is fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144351 91177308-0d34-0410-b5e6-96231b3b80d8

If we have to reset the calculation of the compact encoding, then also reset the
"saved register" index.
<rdar://problem/10430076>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144350 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for using MVN to materialize negative constants.
rdar://10412592

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144348 91177308-0d34-0410-b5e6-96231b3b80d8

Disable compact unwind generation until I can solve the codegen problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144346 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-build: Add --configure-target-def-file option.
 - Can be used to generate the substitution values we currently use for the various target related .def files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144345 91177308-0d34-0410-b5e6-96231b3b80d8

LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144344 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.

rdar://10429490

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144338 91177308-0d34-0410-b5e6-96231b3b80d8

ARM let processInstruction() tranforms chain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144337 91177308-0d34-0410-b5e6-96231b3b80d8

Add blurb for VMKit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144336 91177308-0d34-0410-b5e6-96231b3b80d8

build/Make: llvm-config-2 needs to use EXEEXT, since it is an actual executable
now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144335 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144334 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb2 parsing for push/pop w/ hi registers in the reglist.

rdar://10130228.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144331 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb1 diagnostics for reglist on PUSH/POP fix.

Was not checking the first register in the register list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144329 91177308-0d34-0410-b5e6-96231b3b80d8

git: Add tools/lldb to the ignore list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144328 91177308-0d34-0410-b5e6-96231b3b80d8

Check in getOrCreateSubprogramDIE if a declaration exists and if so output
it first.

This is a more general fix to pr11300.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144324 91177308-0d34-0410-b5e6-96231b3b80d8

build/Make: Try to switch over to llvm-config-2 again, now that I've cleaned up
some more of the explicit dependencies. I'm staging things more slowly this time
in case there is more unanticipated fallout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144323 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb MUL assembly parsing for 3-operand form.

Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.

rdar://10428630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144322 91177308-0d34-0410-b5e6-96231b3b80d8

build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler
that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144321 91177308-0d34-0410-b5e6-96231b3b80d8

build/MCDisassembler: Fix required libraries list of MCDisassembler to use
all-targets instead of an explicit list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144320 91177308-0d34-0410-b5e6-96231b3b80d8

Make types and namespaces take multiple DIEs for the accelerator tables
as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144319 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a really ancient line from the default 'make clean' rule that attempts
to delete core files.  This causes a warning in clang/lib/StaticAnalyzer on
case insensitive filesystems, since it contains a "Core" directory.  Since this
is pointless anyway, just zap it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144317 91177308-0d34-0410-b5e6-96231b3b80d8

When in ARM mode, LDRH/STRH require special handling of negative offsets.
For correctness, disable this for now.
rdar://10418009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144316 91177308-0d34-0410-b5e6-96231b3b80d8

ARM .thumb_func directive for quoted symbol names.

Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.

rdar://10428015

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144315 91177308-0d34-0410-b5e6-96231b3b80d8

test commit undo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144314 91177308-0d34-0410-b5e6-96231b3b80d8

test commit redux

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144313 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed bug in DeadStoreElimination commit r144239

Size of data being pointed to wasn't always being checked so some small writes were killing big writes

Fixes <rdar://problem/10426753>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144312 91177308-0d34-0410-b5e6-96231b3b80d8

random notes, llvm-gcc is gone, fix a few broken tags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144311 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r144300 "llvm-config: Replace with C++ version (was llvm-config-2).",
which didn't appear ready for prime time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144309 91177308-0d34-0410-b5e6-96231b3b80d8

undo test commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144308 91177308-0d34-0410-b5e6-96231b3b80d8

test commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144307 91177308-0d34-0410-b5e6-96231b3b80d8

Move type handling to make sure we get all created types that aren't
forward decls and have names into the dwarf accelerator types table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144306 91177308-0d34-0410-b5e6-96231b3b80d8

Rework adding function names to the dwarf accelerator tables, allow
multiple dies per function and support C++ basenames.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144304 91177308-0d34-0410-b5e6-96231b3b80d8

Add additional checking to ensure that MachineMemOperands are never set to null, which can happen in weird circumstances where target intrinsic hooks are implemented incorrectly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144303 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing for LSR/LSL/ROR(immediate).

More of rdar://9704684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144301 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-config: Replace with C++ version (was llvm-config-2).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144300 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-config-2: Use USEDLIBS directly instead of LINK_COMPONENTS, which will
require this tool to resolve (currently).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144299 91177308-0d34-0410-b5e6-96231b3b80d8

Release notes for DragonEgg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144298 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing for ASR(immediate).

Start of rdar://9704684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144293 91177308-0d34-0410-b5e6-96231b3b80d8

build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for
consistency with other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144292 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-config-2: Fix thinko in maintenance of visited component set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144291 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/X86/lsr-loop-exit-cond.ll: Try to appease linux and freebsd bots to specify explicit -mtriple=x86_64-darwin.

I guess it expects -relocation-model=pic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144290 91177308-0d34-0410-b5e6-96231b3b80d8

Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
instruction lower optimization" in the pre-RA scheduler.

The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.

Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144267 91177308-0d34-0410-b5e6-96231b3b80d8

AVX2: Add variable shift from memory.

Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144266 91177308-0d34-0410-b5e6-96231b3b80d8

For immediate encodings of icmp, zero or sign extend first.  Then
determine if the value is negative and flip the sign accordingly.
rdar://10422026

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144258 91177308-0d34-0410-b5e6-96231b3b80d8

build/Make & CMake: Pass the appropriate --native-target and --enable-targets
options to llvm-build, so the all-targets etc. components are defined properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144255 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-build: Add --native-target and --enable-targets options, and add logic to
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
 - We still require these components to be in the project (currently in
   lib/Target) so that we have a place to document them and hopefully make it
   more obvious that they are "magic".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144253 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-build: Split out the validation logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144252 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-build: Change CBackend and CppBackend to not use library_name. This will
change the generated library .a file name once we fully switch over, but
simplifies how we treat these targets without requiring more special casing
(since their library group name and the codegen library name currently map to
the same "llvm-config" style component name).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144251 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-build: Add an explicit component type to represent targets.
 - Gives us a place to hang target specific metadata (like whether the target has a JIT).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144250 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-build: Tidy up options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144249 91177308-0d34-0410-b5e6-96231b3b80d8

Strip old implicit operands after foldMemoryOperand.

The TII.foldMemoryOperand hook preserves implicit operands from the
original instruction.  This is not what we want when those implicit
operands refer to the register being spilled.

Implicit operands referring to other registers are preserved.

This fixes PR11347.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144247 91177308-0d34-0410-b5e6-96231b3b80d8

Remove this from the CMake build since I erased the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144245 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144244 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the old-style ARM disassembler, which is no longer used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144243 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb2 assembly parsing STMDB w/ optional .w suffix.

rdar://10422955

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144242 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144241 91177308-0d34-0410-b5e6-96231b3b80d8

DeadStoreElimination can now trim the size of a store if the end of the store is dead.

Currently checks alignment and killing stores on a power of 2 boundary as this is likely
to trim the size of the earlier store without breaking large vector stores into scalar ones.

Fixes <rdar://problem/10140300>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144239 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144236 91177308-0d34-0410-b5e6-96231b3b80d8

Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8

The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.
rdar://10418009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144213 91177308-0d34-0410-b5e6-96231b3b80d8

AVX2: Add patterns for variable shift operations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144212 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unnecessary include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144211 91177308-0d34-0410-b5e6-96231b3b80d8

Use REs to remove dependencies on the register allocation order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8

Reformat the quote and tag the math stuff with <tt> tags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144204 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-config: Drop 'backend' pseudo-component. We don't support/qualify the CBE
enough to have this be useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144202 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-config-2: Switch to using real library dependency table.
 - Also, fix a refacto that left extra "all" component in list (this is now
   defined in the groups explicitly)
 - Reapply of r143879 now that Make should see needed deps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144201 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144198 91177308-0d34-0410-b5e6-96231b3b80d8

build/Make: Fix some missing dependencies on the llvm-build generation step.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144197 91177308-0d34-0410-b5e6-96231b3b80d8

Add comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144194 91177308-0d34-0410-b5e6-96231b3b80d8

Speculatively revert commit 144124 (djg) in the hope that the 32 bit
dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages).  Original commit message:

Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144188 91177308-0d34-0410-b5e6-96231b3b80d8

Add AVX2 support for vselect of v32i8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144187 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify code. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144186 91177308-0d34-0410-b5e6-96231b3b80d8

Take advantage of the zero byte in StringMap when emitting dwarf stringpool entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144184 91177308-0d34-0410-b5e6-96231b3b80d8