Evan Cheng [Sat, 7 Jan 2012 03:02:36 +0000 (03:02 +0000)]
Added a late machine instruction copy propagation pass. This catches
opportunities that only present themselves after late optimizations
such as tail duplication .e.g.
## BB#1:
movl %eax, %ecx
movl %ecx, %eax
ret
The register allocator also leaves some of them around (due to false
dep between copies from phi-elimination, etc.)
This required some changes in codegen passes. Post-ra scheduler and the
pseudo-instruction expansion passes have been moved after branch folding
and tail merging. They were before branch folding before because it did
not always update block livein's. That's fixed now. The pass change makes
independently since we want to properly schedule instructions after
branch folding / tail duplication.
rdar://
10428165
rdar://
10640363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147716
91177308-0d34-0410-b5e6-
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Evan Cheng [Sat, 7 Jan 2012 02:55:54 +0000 (02:55 +0000)]
Copy implicit defs (e.g. r0) when changing tBX_RET to tPOP_RET. This bug is
exposed with an upcoming change will would delete the copy to return register
because there is no use! It's amazing anything works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147715
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Sat, 7 Jan 2012 01:47:05 +0000 (01:47 +0000)]
Use movw+movt in ARMFastISel::ARMMaterializeGV.
This eliminates a lot of constant pool entries for -O0 builds of code
with many global variable accesses.
This speeds up -O0 codegen of consumer-typeset by 2x because the
constant island pass no longer has to look at thousands of constant pool
entries.
<rdar://problem/
10629774>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147712
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Andrew Trick [Sat, 7 Jan 2012 01:36:44 +0000 (01:36 +0000)]
LSR: run DeleteDeadPhis before replaceCongruentPhis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147711
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Devang Patel [Sat, 7 Jan 2012 01:33:34 +0000 (01:33 +0000)]
Refactor.
Store AsmParser info locally. A small step towards emitting match entries for multiple asm variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147710
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Andrew Trick [Sat, 7 Jan 2012 01:29:21 +0000 (01:29 +0000)]
Cleanup comments and argument types related to my previous replaceCongruentPhis checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147709
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Devang Patel [Sat, 7 Jan 2012 01:22:23 +0000 (01:22 +0000)]
Eliminate an error check that may not work with all asm syntax variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147708
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Andrew Trick [Sat, 7 Jan 2012 01:12:09 +0000 (01:12 +0000)]
Extended replaceCongruentPhis to handle mixed phi types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147707
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Eric Christopher [Sat, 7 Jan 2012 01:02:09 +0000 (01:02 +0000)]
Make the 'x' constraint work for AVX registers as well.
Fixes rdar://
10614894
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147704
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Andrew Trick [Sat, 7 Jan 2012 00:54:28 +0000 (00:54 +0000)]
Missing raw_ostream.h breaks MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147703
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Andrew Trick [Sat, 7 Jan 2012 00:29:20 +0000 (00:29 +0000)]
comment typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147701
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Andrew Trick [Sat, 7 Jan 2012 00:27:31 +0000 (00:27 +0000)]
Expose isNonConstantNegative to users of ScalarEvolution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147700
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Chad Rosier [Fri, 6 Jan 2012 23:45:47 +0000 (23:45 +0000)]
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147696
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Eric Christopher [Fri, 6 Jan 2012 23:03:37 +0000 (23:03 +0000)]
Add a comment and ensure that anyone else looking at this code doesn't start
to bleed from the eyes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147695
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Eric Christopher [Fri, 6 Jan 2012 23:03:34 +0000 (23:03 +0000)]
Use const vector references instead of a vector copy. Spotted by Devang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147694
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Eric Christopher [Fri, 6 Jan 2012 23:03:27 +0000 (23:03 +0000)]
Use -> instead of (*iter).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147693
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Jakob Stoklund Olesen [Fri, 6 Jan 2012 22:19:37 +0000 (22:19 +0000)]
Enable aligned NEON spilling by default.
Experiments show this to be a small speedup for modern ARM cores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147689
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Andrew Trick [Fri, 6 Jan 2012 21:41:55 +0000 (21:41 +0000)]
Put all IVUsers in the processed set. Allow querying IVUsers with isIVUserOrOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147686
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Jakob Stoklund Olesen [Fri, 6 Jan 2012 21:40:15 +0000 (21:40 +0000)]
Abort AdjustBBOffsetsAfter early when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147685
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Daniel Dunbar [Fri, 6 Jan 2012 21:39:06 +0000 (21:39 +0000)]
lit/lit.TestRunner: Add an extra_substitutions argument for executeShTest --
useful for test suites which want to piggyback onto the "shtest" format style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147684
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Andrew Trick [Fri, 6 Jan 2012 21:23:43 +0000 (21:23 +0000)]
SCEVExpander: hoistStep should check strict dominance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147683
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Andrew Trick [Fri, 6 Jan 2012 21:16:27 +0000 (21:16 +0000)]
Tracing to help investigate issues with SjLj spill code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147682
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Chad Rosier [Fri, 6 Jan 2012 20:11:59 +0000 (20:11 +0000)]
Initializing to false makes better sense. Thanks, David.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147679
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Chad Rosier [Fri, 6 Jan 2012 20:02:49 +0000 (20:02 +0000)]
Fix uninitialized variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147676
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Chad Rosier [Fri, 6 Jan 2012 19:59:58 +0000 (19:59 +0000)]
Fix uninitialized variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147675
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Eric Christopher [Fri, 6 Jan 2012 19:35:04 +0000 (19:35 +0000)]
Fix a leak I noticed while reviewing the accelerator table changes. Passes
lldb testsuite.
rdar://
10652330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147673
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Kostya Serebryany [Fri, 6 Jan 2012 18:09:21 +0000 (18:09 +0000)]
[asan] cleanup: remove the SIGILL-related code (compiler part)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147667
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Eli Bendersky [Fri, 6 Jan 2012 07:49:17 +0000 (07:49 +0000)]
Fix typo in string
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147654
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Eric Christopher [Fri, 6 Jan 2012 04:35:23 +0000 (04:35 +0000)]
As part of the ongoing work in finalizing the accelerator tables, extend
the debug type accelerator tables to contain the tag and a flag
stating whether or not a compound type is a complete type.
rdar://
10652330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147651
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Dan Gohman [Thu, 5 Jan 2012 23:58:56 +0000 (23:58 +0000)]
Fix SpeculativelyExecuteBB to either speculate all or none of the phis
present in the bottom of the CFG triangle, as the transformation isn't
ever valuable if the branch can't be eliminated.
Also, unify some heuristics between SimplifyCFG's multiple
if-converters, for consistency.
This fixes rdar://
10627242.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147630
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Eli Friedman [Thu, 5 Jan 2012 23:03:32 +0000 (23:03 +0000)]
PR11705, part 2: globalopt shouldn't put inttoptr/ptrtoint operations into global initializers if there's an implied extension or truncation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147625
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Rafael Espindola [Thu, 5 Jan 2012 23:02:01 +0000 (23:02 +0000)]
Link symbols with different visibilities according to the rules in the
System V Application Binary Interface. This lets us use
-fvisibility-inlines-hidden with LTO.
Fixes PR11697.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147624
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Dan Gohman [Thu, 5 Jan 2012 22:54:35 +0000 (22:54 +0000)]
Revert r56315. When the instruction to speculate is a load, this
code can incorrectly move the load across a store. This never
happens in practice today, but only because the current
heuristics accidentally preclude it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147623
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Benjamin Kramer [Thu, 5 Jan 2012 22:31:37 +0000 (22:31 +0000)]
Kill ObjectCodeEmitter and BinaryObject, they were unused and superseded by MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147618
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Nick Lewycky [Thu, 5 Jan 2012 22:21:45 +0000 (22:21 +0000)]
SCCCaptured is trivially false on entry to this loop and not modified inside it.
Eliminate the dead test for it on each loop iteration. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147616
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Rafael Espindola [Thu, 5 Jan 2012 22:07:43 +0000 (22:07 +0000)]
Remove the old ELF writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147615
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Danil Malyshev [Thu, 5 Jan 2012 21:16:14 +0000 (21:16 +0000)]
A small re-factored JIT/MCJIT::getPointerToNamedFunction(), so it could be called with the base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147610
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Sebastian Pop [Thu, 5 Jan 2012 18:28:46 +0000 (18:28 +0000)]
revert r147542 after comments from Joerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147608
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Chris Lattner [Thu, 5 Jan 2012 17:35:07 +0000 (17:35 +0000)]
allow clients of SmallSet to specify their own comparison function for the set.
Patch by Stepan Dyatkovskiy!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147607
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Chandler Carruth [Thu, 5 Jan 2012 11:25:47 +0000 (11:25 +0000)]
Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147605
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Chandler Carruth [Thu, 5 Jan 2012 11:05:55 +0000 (11:05 +0000)]
Prevent a DAGCombine from firing where there are two uses of
a combined-away node and the result of the combine isn't substantially
smaller than the input, it's just canonicalized. This is the first part
of a significant (7%) performance gain for Snappy's hot decompression
loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147604
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Chandler Carruth [Thu, 5 Jan 2012 11:05:47 +0000 (11:05 +0000)]
Cleanup and FileCheck-ize a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147603
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 5 Jan 2012 08:56:10 +0000 (08:56 +0000)]
Mark scalar FMA4 instructions as ignoring the VEX.L bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147602
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Victor Umansky [Thu, 5 Jan 2012 08:46:19 +0000 (08:46 +0000)]
Peephole optimization of ptest-conditioned branch in X86 arch. Performs instruction combining of sequences generated by ptestz/ptestc intrinsics to ptest+jcc pair for SSE and AVX.
Testing: passed 'make check' including LIT tests for all sequences being handled (both SSE and AVX)
Reviewers: Evan Cheng, David Blaikie, Bruno Lopes, Elena Demikhovsky, Chad Rosier, Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147601
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Eli Bendersky [Thu, 5 Jan 2012 08:18:41 +0000 (08:18 +0000)]
test commit (verifyiing commit access)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147600
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Andrew Trick [Thu, 5 Jan 2012 02:52:11 +0000 (02:52 +0000)]
Minor postra scheduler cleanup. It could result in more precise antidependence latency on ARM in exceedingly rare cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147594
91177308-0d34-0410-b5e6-
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Bill Wendling [Thu, 5 Jan 2012 02:13:20 +0000 (02:13 +0000)]
Replace the uint64_t -> double convertion algorithm with one that's more efficient.
This small bit of ASM code is sufficient to do what the old algorithm did:
movq %rax, %xmm0
punpckldq (c0), %xmm0 // c0: (uint4){ 0x43300000U, 0x45300000U, 0U, 0U }
subpd (c1), %xmm0 // c1: (double2){ 0x1.0p52, 0x1.0p52 * 0x1.0p32 }
#ifdef __SSE3__
haddpd %xmm0, %xmm0
#else
pshufd $0x4e, %xmm0, %xmm1
addpd %xmm1, %xmm0
#endif
It's arguably faster. One caveat, the 'haddpd' instruction isn't very fast on
all processors.
<rdar://problem/
7719814>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147593
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Andrew Trick [Thu, 5 Jan 2012 01:01:01 +0000 (01:01 +0000)]
comment cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147585
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Devang Patel [Thu, 5 Jan 2012 00:51:28 +0000 (00:51 +0000)]
Do not hard code asm variant number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147583
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Benjamin Kramer [Thu, 5 Jan 2012 00:43:34 +0000 (00:43 +0000)]
FileCheck hygiene.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147580
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Jakob Stoklund Olesen [Thu, 5 Jan 2012 00:26:57 +0000 (00:26 +0000)]
Reapply r146997, "Heed spill slot alignment on ARM."
Now that canRealignStack() understands frozen reserved registers, it is
safe to use it for aligned spill instructions.
It will only return true if the registers reserved at the beginning of
register allocation allow for dynamic stack realignment.
<rdar://problem/
10625436>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147579
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 5 Jan 2012 00:26:52 +0000 (00:26 +0000)]
Avoid reserving an ARM base pointer during register allocation.
Once register allocation has started the reserved registers are frozen.
Fix the ARM canRealignStack() hook to respect the frozen register state.
Now the hook returns false if register allocation was started with frame
pointer elimination enabled.
It also returns false if register allocation started without a reserved
base pointer, and stack realignment would require a base pointer. This
bug was breaking oggenc on armv6.
No test case, an upcoming patch will use this functionality to realign
the stack for spill slots when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147578
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 5 Jan 2012 00:26:49 +0000 (00:26 +0000)]
Freeze reserved registers before starting register allocation.
The register allocators don't currently support adding reserved
registers while they are running. Extend the MRI API to keep track of
the set of reserved registers when register allocation started.
Target hooks like hasFP() and needsStackRealignment() can look at this
set to avoid reserving more registers during register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147577
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Dan Gohman [Wed, 4 Jan 2012 23:01:09 +0000 (23:01 +0000)]
Generalize isSafeToSpeculativelyExecute to work on arbitrary
Values, rather than just Instructions, since it's interesting
for ConstantExprs too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147560
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Benjamin Kramer [Wed, 4 Jan 2012 22:06:45 +0000 (22:06 +0000)]
Silence warnings of a mysterious compiler that still defaults to C89.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147553
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Benjamin Kramer [Wed, 4 Jan 2012 21:41:24 +0000 (21:41 +0000)]
Simplify more DenseMap.find users.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147550
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Benjamin Kramer [Wed, 4 Jan 2012 20:45:14 +0000 (20:45 +0000)]
StringMap.find never points to an empty bucket or tombstone, skip the check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147546
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Benjamin Kramer [Wed, 4 Jan 2012 20:20:08 +0000 (20:20 +0000)]
Simplify code. No functionality change.
Using DenseMap iterators isn't free as they have to check for empty
buckets. Dominator queries are common so this gives a minor speedup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147544
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Sebastian Pop [Wed, 4 Jan 2012 19:47:22 +0000 (19:47 +0000)]
use getHostTriple instead of getDefaultTargetTriple in getClosestTargetForJIT
Get back getHostTriple.
For JIT compilation, use the host triple instead of the default
target: this fixes some JIT testcases that used to fail when the
compiler has been configured as a cross compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147542
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Akira Hatanaka [Wed, 4 Jan 2012 19:29:11 +0000 (19:29 +0000)]
Enable -soft-float for MIPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147541
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Nick Lewycky [Wed, 4 Jan 2012 09:42:30 +0000 (09:42 +0000)]
Remove pointless asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147529
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Nick Lewycky [Wed, 4 Jan 2012 09:28:29 +0000 (09:28 +0000)]
Teach instcombine all sorts of great stuff about shifts that have exact, nuw or
nsw bits on them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147528
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Craig Topper [Wed, 4 Jan 2012 09:23:09 +0000 (09:23 +0000)]
Allow vector shuffle normalizing to use concat vector even if the sources are commuted in the shuffle mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147527
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Craig Topper [Wed, 4 Jan 2012 08:07:43 +0000 (08:07 +0000)]
Implement VECTOR_SHUFFLE canonicalizations during DAG combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147525
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NAKAMURA Takumi [Wed, 4 Jan 2012 03:52:23 +0000 (03:52 +0000)]
test/CodeGen/X86/jump_sign.ll: Add -mcpu=pentiumpro for non-x86 hosts. It uses "cmov".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147521
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Akira Hatanaka [Wed, 4 Jan 2012 03:09:26 +0000 (03:09 +0000)]
Rename immLUiOpnd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147519
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Akira Hatanaka [Wed, 4 Jan 2012 03:02:47 +0000 (03:02 +0000)]
- Define base classes for Jump-and-link instructions and make 32-bit and 64-bit
versions derive from them.
- JALR64 is not needed since N64 does not emit jal.
- Add template parameter to BranchLink that sets the rt field.
- Fix the set of temporary registers for O32 and N64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147518
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Akira Hatanaka [Wed, 4 Jan 2012 02:45:01 +0000 (02:45 +0000)]
Have getRegForInlineAsmConstraint return the correct register class when target
is Mips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147516
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Evan Cheng [Wed, 4 Jan 2012 01:55:04 +0000 (01:55 +0000)]
Fix more places which should be checking for iOS, not darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147513
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Evan Cheng [Wed, 4 Jan 2012 01:41:39 +0000 (01:41 +0000)]
For x86, canonicalize max
(x > y) ? x : y
=>
(x >= y) ? x : y
So for something like
(x - y) > 0 : (x - y) ? 0
It will be
(x - y) >= 0 : (x - y) ? 0
This makes is possible to test sign-bit and eliminate a comparison against
zero. e.g.
subl %esi, %edi
testl %edi, %edi
movl $0, %eax
cmovgl %edi, %eax
=>
xorl %eax, %eax
subl %esi, $edi
cmovsl %eax, %edi
rdar://
10633221
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147512
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Kostya Serebryany [Wed, 4 Jan 2012 01:02:14 +0000 (01:02 +0000)]
[asan] one more test for asan instrumentation: (*a)++ should be instrumented only once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147509
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Chris Lattner [Tue, 3 Jan 2012 23:51:01 +0000 (23:51 +0000)]
Turn a few more inline asm errors into "emitErrors" instead of fatal errors.
Before we'd get:
$ clang t.c
fatal error: error in backend: Invalid operand for inline asm constraint 'i'!
Now we get:
$ clang t.c
t.c:16:5: error: invalid operand for inline asm constraint 'i'!
"movq (%4), %%mm0\n"
^
Which at least gets us the inline asm that is the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147502
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Chris Lattner [Tue, 3 Jan 2012 23:47:05 +0000 (23:47 +0000)]
generalize LLVMContext::emitError to take a twine instead of a StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147501
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Chad Rosier [Tue, 3 Jan 2012 23:19:12 +0000 (23:19 +0000)]
Fix 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147495
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Jakob Stoklund Olesen [Tue, 3 Jan 2012 23:04:28 +0000 (23:04 +0000)]
Don't use enums larger than 1 << 31 for target features.
Patch by Andy Zhang!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147491
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Jakob Stoklund Olesen [Tue, 3 Jan 2012 22:34:35 +0000 (22:34 +0000)]
Revert r146997, "Heed spill slot alignment on ARM."
This patch caused a miscompilation of oggenc because a frame pointer was
suddenly needed halfway through register allocation.
<rdar://problem/
10625436>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147487
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Jakob Stoklund Olesen [Tue, 3 Jan 2012 22:34:31 +0000 (22:34 +0000)]
Assert when reserved registers have been assigned.
This can only happen if the set of reserved registers changes during
register allocation.
<rdar://problem/
10625436>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147486
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Nadav Rotem [Tue, 3 Jan 2012 22:19:42 +0000 (22:19 +0000)]
Revert 147426 because it caused pr11696.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147485
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Nadav Rotem [Tue, 3 Jan 2012 22:12:28 +0000 (22:12 +0000)]
Fix incorrect widening of the bitcast sdnode in case the incoming operand is integer-promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147484
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Chad Rosier [Tue, 3 Jan 2012 21:05:52 +0000 (21:05 +0000)]
Enhance DAGCombine for transforming 128->256 casts into a vmovaps, rather
then a vxorps + vinsertf128 pair if the original vector came from a load.
rdar://
10594409
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147481
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Nick Lewycky [Tue, 3 Jan 2012 20:33:00 +0000 (20:33 +0000)]
Conform to the style guide; remove 'else' after 'return'. Also remove an extra
if-statement by turning it into an assert. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147474
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Owen Anderson [Tue, 3 Jan 2012 20:09:02 +0000 (20:09 +0000)]
Remove the restriction that target intrinsics can only involve legal types. Targets can perfects well support intrinsics on illegal types, as long as they are prepared to perform custom expansion during type legalization. For example, a target where i64 is illegal might still support the i64 intrinsic operation using pairs of i32's. ARM already does some expansions like this for non-intrinsic operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147472
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Lang Hames [Tue, 3 Jan 2012 20:05:57 +0000 (20:05 +0000)]
Clarified assert text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147471
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Stepan Dyatkovskiy [Tue, 3 Jan 2012 20:04:35 +0000 (20:04 +0000)]
Fix for PR11652: assertion failures when Type.cpp is compiled with -Os
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147470
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Matt Beaumont-Gay [Tue, 3 Jan 2012 19:03:59 +0000 (19:03 +0000)]
Fix malformed assert.
If anybody has strong feelings about 'default: assert(0 && "blah")' vs
'default: llvm_unreachable("blah")', feel free to regularize the instances of
each in this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147459
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Eric Christopher [Tue, 3 Jan 2012 18:38:37 +0000 (18:38 +0000)]
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147456
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Nick Lewycky [Tue, 3 Jan 2012 18:22:43 +0000 (18:22 +0000)]
Fix typo in ruler. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147454
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Devang Patel [Tue, 3 Jan 2012 18:22:10 +0000 (18:22 +0000)]
Intel style asm variant does not need '%' prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147453
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Stepan Dyatkovskiy [Tue, 3 Jan 2012 14:05:04 +0000 (14:05 +0000)]
Type: replaced usage of ID with getTypeID().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147446
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Elena Demikhovsky [Tue, 3 Jan 2012 11:59:04 +0000 (11:59 +0000)]
Fixed a bug in SelectionDAG.cpp.
The failure seen on win32, when i64 type is illegal.
It happens on stage of conversion VECTOR_SHUFFLE to BUILD_VECTOR.
The failure message is:
llc: SelectionDAG.cpp:784: void VerifyNodeCommon(llvm::SDNode*): Assertion `(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && "Wrong operand type!"' failed.
I added a special test that checks vector shuffle on win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147445
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Andrew Trick [Mon, 2 Jan 2012 21:25:10 +0000 (21:25 +0000)]
Fix SCEVExpander to handle loops with no preheader when LSR gives it a
"phony" insertion point.
Fixes rdar://
10619599: "SelectionDAGBuilder shouldn't visit PHI nodes!" assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147439
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Duncan Sands [Mon, 2 Jan 2012 16:55:01 +0000 (16:55 +0000)]
Correct spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147435
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Chandler Carruth [Mon, 2 Jan 2012 09:19:48 +0000 (09:19 +0000)]
Undo the hack in r147427 and move this unittest to a better home. This
is testing the bitcode reader's functionality, not VMCore's. Add the
what is a hope sufficient build system mojo to build and run a new
unittest.
Also clean up some of the test's naming. The goal for the file should be
to unittest the Bitcode Reader, and this is just one particular test
among potentially many in the future. Also, reverse my position and
relegate the PR# to a comment, but stash the comment on the same line as
the test name so it doesn't get lost. This makes the code more
self-documenting hopefully w/o losing track of the PR number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147431
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Craig Topper [Mon, 2 Jan 2012 09:17:37 +0000 (09:17 +0000)]
Miscellaneous shuffle lowering cleanup. No functional changes. Primarily converting the indexing loops to unsigned to be consistent across functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147430
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Craig Topper [Mon, 2 Jan 2012 08:46:48 +0000 (08:46 +0000)]
Make CanXFormVExtractWithShuffleIntoLoad reject loads with multiple uses. Also make it return false if there's not even a load at all. This makes the code better match the code in DAGCombiner that it tries to match. These two changes prevent some cases where vector_shuffles were making it to instruction selection and causing the older shuffle selection code to be triggered. Also needed to fix a bad pattern that this change exposed. This is the first step towards getting rid of the old shuffle selection support. No test cases yet because there's no way to tell whether a shuffle was handled in the legalize stage or at instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147428
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Chandler Carruth [Mon, 2 Jan 2012 08:40:40 +0000 (08:40 +0000)]
Fix unittest makefile after r147425. This should unbreak the makefile
build. This didn't show up in the CMake build because the CMake build
for the unittests is rather poorly factored.
This probably isn't the correct fix. This should be a bitcode reader
unittest not a VMCore unittest. I'll move it and clean various parts of
the unittest up in a follow-up patch, but I wanted to unbreak the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147427
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Nadav Rotem [Mon, 2 Jan 2012 08:05:46 +0000 (08:05 +0000)]
Optimize the sequence blend(sign_extend(x)) to blend(shl(x)) since SSE blend instructions only look at the highest bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147426
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Rafael Espindola [Mon, 2 Jan 2012 07:49:53 +0000 (07:49 +0000)]
Materialize functions whose basic blocks are used by global variables. Fixes
PR11677.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147425
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Craig Topper [Sun, 1 Jan 2012 19:51:58 +0000 (19:51 +0000)]
Allow CRC32 instructions to be selected when AVX is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147411
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Craig Topper [Sun, 1 Jan 2012 19:40:22 +0000 (19:40 +0000)]
Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is enabled. Fix monitor and mwait to require SSE3 or AVX, previously they worked even if SSE3 was disabled. Make prefetch instructions not set the execution domain since they don't use XMM registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147409
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