Xinliang David Li [Sun, 22 Nov 2015 00:22:07 +0000 (00:22 +0000)]
[PGO] Define value profiling updater API signature in InstrProfData.inc (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253805
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Rafael Espindola [Sun, 22 Nov 2015 00:16:24 +0000 (00:16 +0000)]
Have a single way for creating unique value names.
We had two code paths. One would create names like "foo.1" and the other
names like "foo1".
For globals it is important to use "foo.1" to help C++ name demangling.
For locals there is no strong reason to go one way or the other so I
kept the most common mangling (foo1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253804
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Xinliang David Li [Sun, 22 Nov 2015 00:06:39 +0000 (00:06 +0000)]
[PGO] Move Raw Header def into template file InstrProfData.inc
To enable code sharing with compiler-rt (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253803
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Sanjay Patel [Sun, 22 Nov 2015 00:03:16 +0000 (00:03 +0000)]
fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253802
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Sanjoy Das [Sat, 21 Nov 2015 23:20:10 +0000 (23:20 +0000)]
[SCEVExpander] Use C++isms; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253801
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Krzysztof Parzyszek [Sat, 21 Nov 2015 22:46:52 +0000 (22:46 +0000)]
Now fix errors in NDEBUG build.
Hope this won't break any hardware next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253799
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Krzysztof Parzyszek [Sat, 21 Nov 2015 22:19:50 +0000 (22:19 +0000)]
Fix warnings in NDEBUG build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253798
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Teresa Johnson [Sat, 21 Nov 2015 21:55:48 +0000 (21:55 +0000)]
[ThinLTO] Handle bitcode without function summary sections gracefully
Summary:
Several fixes to the handling of bitcode files without function summary
sections so that they are skipped during ThinLTO processing in llvm-lto
and the gold plugin when appropriate instead of aborting.
1 Don't assert when trying to add a FunctionInfo that doesn't have
a summary attached.
2 Skip FunctionInfo structures that don't have attached function summary
sections when trying to create the combined function summary.
3 In both llvm-lto and gold-plugin, check whether a bitcode file has
a function summary section before trying to parse the index, and skip
the bitcode file if it does not.
4 Fix hasFunctionSummaryInMemBuffer in BitcodeReader, which had a bug
where we returned to early while looking for the summary section.
Also added llvm-lto and gold-plugin based tests for cases where we
don't have function summaries in the bitcode file. I verified that
either the first couple fixes described above are enough to avoid the
crashes, or fixes 1,3,4. But have combined them all here for added
robustness.
Reviewers: joker.eph
Subscribers: llvm-commits, joker.eph
Differential Revision: http://reviews.llvm.org/D14903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253796
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Simon Pilgrim [Sat, 21 Nov 2015 21:42:26 +0000 (21:42 +0000)]
[MachineInstrBuilder] Support for adding a ConstantPoolIndex MO with an additional offset.
MachineInstrBuilder::addDisp can already add an immediate or global address MO with an adjusted offset, this patch adds support for constant pool indices as well.
All remaining MO types still assert - there are a number of other types that could support adjusted offsets but I have no test cases at this time.
Required to fix a regression in D13988 found by Mikael Holmén during stress testing (test case attached).
Differential Revision: http://reviews.llvm.org/D14867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253795
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Krzysztof Parzyszek [Sat, 21 Nov 2015 20:00:45 +0000 (20:00 +0000)]
Hexagon V60/HVX DFA scheduler support
Extended DFA tablegen to:
- added "-debug-only dfa-emitter" support to llvm-tblgen
- defined CVI_PIPE* resources for the V60 vector coprocessor
- allow specification of multiple required resources
- supports ANDs of ORs
- e.g. [SLOT2, SLOT3], [CVI_MPY0, CVI_MPY1] means:
(SLOT2 OR SLOT3) AND (CVI_MPY0 OR CVI_MPY1)
- added support for combo resources
- allows specifying ORs of ANDs
- e.g. [CVI_XLSHF, CVI_MPY01] means:
(CVI_XLANE AND CVI_SHIFT) OR (CVI_MPY0 AND CVI_MPY1)
- increased DFA input size from 32-bit to 64-bit
- allows for a maximum of 4 AND'ed terms of 16 resources
- supported expressions now include:
expression => term [AND term] [AND term] [AND term]
term => resource [OR resource]*
resource => one_resource | combo_resource
combo_resource => (one_resource [AND one_resource]*)
Author: Dan Palermo <dpalermo@codeaurora.org>
kparzysz: Verified AMDGPU codegen to be unchanged on all llc
tests, except those dealing with instruction encodings.
Reapply the previous patch, this time without circular dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253793
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Craig Topper [Sat, 21 Nov 2015 17:44:42 +0000 (17:44 +0000)]
Use modulo operator instead of multiplying result of a divide and subtracting from the original dividend. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253792
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Krzysztof Parzyszek [Sat, 21 Nov 2015 17:38:33 +0000 (17:38 +0000)]
Revert r253790: it breaks all builds for some reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253791
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Krzysztof Parzyszek [Sat, 21 Nov 2015 17:23:52 +0000 (17:23 +0000)]
Hexagon V60/HVX DFA scheduler support
Extended DFA tablegen to:
- added "-debug-only dfa-emitter" support to llvm-tblgen
- defined CVI_PIPE* resources for the V60 vector coprocessor
- allow specification of multiple required resources
- supports ANDs of ORs
- e.g. [SLOT2, SLOT3], [CVI_MPY0, CVI_MPY1] means:
(SLOT2 OR SLOT3) AND (CVI_MPY0 OR CVI_MPY1)
- added support for combo resources
- allows specifying ORs of ANDs
- e.g. [CVI_XLSHF, CVI_MPY01] means:
(CVI_XLANE AND CVI_SHIFT) OR (CVI_MPY0 AND CVI_MPY1)
- increased DFA input size from 32-bit to 64-bit
- allows for a maximum of 4 AND'ed terms of 16 resources
- supported expressions now include:
expression => term [AND term] [AND term] [AND term]
term => resource [OR resource]*
resource => one_resource | combo_resource
combo_resource => (one_resource [AND one_resource]*)
Author: Dan Palermo <dpalermo@codeaurora.org>
kparzysz: Verified AMDGPU codegen to be unchanged on all llc
tests, except those dealing with instruction encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253790
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Sanjay Patel [Sat, 21 Nov 2015 16:51:19 +0000 (16:51 +0000)]
use ternary ops; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253787
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Sanjay Patel [Sat, 21 Nov 2015 16:37:09 +0000 (16:37 +0000)]
remove unnecessary temp variables; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253786
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Sanjay Patel [Sat, 21 Nov 2015 16:16:29 +0000 (16:16 +0000)]
fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253785
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Sanjay Patel [Sat, 21 Nov 2015 16:12:58 +0000 (16:12 +0000)]
move a single test case to where most other instcombine shuffle bug test cases exist
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253784
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Simon Pilgrim [Sat, 21 Nov 2015 13:57:22 +0000 (13:57 +0000)]
[X86][SSE] Added SSE2 PSUBUS tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253783
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Simon Pilgrim [Sat, 21 Nov 2015 13:32:29 +0000 (13:32 +0000)]
[X86][SSE] Regenerate TRUNC-SEXT tests
Tidied up triple and regenerate tests using update_llc_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253782
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Simon Pilgrim [Sat, 21 Nov 2015 13:29:42 +0000 (13:29 +0000)]
[X86][SSE] Regenerate MINMAX tests
Tidied up triple and regenerate tests using update_llc_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253781
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Simon Pilgrim [Sat, 21 Nov 2015 13:25:50 +0000 (13:25 +0000)]
[X86][SSE] Regenerate PSUBUS tests
Tidied up triple and regenerate tests using update_llc_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253780
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Jonas Paulsson [Sat, 21 Nov 2015 13:25:07 +0000 (13:25 +0000)]
[DAGCombiner] Bugfix for lost chain depenedency.
When MergeConsecutiveStores() combines two loads and two stores into
wider loads and stores, the chain users of both of the original loads
must be transfered to the new load, because it may be that a chain
user only depends on one of the loads.
New test case: test/CodeGen/SystemZ/dag-combine-01.ll
Reviewed by James Y Knight.
Bugzilla: https://llvm.org/bugs/show_bug.cgi?id=25310#c6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253779
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Simon Pilgrim [Sat, 21 Nov 2015 13:23:14 +0000 (13:23 +0000)]
[X86][AVX] Regenerate AVX splat tests
Tidied up triple and regenerate tests using update_llc_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253778
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Simon Pilgrim [Sat, 21 Nov 2015 13:04:42 +0000 (13:04 +0000)]
[X86][AVX512] Added AVX512 VMOVLHPS/VMOVHLPS shuffle decode comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253777
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Simon Pilgrim [Sat, 21 Nov 2015 12:38:34 +0000 (12:38 +0000)]
[X86][SSE] Legal XMM Register Class ordering for SSE1
It turns out we have a number of places that just grab the first type attached to a register class for various reasons. This is fine unless for some reason that type isn't legal on the current target, such as for SSE1 which doesn't support v16i8/v8i16/v4i32/v2i64 - all of which were included before 4f32 in the class.
Given that this is such a rare situation I've just re-ordered the types and placed the float types first.
Fix for PR16133
Differential Revision: http://reviews.llvm.org/D14787
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253773
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Sanjoy Das [Sat, 21 Nov 2015 09:12:07 +0000 (09:12 +0000)]
[docs] Minor fixes to the operand bundle section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253771
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Yaron Keren [Sat, 21 Nov 2015 06:33:54 +0000 (06:33 +0000)]
Unbreak build on OpenBSD by not adding -Wl,-z,defs to linker flags.
This is similar to the fix for FreeBSD in r226862. Without this patch,
the build aborts when linkling libLTO.so, complaining about undefined
references to assert2, cxa_atexit, etc.
Patch by Stefan Kempf!
http://reviews.llvm.org/D14236
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253769
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Weiming Zhao [Sat, 21 Nov 2015 06:10:20 +0000 (06:10 +0000)]
[SimplifyLibCalls] Removed some TODOs which are already implemented. NFC.
Summary:
D14302 implements tan(atan(x)) -> x
D14045 implements pow(exp(x), y) -> exp(x*y)
Patch by Mandeep Singh Grang <mgrang@codeaurora.org>
Reviewers: majnemer, davide
Differential Revision: http://reviews.llvm.org/D14882
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253768
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Davide Italiano [Sat, 21 Nov 2015 05:58:19 +0000 (05:58 +0000)]
[llvm-rtdyld] Fail early if we can't load dynamic libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253767
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Davide Italiano [Sat, 21 Nov 2015 05:49:07 +0000 (05:49 +0000)]
[llvm-rtdyld] Turn assertion into errors, it seems more appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253766
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Davide Italiano [Sat, 21 Nov 2015 05:44:41 +0000 (05:44 +0000)]
[llvm-rtdyld] Improve error handling, use Error().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253765
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Teresa Johnson [Sat, 21 Nov 2015 03:51:23 +0000 (03:51 +0000)]
Move new assert to correct location
This assert was meant to execute at the end of parseMetadata, but
we return early and never reach the end of the function. Caught
by a compile-time warning since the function doesn't return a value
from that location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253762
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Kostya Serebryany [Sat, 21 Nov 2015 03:46:43 +0000 (03:46 +0000)]
[libFuzzer] don't crash when reporting a leak in test_single_input mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253761
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Davide Italiano [Sat, 21 Nov 2015 02:15:51 +0000 (02:15 +0000)]
[llvm-rtdyld] Use report_fatal_error().
This is a first step towards saner/uniform error reporting in llvm-rtdyld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253759
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Matthias Braun [Sat, 21 Nov 2015 02:09:49 +0000 (02:09 +0000)]
ARMLoadStoreOptimizer: Cleanup isMemoryOp(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253757
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Teresa Johnson [Sat, 21 Nov 2015 00:35:38 +0000 (00:35 +0000)]
llvm-link option and test for recent metadata mapping bug
Summary:
Add a -preserve-modules option to llvm-link that simulates LTO
clients that don't destroy modules as they are linked. This enables
reproduction of a recent bug introduced by a metadata linking change
that was only caught when the modules weren't destroyed before
writing bitcode (LTO on Windows).
See http://llvm.org/viewvc/llvm-project?view=revision&revision=253170
for more details on the original bug and the fix.
Confirmed the new test added here reproduces the failure using the new
option when I suppress the fix.
Reviewers: pcc
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14818
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253740
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Vinicius Tinti [Fri, 20 Nov 2015 23:20:12 +0000 (23:20 +0000)]
Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253737
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Davide Italiano [Fri, 20 Nov 2015 23:12:15 +0000 (23:12 +0000)]
[llvm-rtdyld] Message() is used only once. Inline. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253736
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Rong Xu [Fri, 20 Nov 2015 23:02:06 +0000 (23:02 +0000)]
Add some constantness to GetSuccessorNumber().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253733
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NAKAMURA Takumi [Fri, 20 Nov 2015 22:55:34 +0000 (22:55 +0000)]
Move free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253730
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Eric Christopher [Fri, 20 Nov 2015 22:38:20 +0000 (22:38 +0000)]
Power8 and later support fusing addis/addi and addis/ld instruction
pairs that use the same register to execute as a single instruction.
No Functional Change
Patch by Kyle Butt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253724
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Owen Anderson [Fri, 20 Nov 2015 22:34:48 +0000 (22:34 +0000)]
Fix another infinite loop in Reassociate caused by Constant::isZero().
Not all zero vectors are ConstantDataVector's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253723
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Geoff Berry [Fri, 20 Nov 2015 22:34:39 +0000 (22:34 +0000)]
[CodeGenPrepare] Create more extloads and fewer ands
Summary:
Add and instructions immediately after loads that only have their low
bits used, assuming that the (and (load x) c) will be matched as a
extload and the ands/truncs fed by the extload will be removed by isel.
Reviewers: mcrosier, qcolombet, ab
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14584
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253722
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Chris Bieneman [Fri, 20 Nov 2015 22:08:49 +0000 (22:08 +0000)]
[CMake] Fix handling of passing through semi-colon separated lists.
When passing around CMake arguments as lists of arguments any arguments containing lists need to have their semi-colons escaped otherwise CMake will split the arguments in the middle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253719
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Arnaud A. de Grandmaison [Fri, 20 Nov 2015 21:54:27 +0000 (21:54 +0000)]
[ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger.
The included test only checks for a compiler crash for now. Several people are
facing this issue, so we first resolve the crash, and will increase shrinkwrap's
coverage later in a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253718
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Diego Novillo [Fri, 20 Nov 2015 21:46:41 +0000 (21:46 +0000)]
SamplePGO - Tweak RUN command for a test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253717
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Diego Novillo [Fri, 20 Nov 2015 21:46:38 +0000 (21:46 +0000)]
SamplePGO - Do not count never-executed inlined functions when computing coverage.
If a function was originally inlined but not actually hot at runtime,
its samples will not be counted inside the parent function. This throws
off the coverage calculation because it expects to find more used
records than it should.
Fixed by ignoring functions that will not be inlined into the parent.
Currently, this is inlined functions with 0 samples. In subsequent
patches, I'll change this to mean "cold" functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253716
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Jun Bum Lim [Fri, 20 Nov 2015 21:14:07 +0000 (21:14 +0000)]
[AArch64]Merge narrow zero stores to a wider store
This change merges adjacent zero stores into a wider single store.
For example :
strh wzr, [x0]
strh wzr, [x0, #2]
becomes
str wzr, [x0]
This will fix PR25410.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253711
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Eric Christopher [Fri, 20 Nov 2015 20:51:31 +0000 (20:51 +0000)]
Weak non-function symbols were being accessed directly, which is
incorrect, as the chosen representative of the weak symbol may not live
with the code in question. Always indirect the access through the TOC
instead.
Patch by Kyle Butt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253708
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Krzysztof Parzyszek [Fri, 20 Nov 2015 20:46:23 +0000 (20:46 +0000)]
[Hexagon] Fix the return value from HexagonGenInsert::runOnMachineFunction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253705
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Bill Seurer [Fri, 20 Nov 2015 20:24:49 +0000 (20:24 +0000)]
Fix test case label check
Several (but not all) of the labels that are checked for in this test case
are checked as strings instead of labels. This can cause an apparent test
case failure if they are tested in an appropriately named directory.
For example, one of them that fails:
define zeroext i32 @test2(i32 %A.u, i32 %B.u) {
; A8: test2
; A8: uxtab r0, r0, r1
Output that causes it to fail:
. . .
.file "/home/seurer/llvm/llvm-test2/test/CodeGen/Thumb2/thumb2-uxt_rot.ll"
. . .
.globl test2
.align 1
.type test2,%function
.code 16 @ @test2
.thumb_func
test2:
.fnstart
The "A8: test2" matches on the directory name instead of the label.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253702
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Reid Kleckner [Fri, 20 Nov 2015 19:29:40 +0000 (19:29 +0000)]
Fix the Windows build, include <tuple> for std::tie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253698
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Tilmann Scheller [Fri, 20 Nov 2015 19:17:10 +0000 (19:17 +0000)]
Revert "[FunctionAttrs] Remove redundant assignment."
This reverts r253661.
Turns out that the assignment is not redundant (despite the Clang static analyzer claiming the opposite).
The variable is being used by the lambda function AddUsersToWorklistIfCapturing().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253696
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Nathan Slingerland [Fri, 20 Nov 2015 19:12:43 +0000 (19:12 +0000)]
[llvm-profdata] Add merge() to InstrProfRecord
Summary:
This change refactors two aspects of InstrProfRecord:
1) Add a merge() method to InstrProfRecord (previously InstrProfWriter combineInstrProfRecords()) in order to better encapsulate this functionality and to make the InstrProfRecord and SampleRecord APIs more consistent.
2) Make InstrProfRecord mergeValueProfData() a private method since it is only ever called internally by merge().
Reviewers: dnovillo, bogner, davidxl
Subscribers: silvas, vsk, llvm-commits
Differential Revision: http://reviews.llvm.org/D14786
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253695
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Artyom Skrobov [Fri, 20 Nov 2015 16:46:14 +0000 (16:46 +0000)]
Avoid duplicate entry for cortex-a7 in the TargetParser (NFC)
Reviewers: t.p.northover, rengolin
Subscribers: aemerson, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D14757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253676
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Artyom Skrobov [Fri, 20 Nov 2015 16:46:09 +0000 (16:46 +0000)]
Handle ARMv6-J as an alias, instead of fake architecture
Summary:
This follows D14577 to treat ARMv6-J as an alias for ARMv6,
instead of an architecture in its own right.
The functional change is that the default CPU when targeting ARMv6-J
changes from arm1136j-s to arm1136jf-s, which is currently used as
the default CPU for ARMv6; both are, in fact, ARMv6-J CPUs.
The J-bit (Jazelle support) is irrelevant to LLVM, and it doesn't
affect code generation, attributes, optimizations, or anything else,
apart from selecting the default CPU.
Reviewers: rengolin, logan, compnerd
Subscribers: aemerson, llvm-commits, rengolin
Differential Revision: http://reviews.llvm.org/D14755
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253675
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Diego Novillo [Fri, 20 Nov 2015 15:39:42 +0000 (15:39 +0000)]
SamplePGO - Add line offset and discriminator information to sample reports.
While debugging some sampling coverage problems, I found this useful:
When applying samples from a profile, it helps to also know what line
offset and discriminator the sample belongs to. This makes it easy to
correlate against the input profile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253670
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Teresa Johnson [Fri, 20 Nov 2015 14:51:27 +0000 (14:51 +0000)]
[ThinLTO] Add MODULE_CODE_METADATA_VALUES record
Summary:
This is split out from the ThinLTO metadata mapping patch
http://reviews.llvm.org/D14752.
To avoid needing to parse the module level metadata during function
importing, a new module-level record is added which holds the
number of module-level metadata values. This is required because
metadata value ids are assigned implicitly during parsing, and the
function-level metadata ids start after the module-level metadata ids.
I made a change to this version of the code compared to D14752
in order to add more consistent and thorough assertion checking of the
new record value. We now unconditionally use the record value to
initialize the MDValueList size, and handle it the same in parseMetadata
for all module level metadata cases (lazy loading or not).
Reviewers: dexonsmith, joker.eph
Subscribers: davidxl, llvm-commits, joker.eph
Differential Revision: http://reviews.llvm.org/D14825
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253668
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Tilmann Scheller [Fri, 20 Nov 2015 13:27:30 +0000 (13:27 +0000)]
[Hexagon] Remove redundant assignment.
Identified by the Clang static analyzer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253664
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Daniel Sanders [Fri, 20 Nov 2015 13:16:35 +0000 (13:16 +0000)]
Partially revert r253662: some unrelated work was accidentally committed with it.
Sorry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253663
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Daniel Sanders [Fri, 20 Nov 2015 13:13:53 +0000 (13:13 +0000)]
Revert the revert 253497 and 253539 - These commits aren't the cause of the clang-cmake-mips failures.
Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253662
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Tilmann Scheller [Fri, 20 Nov 2015 12:51:58 +0000 (12:51 +0000)]
[FunctionAttrs] Remove redundant assignment.
Identified by the Clang static analyzer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253661
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Tilmann Scheller [Fri, 20 Nov 2015 12:10:17 +0000 (12:10 +0000)]
[Hexagon] Remove redundant local variable.
Identified by the Clang static analyzer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253660
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Daniel Sanders [Fri, 20 Nov 2015 10:07:11 +0000 (10:07 +0000)]
Revert 253497 and 253539 to try to fix clang-cmake-mips buildbot.
It caused link errors of the form:
InstrProfiling.c:(.text.__llvm_profile_instrument_target+0x1c0): undefined reference to `__sync_fetch_and_add_8'
We had a network outage at the time of the commit so the first build to show a
problem is http://lab.llvm.org:8011/builders/clang-cmake-mips/builds/10827
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253656
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Owen Anderson [Fri, 20 Nov 2015 08:16:13 +0000 (08:16 +0000)]
Fix a pair of issues that caused an infinite loop in reassociate.
Terrifyingly, one of them is a mishandling of floating point vectors
in Constant::isZero(). How exactly this issue survived this long
is beyond me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253655
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Craig Topper [Fri, 20 Nov 2015 07:18:48 +0000 (07:18 +0000)]
Use range-based for loops. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253652
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Hrvoje Varga [Fri, 20 Nov 2015 07:14:52 +0000 (07:14 +0000)]
[mips][microMIPS] Implement MUL[_S].PH, MULEQ_S.W.PHL, MULEQ_S.W.PHR, MULEU_S.PH.QBL, MULEU_S.PH.QBR, MULQ_RS.PH, MULQ_RS.W, MULQ_S.PH and MULQ_S.W instructions
Differential Revision: http://reviews.llvm.org/D14280
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253651
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Dan Gohman [Fri, 20 Nov 2015 03:13:31 +0000 (03:13 +0000)]
[WebAssembly] Remove the AsmPrinter code for printing physical registers.
WebAssembly does not have physical registers, so even if LLVM uses physical
registers like SP, they'll need to be lowered to virtual registers before
AsmPrinter time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253644
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Dan Gohman [Fri, 20 Nov 2015 03:08:27 +0000 (03:08 +0000)]
[WebAssembly] Add a few open tasks to the target README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253643
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Dan Gohman [Fri, 20 Nov 2015 03:02:49 +0000 (03:02 +0000)]
[WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253642
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Dan Gohman [Fri, 20 Nov 2015 02:51:38 +0000 (02:51 +0000)]
[WebAssembly] Remove done items from the README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253640
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Dan Gohman [Fri, 20 Nov 2015 02:33:24 +0000 (02:33 +0000)]
[WebAssembly] Add asserts that the expression stack is used in stack order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253638
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Dan Gohman [Fri, 20 Nov 2015 02:19:12 +0000 (02:19 +0000)]
[WebAssemby] Enforce FIFO ordering for instructions using stackified registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253634
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Peter Collingbourne [Fri, 20 Nov 2015 01:26:13 +0000 (01:26 +0000)]
ScalarEvolution: do not set nuw when creating exprs of form <expr> + <all-ones>.
The nuw constraint will not be satisfied unless <expr> == 0.
This bug has been around since r102234 (in 2010!), but was uncovered by
r251052, which introduced more aggressive optimization of nuw scev expressions.
Differential Revision: http://reviews.llvm.org/D14850
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253627
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Eric Christopher [Fri, 20 Nov 2015 00:34:54 +0000 (00:34 +0000)]
Split the argument unscheduling loop in the WebAssembly register
coloring pass. Turn the logic into "look for an insert point and
then move things past the insert point".
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253626
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Tobias Edler von Koch [Fri, 20 Nov 2015 00:13:05 +0000 (00:13 +0000)]
[LTO] Add options to llvm-lto to select output format and dump merged module
This introduces two new options:
- "llvm-lto -save-merged-module -o outfile" dumps the LTO Module to
outfile.merged.bc prior to CodeGen and after LTO optimizations have been run.
- "llvm-lto -filetype=asm -o outfile" makes llvm-lto emit assembly instead of
object code in outfile.
Both are intended for use in lit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253624
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Tobias Edler von Koch [Thu, 19 Nov 2015 23:59:24 +0000 (23:59 +0000)]
[LTO] Add option to emit assembly from LTOCodeGenerator
This adds a new API, LTOCodeGenerator::setFileType, to choose the output file
format for LTO CodeGen. A corresponding change to use this new API from
llvm-lto and a test case is coming in a separate commit.
Differential Revision: http://reviews.llvm.org/D14554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253622
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Eric Christopher [Thu, 19 Nov 2015 23:45:42 +0000 (23:45 +0000)]
Fix a [-Werror,-Wcovered-switch-default] warning by removing the
unnecessary default case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253621
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Reid Kleckner [Thu, 19 Nov 2015 23:23:33 +0000 (23:23 +0000)]
[WinEH] Disable most forms of demotion
Now that the register allocator knows about the barriers on funclet
entry and exit, testing has shown that this is unnecessary.
We still demote PHIs on unsplittable blocks due to the differences
between the IR CFG and the Machine CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253619
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Dan Gohman [Thu, 19 Nov 2015 23:04:59 +0000 (23:04 +0000)]
[WebAssembly] Implement isCheapToSpeculateCtlz and isCheapToSpeculateCttz.
This unbreaks test/CodeGen/WebAssembly/i32.ll and
test/CodeGen/WebAssembly/i64.ll after r224899.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253617
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Arch D. Robison [Thu, 19 Nov 2015 22:37:26 +0000 (22:37 +0000)]
Cleanup some -Wundef warnings in include/llvm/Support/MathExtras.h
Fix avoids gratuitous warnings from gcc for "_MSC_VER" not being defined.
Differential Revision: http://reviews.llvm.org/D14598
Patch by Tony Kelman <tony@kelman.net>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253614
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Diego Novillo [Thu, 19 Nov 2015 22:18:30 +0000 (22:18 +0000)]
SamplePGO - Tweak debugging output for function samples. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253612
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Simon Pilgrim [Thu, 19 Nov 2015 22:13:56 +0000 (22:13 +0000)]
[X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index.
Found during stress testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253611
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Sanjay Patel [Thu, 19 Nov 2015 22:11:52 +0000 (22:11 +0000)]
[InstCombine] add tests to show missing trunc optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253609
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Reid Kleckner [Thu, 19 Nov 2015 21:51:55 +0000 (21:51 +0000)]
Fix UMRs in Mips disassembler on invalid instruction streams
The Insn and Size local variables were used without initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253607
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Simon Pilgrim [Thu, 19 Nov 2015 21:50:57 +0000 (21:50 +0000)]
[X86] Use existing MachineInstrBuilder::addDisp to create offseted pointer. NFC.
Minor code duplication tidyup to D13988
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253606
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Davide Italiano [Thu, 19 Nov 2015 21:50:08 +0000 (21:50 +0000)]
Follow up to r253591. Turn into an assertion.
Reported by: David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253605
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Chad Rosier [Thu, 19 Nov 2015 21:33:07 +0000 (21:33 +0000)]
[LIR] Update some comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253603
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Sanjay Patel [Thu, 19 Nov 2015 21:32:25 +0000 (21:32 +0000)]
[InstCombine] add tests to show missing bitcast optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253602
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Krzysztof Parzyszek [Thu, 19 Nov 2015 21:18:52 +0000 (21:18 +0000)]
Expand subregisters in MachineFrameInfo::getPristineRegs
http://reviews.llvm.org/D14719
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253600
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Dehao Chen [Thu, 19 Nov 2015 20:29:27 +0000 (20:29 +0000)]
Fix the debug build breakage that getDiscriminator is called by mistake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253597
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Michael Zolotukhin [Thu, 19 Nov 2015 20:28:32 +0000 (20:28 +0000)]
Revert r253253 and r253126: "Don't recompute LCSSA after loop-unrolling when possible."
The change exposed a bug in IndVarSimplify (PR25578), which led to a
failure (PR25538). When the bug is fixed, this patch can be reapplied.
The tests are kept in tree, as they're useful anyway, and will not break
with this revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253596
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Dehao Chen [Thu, 19 Nov 2015 19:53:05 +0000 (19:53 +0000)]
Reimplement discriminator assignment algorithm.
Summary: The new algorithm is more efficient (O(n), n is number of basic blocks). And it is guaranteed to cover all cases of multiple BB mapped to same line.
Reviewers: dblaikie, davidxl, dnovillo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14738
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253594
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Davide Italiano [Thu, 19 Nov 2015 19:28:23 +0000 (19:28 +0000)]
[AddressSanitizer] assert(false) -> llvm_unreachable and remove return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253591
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Jun Bum Lim [Thu, 19 Nov 2015 18:41:27 +0000 (18:41 +0000)]
[AArch64] Refactoring aarch64-ldst-opt. NCF.
Summary :
* Rename isSmallTypeLdMerge() to isNarrowLoad().
* Rename NumSmallTypeMerged to NumNarrowTypePromoted.
* Use Subtarget defined as a member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253587
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Chad Rosier [Thu, 19 Nov 2015 18:25:11 +0000 (18:25 +0000)]
[LIR] Fix 80-column from previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253586
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Chad Rosier [Thu, 19 Nov 2015 18:22:21 +0000 (18:22 +0000)]
[LIR] Sink checks into function to enable future refactoring. NFC.
The purpose of this change is help delineate the memset and memcpy
optimizations with the overall goal of resolving PR25520.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253585
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James Molloy [Thu, 19 Nov 2015 18:04:33 +0000 (18:04 +0000)]
[GlobalOpt] Localize some globals that have non-instruction users
We currently bail out of global localization if the global has non-instruction users. However, often these can be simple bitcasts or constant-GEPs, which we can easily turn into instructions before localizing. Be a bit more aggressive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253584
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Sanjay Patel [Thu, 19 Nov 2015 17:35:55 +0000 (17:35 +0000)]
update comment and error message; NFC
'notail' was added in:
http://reviews.llvm.org/rL252368
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253580
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Chad Rosier [Thu, 19 Nov 2015 17:27:28 +0000 (17:27 +0000)]
[LIR] Use the more appropriate method. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253578
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