Identify when a lexical scope is split in to multiple instruction ranges. Emit such ranges using DW_AT_ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102004 91177308-0d34-0410-b5e6-96231b3b80d8

Make ScalarEvolution::getConstant support pointer types, for consistency
with ScalarEvolution's overall approach to pointer types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102003 91177308-0d34-0410-b5e6-96231b3b80d8

Dragonegg will be released along side llvm-2.7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102001 91177308-0d34-0410-b5e6-96231b3b80d8

final hacking for tonight, still more to go.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101995 91177308-0d34-0410-b5e6-96231b3b80d8

continue the process of detangling this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101992 91177308-0d34-0410-b5e6-96231b3b80d8

rough pass moving stuff into relevant sections, still much
editing to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101987 91177308-0d34-0410-b5e6-96231b3b80d8

remove ldc, rubinious, macruby, icedtea, llvm-lua, which
don't have updates for 2.7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101985 91177308-0d34-0410-b5e6-96231b3b80d8

Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101984 91177308-0d34-0410-b5e6-96231b3b80d8

isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101979 91177308-0d34-0410-b5e6-96231b3b80d8

Trim include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101978 91177308-0d34-0410-b5e6-96231b3b80d8

Add more const qualifiers on TargetMachine and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101977 91177308-0d34-0410-b5e6-96231b3b80d8

Update CMakeLists.txt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101976 91177308-0d34-0410-b5e6-96231b3b80d8

Move several SelectionDAG-independent utility functions out of the
SelectionDAG directory and into a new Analysis.cpp file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101975 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb instructions which have reglist operands at the end and predicate operands
before reglist were not properly handled with respect to IT Block.  Fix that by
creating a new method ARMBasicMCBuilder::DoPredicateOperands() used by those
instructions for disassembly.  Add a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101974 91177308-0d34-0410-b5e6-96231b3b80d8

Implement (but don't enable) PR6724 and rdar://6295824.  In short,
we have RefreshCallGraph detect when a function pass devirtualizes
a call, and have CGSCCPassMgr iterate (up to a count) when this
happens.  This allows (in the example) GVN to devirtualize the
call in foo, then the inliner to inline it away.

This is not currently enabled because I haven't done any analysis
on the (potentially substantial) code size or performance impact of
doing this, and guess what, it exposes callgraph updating bugs in
various passes.  This is progress though, and you can play with it
by passing -max-cg-scc-iterations=5 to opt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101973 91177308-0d34-0410-b5e6-96231b3b80d8

- Clean up some crappy code which deals with coalescing of copies which look at
  extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101971 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r101471. For tight recursive functions which have multiple
recursive callsites, inlining can reduce the number of calls by
exponential factors, as it does in
MultiSource/Benchmarks/Olden/treeadd. More involved heuristics
will be needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101969 91177308-0d34-0410-b5e6-96231b3b80d8

Handle a displacement location in 64-bit as an RIP-relative displacement. It
fixes a bug (<rdar://problem/7880900>) in the JIT. This code wouldn't work:

target triple = "x86_64-apple-darwin"

define double @func(double %a) {
  %tmp1 = fmul double %a, 5.000000e-01            ; <double> [#uses=1]
  ret double %tmp1
}

define i32 @main() nounwind {
  %1 = call double @func(double 4.770000e-04) ; <i64> [#uses=0]
  ret i32 0
}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101965 91177308-0d34-0410-b5e6-96231b3b80d8

Rewrite machine cse to avoid recursion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101964 91177308-0d34-0410-b5e6-96231b3b80d8

Add another variant of this test which found a place where
CodeGen's ComputeMaskedBits was being over-conservative when computing
bits for an ADD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101963 91177308-0d34-0410-b5e6-96231b3b80d8

teach the x86 address matching stuff to handle
(shl (or x,c), 3) the same as (shl (add x, c), 3)
when x doesn't have any bits from c set.

This finishes off PR1135.  Before we compiled the block to:
to:

LBB0_3:                                 ## %bb
cmpb $4, %dl
sete %dl
addb %dl, %cl
movb %cl, %dl
shlb $2, %dl
addb %r8b, %dl
shlb $2, %dl
movzbl %dl, %edx
movl %esi, (%rdi,%rdx,4)
leaq 2(%rdx), %r9
movl %esi, (%rdi,%r9,4)
leaq 1(%rdx), %r9
movl %esi, (%rdi,%r9,4)
addq $3, %rdx
movl %esi, (%rdi,%rdx,4)
incb %r8b
decb %al
movb %r8b, %dl
jne LBB0_1

Now we produce:

LBB0_3:                                 ## %bb
cmpb $4, %dl
sete %dl
addb %dl, %cl
movb %cl, %dl
shlb $2, %dl
addb %r8b, %dl
shlb $2, %dl
movzbl %dl, %edx
movl %esi, (%rdi,%rdx,4)
movl %esi, 8(%rdi,%rdx,4)
movl %esi, 4(%rdi,%rdx,4)
movl %esi, 12(%rdi,%rdx,4)
incb %r8b
decb %al
movb %r8b, %dl
jne LBB0_1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101958 91177308-0d34-0410-b5e6-96231b3b80d8

Because of the EMMS problem, right now we have to support
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own.  This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101951 91177308-0d34-0410-b5e6-96231b3b80d8

Rename ValueMapTy as ValueToValueMapTy to clearly indicate that this has no replationship with ADT/ValueMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101950 91177308-0d34-0410-b5e6-96231b3b80d8

There is no need to install ValueMapper.h header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101949 91177308-0d34-0410-b5e6-96231b3b80d8

Better error-handling of getBitFieldInvMask() where msb < lsb (encoding error),
instead of just asserting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101942 91177308-0d34-0410-b5e6-96231b3b80d8

I plan to release a version of dragonegg based on llvm-2.7 shortly
after the llvm-2.7 release.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101934 91177308-0d34-0410-b5e6-96231b3b80d8

When MachineLICM is hoisting a physical register after regalloc, make sure the
register is not killed in the loop.

This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
that looked available but wasn't.

A testcase would be huge and fragile, sorry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101930 91177308-0d34-0410-b5e6-96231b3b80d8

When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12,
as their generic counterparts t2ADDri12/t2SUBri12 should suffice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101929 91177308-0d34-0410-b5e6-96231b3b80d8

Move CodeGen/X86/2010-04-19-DAGCombineCrash.ll into CodeGen/X86/crash.ll. Also
reduce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101925 91177308-0d34-0410-b5e6-96231b3b80d8

For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if Rn(Inst{19-16})=='1111',
transform the Opcode to the corresponding t2LDR*pci counterpart.

Ref: A8.6.86 LDRT, A8.6.65 LDRBT, A8.6.77 LDRHT, A8.6.81 LDRSBT, A8.6.85 LDRSHT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101915 91177308-0d34-0410-b5e6-96231b3b80d8

Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101914 91177308-0d34-0410-b5e6-96231b3b80d8

Add RUN:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101913 91177308-0d34-0410-b5e6-96231b3b80d8

Sink the CopyToExportRegsIfNeeded calls out of SelectionDAGISel
into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101906 91177308-0d34-0410-b5e6-96231b3b80d8

Don't send PHI nodes down to SelectionDAGBuilder of FastISel, since
they end up doing nothing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101904 91177308-0d34-0410-b5e6-96231b3b80d8

Document that TargetRegisterInfo::contains does not cover virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101903 91177308-0d34-0410-b5e6-96231b3b80d8

Sink this use_empty() check into isUsedOutsideOfDefiningBlock.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101902 91177308-0d34-0410-b5e6-96231b3b80d8

If a PHI node somehow has debug info, propogate it to the MachineInstr PHI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101901 91177308-0d34-0410-b5e6-96231b3b80d8

Don't iterate through the whole block just to find the PHI nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101900 91177308-0d34-0410-b5e6-96231b3b80d8

use abstract accessors to CallInst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101899 91177308-0d34-0410-b5e6-96231b3b80d8

PR6880: Don't dereference CallsExternalNode if it's NULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101897 91177308-0d34-0410-b5e6-96231b3b80d8

Fix -Wcast-qual warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101894 91177308-0d34-0410-b5e6-96231b3b80d8

stop computing InstImpInputs, it is dead

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101881 91177308-0d34-0410-b5e6-96231b3b80d8

DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101880 91177308-0d34-0410-b5e6-96231b3b80d8

Bill's change in r95336 broke empty aggregates embedded
in other types.  fix this by only bumping zero-byte globals
up to a single byte if the *entire global* is zero size,
fixing PR6340.

This also fixes empty arrays etc to be handled correctly,
and only does this on subsection-via-symbols targets (aka
darwin) which is the only place where this matters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101879 91177308-0d34-0410-b5e6-96231b3b80d8

teach cellspu how to return i8 and i16 from calls,
patch by Kalle Raiskila!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101875 91177308-0d34-0410-b5e6-96231b3b80d8

remove a bunch of ad-hoc code to simplify instructions from
loop unswitch, and use inst simplify instead.  It is more
powerful and less duplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101874 91177308-0d34-0410-b5e6-96231b3b80d8

move some select simplifications out out instcombine into
inst simplify.  No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101873 91177308-0d34-0410-b5e6-96231b3b80d8

RewriteLoopBodyWithConditionConstant can end up rewriting the
condition we're unswitching on.  In this case, don't try to
simplify the second copy of the loop which may be dead or not,
but is probably a constant now.  This fixes PR6879

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101870 91177308-0d34-0410-b5e6-96231b3b80d8

reapply 'reject forward references to functions whose type don't match'
now that the testsuite has been updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101866 91177308-0d34-0410-b5e6-96231b3b80d8

Delete a redundant return statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101860 91177308-0d34-0410-b5e6-96231b3b80d8

The visitXOR method can return the same SDNode. If so, we don't want to delete
it as it's not dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101855 91177308-0d34-0410-b5e6-96231b3b80d8

disable optimizations in this directory for MSVC9.  This avoids
an optimizer infinite loop on the file, PR6866.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101854 91177308-0d34-0410-b5e6-96231b3b80d8

Better error-handling for DisassembleThumb2DPModImm() with 2-reg operands where
d==15 is considered illegal.  Return false instead of assert().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101852 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the palignr intrinsics now that we lower them to vector shuffles,
shifts and null vectors. Autoupgrade these to what we'd lower them to.

Add a testcase to exercise this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101851 91177308-0d34-0410-b5e6-96231b3b80d8

Remove this debug output; it isn't that useful, and it's incomplete
in the case where a basic block is split.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101850 91177308-0d34-0410-b5e6-96231b3b80d8

Sink DebugLoc handling out of SelectionDAGISel into FastISel and
SelectionDAGBuilder, where it doesn't have to be as complicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101848 91177308-0d34-0410-b5e6-96231b3b80d8

make CallGraphNode dtor abort if a node is deleted when there are still
references to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101847 91177308-0d34-0410-b5e6-96231b3b80d8

make the inliner do less work for leaf functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101846 91177308-0d34-0410-b5e6-96231b3b80d8

Fix rdar://7879828 - crash in CallGraph, a self host issue.
Arg promotion was deleting call graph nodes that still had references
from the 'indirect' CGN.  Like the inliner, it should only delete the
function if all references are gone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101845 91177308-0d34-0410-b5e6-96231b3b80d8

Remove MachineFunction's DefaultDebugLoc member, and make DwarfDebug.cpp
responsible for figuring out what that's supposed to be on its own.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101844 91177308-0d34-0410-b5e6-96231b3b80d8

Reapply the removal of SelectionDAGISel's BB, with a fix for the case
where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101843 91177308-0d34-0410-b5e6-96231b3b80d8

Fix tests for Neon load/store intrinsics to match the i8* types expected by
the intrinsics.  The reason for those i8* types is that the intrinsics are
overloaded on the vector type and we don't have a way to declare an intrinsic
where one argument is an overloaded vector type and another argument is a
pointer to the vector element type.  The bitcasts added here will match what
the frontend will typically generate when these intrinsics are used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101840 91177308-0d34-0410-b5e6-96231b3b80d8

More IT instruction error-handling improvements from fuzzing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101839 91177308-0d34-0410-b5e6-96231b3b80d8

Revert 101825, which is causing trouble.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101832 91177308-0d34-0410-b5e6-96231b3b80d8

Make BreakAntiDependencies' SUnits argument const, and make the Begin
and End arguments by-value rather than by-reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101830 91177308-0d34-0410-b5e6-96231b3b80d8

Better error handling of invalid IT mask '0000', instead of just asserting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101827 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate SelectionDAGISel's "current block" member. Just pass it as
an argument to things that need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101825 91177308-0d34-0410-b5e6-96231b3b80d8

Delete an unnecessary reference to SelectionDAGISel::BB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101824 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate the CurMBB member from SelectionDAGBuilder. For places that
need it, just pass around the parent block of the current instruction
explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101822 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the Expr member from IVUsers. Instead of remembering the expression,
just ask ScalarEvolution for it on demand. This helps IVUsers be more robust
in the case of expressions changing underneath it. This fixes PR6862.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101819 91177308-0d34-0410-b5e6-96231b3b80d8

According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1
Pseudocode details of conditional, Condition bits '111x' indicate the
instruction is always executed.  That is, '1111' is a leagl condition field
value, which is now mapped to ARMCC::AL.

Also add a test case for condition field '1111'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101817 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo. add a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101812 91177308-0d34-0410-b5e6-96231b3b80d8

More progress on promoting i16 operations to i32 for x86. Work in progress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101808 91177308-0d34-0410-b5e6-96231b3b80d8

Give SelectionDAG a TargetMachine too, rather than having it
fetch one from the MachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101807 91177308-0d34-0410-b5e6-96231b3b80d8

More 80 col violation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101806 91177308-0d34-0410-b5e6-96231b3b80d8

Add DW_AT_APPLE_omit_frame_ptr to encode -fomit-frame-pointer flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101805 91177308-0d34-0410-b5e6-96231b3b80d8

Code that needs a TargetMachine should have access to one directly, rather
than just getting one through a TargetLowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101802 91177308-0d34-0410-b5e6-96231b3b80d8

Move isInTailCallPosition out of SelectionDAGBuilder, as it isn't
SelectionDAG-specific.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101801 91177308-0d34-0410-b5e6-96231b3b80d8

Enable -Wcast-qual for C++ files, where intentional qualifier-stripping can
be done with const_cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101798 91177308-0d34-0410-b5e6-96231b3b80d8

Remove -module, which appears to be a leftover from prior libtool usage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101793 91177308-0d34-0410-b5e6-96231b3b80d8

This doesn't need SmallVector.h anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101790 91177308-0d34-0410-b5e6-96231b3b80d8

Support .a files directly (without -l).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101789 91177308-0d34-0410-b5e6-96231b3b80d8

Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operand
instructions should have Rd (Inst{11-8}) != 0b1111.

Ref: A6.3 32-bit Thumb instruction encoding
     A6.3.11 Data-processing (shifted register)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101788 91177308-0d34-0410-b5e6-96231b3b80d8

Fix this for std::vectors which don't have .data().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101785 91177308-0d34-0410-b5e6-96231b3b80d8

ARM disassembler did not react to recent changes to the NEON instruction table.
VLD1q*_UPD and VST1q*_UPD have the ${dst:dregpair} operand now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101784 91177308-0d34-0410-b5e6-96231b3b80d8

Don't write into MemoryBuffers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101783 91177308-0d34-0410-b5e6-96231b3b80d8

Fix -Wcast-qual warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101782 91177308-0d34-0410-b5e6-96231b3b80d8

Revert 91528 and use a std::vector instead, fixing an abuse of std::string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101781 91177308-0d34-0410-b5e6-96231b3b80d8

Fix -Wcast-qual warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101779 91177308-0d34-0410-b5e6-96231b3b80d8

Add a few more ELF bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101778 91177308-0d34-0410-b5e6-96231b3b80d8

Add a const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101777 91177308-0d34-0410-b5e6-96231b3b80d8

These functions don't need to access this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101776 91177308-0d34-0410-b5e6-96231b3b80d8

Add missed part of prev. commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101755 91177308-0d34-0410-b5e6-96231b3b80d8

Make processor FUs unique for given itinerary. This extends the limit of 32
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101754 91177308-0d34-0410-b5e6-96231b3b80d8

avoid temporary std::string in non posix_spawn path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101723 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate temporary string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101711 91177308-0d34-0410-b5e6-96231b3b80d8

Properly inherit the environment on darwin where environ is not available for shared libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101710 91177308-0d34-0410-b5e6-96231b3b80d8

This is horrible. Split the difference, and declare 'environ' on all non-Darwin
platforms to unbreak the darwin and linux builds. The BSD folks should feel
free to change the #if, if this breaks them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101703 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r101701, Darwin doesn't have 'environ'. Go figure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101702 91177308-0d34-0410-b5e6-96231b3b80d8

Fix linux build. posix_spawn doesn't inherit the environment by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101701 91177308-0d34-0410-b5e6-96231b3b80d8