callgraph changes came after the 2.6 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83299 91177308-0d34-0410-b5e6-96231b3b80d8

strength reduce a ton of type equality tests to check the typeid (Through
the new predicates I added) instead of going through a context and doing a
pointer comparison.  Besides being cheaper, this allows a smart compiler
to turn the if sequence into a switch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83297 91177308-0d34-0410-b5e6-96231b3b80d8

add more type predicates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83296 91177308-0d34-0410-b5e6-96231b3b80d8

teach the optimizer how to constant fold uadd/usub intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83295 91177308-0d34-0410-b5e6-96231b3b80d8

simplify this code a bunch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83294 91177308-0d34-0410-b5e6-96231b3b80d8

add some helper functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83293 91177308-0d34-0410-b5e6-96231b3b80d8

code simplifications.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83292 91177308-0d34-0410-b5e6-96231b3b80d8

Move implicit and paralle to a separate codegen specific section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83291 91177308-0d34-0410-b5e6-96231b3b80d8

instcombine shouldn't delete all null checks for mallocs.
This fixes PR5130.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83290 91177308-0d34-0410-b5e6-96231b3b80d8

stop MachineFunctionPass from claiming that it preserves LoopDependence info,
which causes dependence info to be linked into lli.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83289 91177308-0d34-0410-b5e6-96231b3b80d8

remove llvm-db: it is completely broken and if anyone wants to do a debugger,
they should not base it on llvm-db (which not following almost any "best practices").

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83288 91177308-0d34-0410-b5e6-96231b3b80d8

add some completely unformated and probably incoherent notes about things
I saw while reading all the commits between the 2.5 and 2.6 release branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83287 91177308-0d34-0410-b5e6-96231b3b80d8

Do away with the strange use of BitVectors in SSI, and just use normal sets.  This makes the code much more C++/LLVM-ish.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83286 91177308-0d34-0410-b5e6-96231b3b80d8

Whitespace and formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83285 91177308-0d34-0410-b5e6-96231b3b80d8

Remove trailing whitespace from build output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83284 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a typo in the comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83283 91177308-0d34-0410-b5e6-96231b3b80d8

SSI needs to require DT and DF transitively, since it uses them outside of its runOnFunction.
Similarly, it can be marked setPreservesAll, since it does no work in its runOnFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83282 91177308-0d34-0410-b5e6-96231b3b80d8

CMake: remove .so file extension from library names when building
dependency info.

Patch by Peter Collingbourne!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83275 91177308-0d34-0410-b5e6-96231b3b80d8

Allow -inline-threshold override default threshold even if compiling to optimize for size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83274 91177308-0d34-0410-b5e6-96231b3b80d8

Rename enum NumOccurrences to NumOccurrencesFlag since there is a member named NumOccurrences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83273 91177308-0d34-0410-b5e6-96231b3b80d8

Requires element types in a constant initializer to match the element types of
of the constant. This reverts r6544 and r7428.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83270 91177308-0d34-0410-b5e6-96231b3b80d8

Add a comment to describe letters used in multiclass name suffixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83257 91177308-0d34-0410-b5e6-96231b3b80d8

Fix encoding problem for VMLS instruction.
Thanks to Johnny Chen for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83256 91177308-0d34-0410-b5e6-96231b3b80d8

Oops. Renamed remaining MachineInstrIndex references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83255 91177308-0d34-0410-b5e6-96231b3b80d8

Renamed MachineInstrIndex to LiveIndex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8

Try to fix unit test linking on linux ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83252 91177308-0d34-0410-b5e6-96231b3b80d8

MingW build fixes

- MingW needs -lpsapi (in ${LIBS}) linked after -lLLVMSystem.
  Noticed by Ronald Pijnacker!

- Some parts of the System library must be build with exceptions on windows.
  Based on a patch by Jay Foad!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83251 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a use-after-free in post-ra-scheduling.

MI->addOperand invalidates references to it's operands, avoid touching
the operand after a new one was added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83249 91177308-0d34-0410-b5e6-96231b3b80d8

Fix make rule when objdir is inside srcdir.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83243 91177308-0d34-0410-b5e6-96231b3b80d8

getFunctionAlignment should return log2 alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83242 91177308-0d34-0410-b5e6-96231b3b80d8

Fix tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83241 91177308-0d34-0410-b5e6-96231b3b80d8

Fix test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83240 91177308-0d34-0410-b5e6-96231b3b80d8

C++ member functions must be 2 byte aligned per ABI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83239 91177308-0d34-0410-b5e6-96231b3b80d8

Forgot about ARM::tPUSH. It also has a new writeback operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83237 91177308-0d34-0410-b5e6-96231b3b80d8

Move load / store multiple before post-alloc scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83236 91177308-0d34-0410-b5e6-96231b3b80d8

Test case for aligned attribute on function declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83234 91177308-0d34-0410-b5e6-96231b3b80d8

All callee-saved registers are live-out of a return block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83223 91177308-0d34-0410-b5e6-96231b3b80d8

Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83218 91177308-0d34-0410-b5e6-96231b3b80d8

Expand api out in the usual inserter way, though, I do have a
question, can we get rid of the BasicBlock versions of all inserters
and use Head == 0 to indicate the old case when GetInsertBlock == 0?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83216 91177308-0d34-0410-b5e6-96231b3b80d8

Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8

ARM::tPOP and tPOP_RET each has an extra writeback operand now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83214 91177308-0d34-0410-b5e6-96231b3b80d8

remove trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83213 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to extract lexical scope information from DebugLoc attached with an machine instruction.
This is not yet enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83210 91177308-0d34-0410-b5e6-96231b3b80d8

Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83208 91177308-0d34-0410-b5e6-96231b3b80d8

 Record first and last instruction of a scope in DbgScope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83207 91177308-0d34-0410-b5e6-96231b3b80d8

Don't use identifiers that start with an underscore followed
by a capital letter, which invokes undefined behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83206 91177308-0d34-0410-b5e6-96231b3b80d8

Teach CMake to look for bidirectional_iterator, iterator, forward_iterator, uint64_t, and u_int64_t, from Yonggang Luo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83203 91177308-0d34-0410-b5e6-96231b3b80d8

Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change
operands of instructions with these properties while breaking anti-dep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83198 91177308-0d34-0410-b5e6-96231b3b80d8

Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple,
ld / st pairs, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83197 91177308-0d34-0410-b5e6-96231b3b80d8

Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When
set, these flags indicate the instructions source / def operands have special
register allocation requirement that are not captured in their register classes.
Post-allocation passes (e.g. post-alloc scheduler) should not change their
allocations. e.g. ARM::LDRD require the two definitions to be allocated
even / odd register pair.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83196 91177308-0d34-0410-b5e6-96231b3b80d8

Remove GVNPRE.cpp from the CMake makefile

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83194 91177308-0d34-0410-b5e6-96231b3b80d8

remove the GVNPRE pass.  It has been subsumed by the GVN pass.
Ok'd by Owen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83193 91177308-0d34-0410-b5e6-96231b3b80d8

Update ARM JIT emitter to account for ld/st multiple changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83192 91177308-0d34-0410-b5e6-96231b3b80d8

Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83191 91177308-0d34-0410-b5e6-96231b3b80d8

Add another MDNode into DebugLocTuple. This will be used to keep track of inlined functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83190 91177308-0d34-0410-b5e6-96231b3b80d8

If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83189 91177308-0d34-0410-b5e6-96231b3b80d8

Use MachineInstr as an processDebugLoc() argument.
This will allow processDebugLoc() to handle scopes for DWARF debug info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83183 91177308-0d34-0410-b5e6-96231b3b80d8

Use MDNode * directly as an RecordSourceLine() argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83182 91177308-0d34-0410-b5e6-96231b3b80d8

Remove dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83181 91177308-0d34-0410-b5e6-96231b3b80d8

Add isFOO() helpers. Fix getDirectory() and getFilename() for DIScope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83180 91177308-0d34-0410-b5e6-96231b3b80d8

Use OutStreamer.SwitchSection instead of writing out textual section directives.
Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to
get access to that section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83178 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this
to emit target-specific things at the beginning of the asm output.  This
fixes a problem for PPC, where the text sections are not being kept together
as expected.  The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives.  The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text.  With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83176 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a comment typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83174 91177308-0d34-0410-b5e6-96231b3b80d8

Check for null MDNode element while printing comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83172 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83171 91177308-0d34-0410-b5e6-96231b3b80d8

The AsmPrinter base class contains a DwarfWriter member, so there's no need
for derived AsmPrinters to add another one.  In some cases, fixing this
removes the need to override the doInitialization method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83170 91177308-0d34-0410-b5e6-96231b3b80d8

Assert that ConstantArrays are created with correctly-typed elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83168 91177308-0d34-0410-b5e6-96231b3b80d8

Fix this code so that it doesn't try to iterate through a std::vector
while calling changeImmediateDominator, which removes elements from the
vector. This fixes PR5097.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83166 91177308-0d34-0410-b5e6-96231b3b80d8

Silence comparison always false warning in -Asserts mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83164 91177308-0d34-0410-b5e6-96231b3b80d8

Add additional assert() to verify no extraneous use of a scavenged register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83163 91177308-0d34-0410-b5e6-96231b3b80d8

Print tag name for MDNodes that are used to encode debug info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83160 91177308-0d34-0410-b5e6-96231b3b80d8

Fix integer overflow in instruction scheduling.  This can happen if we have
basic blocks that are so long that their size overflows a short.

Also assert that overflow does not happen in the future, as requested by Evan.

This fixes PR4401.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8

Silence unused variable warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83151 91177308-0d34-0410-b5e6-96231b3b80d8

Clarify comment phrasing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83148 91177308-0d34-0410-b5e6-96231b3b80d8

Add a option which would move ld/st multiple pass before post-alloc scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83145 91177308-0d34-0410-b5e6-96231b3b80d8

Add a target hook to add pre- post-regalloc scheduling passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83144 91177308-0d34-0410-b5e6-96231b3b80d8

Forgot this test earlier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83143 91177308-0d34-0410-b5e6-96231b3b80d8

add macruby, fix a validation problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83142 91177308-0d34-0410-b5e6-96231b3b80d8

Fix compile error as debug interface changed.

By the way, this code is buggy. You can't keep a map<MDNode *, something>
because the MDNode may be destroyed and reused for something else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83141 91177308-0d34-0410-b5e6-96231b3b80d8

replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
per customary usage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83137 91177308-0d34-0410-b5e6-96231b3b80d8

When checking whether we need to reserve a register for the scavenger,
the size of the saved frame pointer needs to be taken into account.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83136 91177308-0d34-0410-b5e6-96231b3b80d8

Add "isBarrier = 1" to return instructions.

Patch by Sylvere Teissier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83135 91177308-0d34-0410-b5e6-96231b3b80d8

fix compiler warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83132 91177308-0d34-0410-b5e6-96231b3b80d8

Remove regression that requires post-RA scheduling from a target that does not use that scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83128 91177308-0d34-0410-b5e6-96231b3b80d8

For Darwin, emit all the text section directives together before the dwarf
section directives.  This causes the assembler to put the text sections at
the beginning of the object file, which helps work around a limitation of the
Darwin ARM relocations.  Radar 7255355.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83127 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83123 91177308-0d34-0410-b5e6-96231b3b80d8

Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8

Forward-declare ValueSymbolTable so that SymbolTableListTraits.h can be parsed by itself

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83121 91177308-0d34-0410-b5e6-96231b3b80d8

Add a way for a frontend to generate more complex dwarf location
information.  This allows arbitrary code involving DW_OP_plus_uconst
and DW_OP_deref.  The scheme allows for easy extention to include,
any, or all of the DW_OP_ opcodes.  I thought about just exposing all
of them, but, wasn't sure if people wanted the dwarf opcodes exposed
in the api.  Is that a layering violation?

With this scheme, the entire existing block scheme used by llvm-gcc
can be switched over to the new scheme.  I think that would be
cleaner, as then the compiler specific bits are not present in llvm
proper.  Before the old code can be yanked however, similar code in
clang would have to be removed.

Next up, more testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83120 91177308-0d34-0410-b5e6-96231b3b80d8

minor cleanup and add clarifying comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83117 91177308-0d34-0410-b5e6-96231b3b80d8

Lookup handler name only when assertions are enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83114 91177308-0d34-0410-b5e6-96231b3b80d8

Add removeMD().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83107 91177308-0d34-0410-b5e6-96231b3b80d8

Only one custom meadata of each kind can be attached with an instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83105 91177308-0d34-0410-b5e6-96231b3b80d8

Additional check for regno==0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83103 91177308-0d34-0410-b5e6-96231b3b80d8

Use assertion instead of early exit to catch malformed custom metadata store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83102 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unnecessary cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83100 91177308-0d34-0410-b5e6-96231b3b80d8

Remove std::string uses from DebugInfo interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83083 91177308-0d34-0410-b5e6-96231b3b80d8

Create empty StringRef is incoming cstring is NULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83082 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify the tracking of virtual frame index registers. Ranges cannot overlap,
so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are as we expect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83081 91177308-0d34-0410-b5e6-96231b3b80d8

Moving register scavenging to a post pass results in virtual registers in
the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83077 91177308-0d34-0410-b5e6-96231b3b80d8