If the register allocator ran out of registers, just abort for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48175 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to
copyfromreg/copytoreg instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48174 91177308-0d34-0410-b5e6-96231b3b80d8

Document multiple return values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48173 91177308-0d34-0410-b5e6-96231b3b80d8

Fix mul expansion to check the correct number of bits for
zero extension when checking if an unsigned multiply is
safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8

Somewhat better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8

Default ISD::PREFETCH to expand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8

Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8

fix 80 col violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48166 91177308-0d34-0410-b5e6-96231b3b80d8

The __sync primitives only work on x86 and alpha;
xfail this test elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48164 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48163 91177308-0d34-0410-b5e6-96231b3b80d8

Restore optimization that merges blocks when inline function
has single return value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48162 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48161 91177308-0d34-0410-b5e6-96231b3b80d8

simplify

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48160 91177308-0d34-0410-b5e6-96231b3b80d8

Add -m32 to compilation line; test is only valid in
32-bit environment.  PR 2136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48159 91177308-0d34-0410-b5e6-96231b3b80d8

Stylistic modifications. No functionality changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48158 91177308-0d34-0410-b5e6-96231b3b80d8

These tests don't work unless SSE2 is active.
Judging from the checking comments this is intentional,
so add the flag (makes them pass on non-x86 host).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48157 91177308-0d34-0410-b5e6-96231b3b80d8

There is no "-mattr=+sse1" flag; fix test for non-x86 hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48156 91177308-0d34-0410-b5e6-96231b3b80d8

Use uint64_t not unsigned long long.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48154 91177308-0d34-0410-b5e6-96231b3b80d8

Integer comparison tests for CellSPU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8

Fix formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48151 91177308-0d34-0410-b5e6-96231b3b80d8

Refresh Makefile.ocaml in objdir if it is modified in srcdir.

Patch by Erick Tryzelaar!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48150 91177308-0d34-0410-b5e6-96231b3b80d8

Refresh Makefile.ocaml in objdir if it is modified in srcdir.

Patch by Erick Tryzelaar!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48149 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48148 91177308-0d34-0410-b5e6-96231b3b80d8

Adding ocamldoc generation.

Patch by Erick Tryzelaar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48147 91177308-0d34-0410-b5e6-96231b3b80d8

Formatting improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48146 91177308-0d34-0410-b5e6-96231b3b80d8

Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8

Add description of individual bits in CR. This fix PR1765.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48143 91177308-0d34-0410-b5e6-96231b3b80d8

Minor cleanup. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48142 91177308-0d34-0410-b5e6-96231b3b80d8

- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
 A = or A, B
 ...
 B = A
 ...
 C = A<kill>
 ...
   = B

then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48141 91177308-0d34-0410-b5e6-96231b3b80d8

Doh

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8

Add nosubmit option to control what is sent back to the results server.
Patch by Joachim Durchholz. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48139 91177308-0d34-0410-b5e6-96231b3b80d8

Move StrongPHIElimination after live interval analysis.  This will make things happier down the road.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48138 91177308-0d34-0410-b5e6-96231b3b80d8

Remove llvm-upgrade and update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48137 91177308-0d34-0410-b5e6-96231b3b80d8

Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8

remove an execution test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48135 91177308-0d34-0410-b5e6-96231b3b80d8

switch from hard coded g++/as tools to the ones detected from
the build system.  Patch by Joachim Durchholz  for PR2121

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48134 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48133 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR2120 by changing the replacement order to change compile_cxx
before compile_c.  Patch by Joachim Durchholz!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48132 91177308-0d34-0410-b5e6-96231b3b80d8

Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8

Update the .cvs files to match today's asm syntax change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48128 91177308-0d34-0410-b5e6-96231b3b80d8

Revert accidentally committed local changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48126 91177308-0d34-0410-b5e6-96231b3b80d8

Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48125 91177308-0d34-0410-b5e6-96231b3b80d8

Turn unwind_to into "unwinds to".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48123 91177308-0d34-0410-b5e6-96231b3b80d8

Increase ISD::ParamFlags to 64 bits.  Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8

This works on x86_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48121 91177308-0d34-0410-b5e6-96231b3b80d8

Darwin PPC64 indirect call target goes in X12, not R12.  This fixes these
two regression tests:
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48120 91177308-0d34-0410-b5e6-96231b3b80d8

cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48119 91177308-0d34-0410-b5e6-96231b3b80d8

make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48118 91177308-0d34-0410-b5e6-96231b3b80d8

remove an extraneous (and ugly) default argument, thanks Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48117 91177308-0d34-0410-b5e6-96231b3b80d8

Fix RUN line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48116 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some compilation errors on msvc:
- "Redefinition of I" (iterator masks previous definition)
- include missing header file

Patch by Argiris Kirtzidis!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48115 91177308-0d34-0410-b5e6-96231b3b80d8

And again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48112 91177308-0d34-0410-b5e6-96231b3b80d8

Braces belong here. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48111 91177308-0d34-0410-b5e6-96231b3b80d8

Temporary XFAIL the test, until I'll commit a fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48110 91177308-0d34-0410-b5e6-96231b3b80d8

SCCP also needs to be taught to follow unwind_to

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48109 91177308-0d34-0410-b5e6-96231b3b80d8

fp_round's produced by getCopyFromParts should always be exact, because
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.

This improves:

define double @test2() {
%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
ret double %tmp85
}

from:

_test2:
subl $20, %esp
# InlineAsm Start
fld0
# InlineAsm End
fstpl 8(%esp)
movsd 8(%esp), %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $20, %esp
#FP_REG_KILL
ret

to:

_test2:
# InlineAsm Start
fld0
# InlineAsm End
#FP_REG_KILL
ret

by avoiding a f64 <-> f80 trip

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48108 91177308-0d34-0410-b5e6-96231b3b80d8

teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8

Don't eliminate blocks that are only reachable by unwind_to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48106 91177308-0d34-0410-b5e6-96231b3b80d8

Add ScheduleDAG support for copytoreg where the src/dst register are
in different register classes, e.g. copy of ST(0) to RFP*.  This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8

add some code to support cross-register class copying from
RST -> RFP{32/64/80}.  We only handle ST(0) for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8

Remove llvm-upgrade and update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48103 91177308-0d34-0410-b5e6-96231b3b80d8

rearrange some code, no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48101 91177308-0d34-0410-b5e6-96231b3b80d8

fix 80 col violation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48100 91177308-0d34-0410-b5e6-96231b3b80d8

Firstly, having a BranchInst isn't exclusive with having an unwind_to.
Secondly, we have to check whether the branch is actually pointing to the block
with the unwind in it. We could have gotten here because of the unwind_to alone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48099 91177308-0d34-0410-b5e6-96231b3b80d8

claim ST(x) registers are 80 bits, which is true.  This doesn't affect
codegen yet because these can't be spilled (they don't exist until after RA).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48098 91177308-0d34-0410-b5e6-96231b3b80d8

extend fp values with FP_EXTEND not FP_ROUND.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48097 91177308-0d34-0410-b5e6-96231b3b80d8

A BB that unwind_to an "unwind" inst is that same as one that doesn't unwind_to
at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48096 91177308-0d34-0410-b5e6-96231b3b80d8

This patch cleans up the OCaml bindings so that they format nicely with
ocamldoc. It does not yet hook into the build system, though.

Patch by Erick Tryzelaar!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48095 91177308-0d34-0410-b5e6-96231b3b80d8

rename FP_SETRESULT -> FP_SET_ST0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48094 91177308-0d34-0410-b5e6-96231b3b80d8

rename FpGETRESULT32 -> FpGET_ST0_32 etc.  Add support for
isel'ing value preserving FP roundings from one fp stack reg to another
into a noop, instead of stack traffic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48093 91177308-0d34-0410-b5e6-96231b3b80d8

reduce this testcase more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48092 91177308-0d34-0410-b5e6-96231b3b80d8

Finish implementing a readme entry: when inserting an i64 variable
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
movl $1234567, %eax
andl 4(%esp), %eax
movd %eax, %xmm0
ret

instead of:

_test3:
subl $28, %esp
movl $1234567, %eax
andl 32(%esp), %eax
movl %eax, (%esp)
movl $0, 4(%esp)
movq (%esp), %xmm0
addl $28, %esp
ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8

Update the block cloner which fixes bugpoint on code using unwind_to (phew!)
and also update the cloning interface's major user, the loop optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48088 91177308-0d34-0410-b5e6-96231b3b80d8

Update the inliner and simplifycfg to handle unwind_to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48086 91177308-0d34-0410-b5e6-96231b3b80d8

Two things. Preserve the unwind_to when splitting a BB.
Add the ability to remove just one instance of a BB from a phi node. This fixes
the compile error in the tree now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48085 91177308-0d34-0410-b5e6-96231b3b80d8

Prune the unwind_to labels on BBs that don't need them. Another step in the
removal of invoke, PR1269.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48084 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48064 91177308-0d34-0410-b5e6-96231b3b80d8

Implement a readme entry, compiling
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
movl $1, %eax
movd %eax, %xmm0
ret

instead of a constant pool load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8

upgrade this test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48062 91177308-0d34-0410-b5e6-96231b3b80d8

make this test harder

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48061 91177308-0d34-0410-b5e6-96231b3b80d8

Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handling
of BUILD_VECTORS that only have two unique elements:

1. The previous code was nondeterminstic, because it walked a map in
   SDOperand order, which isn't determinstic.
2. The previous code didn't handle the case when one element was undef
   very well.  Now we ensure that the generated shuffle mask has the
   undef vector on the RHS (instead of potentially being on the LHS)
   and that any elements that refer to it are themselves undef.  This
   allows us to compile CodeGen/X86/vec_set-9.ll into:

_test3:
movd %rdi, %xmm0
punpcklqdq %xmm0, %xmm0
ret

instead of:

_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret

... saving a register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48060 91177308-0d34-0410-b5e6-96231b3b80d8

Teach SD some vector identities, allowing us to compile vec_set-9 into:

_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret

instead of:

_test3:
#IMPLICIT_DEF %rax
movd %rax, %xmm0
movd %rdi, %xmm1
punpcklqdq %xmm1, %xmm0
ret

This is still not ideal.  There is no reason to two xmm regs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8

1) Improve comments.
2) Don't try to insert an i64 value into the low part of a
   vector with movq on an x86-32 target.  This allows us to
   compile:

__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:

_doload64:
movaps LCPI1_0, %xmm0
ret

instead of:

_doload64:
subl $28, %esp
movl $0, 4(%esp)
movl $1, (%esp)
movq (%esp), %xmm0
addl $28, %esp
ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48057 91177308-0d34-0410-b5e6-96231b3b80d8

minor simplifications to this code, don't create a dead
SCALAR_TO_VECTOR on paths that end up not using it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48056 91177308-0d34-0410-b5e6-96231b3b80d8

This one looks easy, add a note.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48055 91177308-0d34-0410-b5e6-96231b3b80d8

move these to the appropriate file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48054 91177308-0d34-0410-b5e6-96231b3b80d8

Not all users of a BB are Instructions any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48047 91177308-0d34-0410-b5e6-96231b3b80d8

Load the symbols first so that the interpreter constructor can find them when
it tries to initialize them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48046 91177308-0d34-0410-b5e6-96231b3b80d8

much simpler test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48045 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unused runPass methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48044 91177308-0d34-0410-b5e6-96231b3b80d8

More ppc32 byval handling (bug fixes).  Things
are looking pretty good now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48043 91177308-0d34-0410-b5e6-96231b3b80d8

Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for calls with i128 return values on ppc64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48041 91177308-0d34-0410-b5e6-96231b3b80d8

Something that kills a super-register also
kills the sub-register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48038 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a typo. It's causing consumer-typeset to miscompile. Perhaps more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48035 91177308-0d34-0410-b5e6-96231b3b80d8

There is no killUse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48034 91177308-0d34-0410-b5e6-96231b3b80d8

add dropped section test case for PR2123

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48033 91177308-0d34-0410-b5e6-96231b3b80d8

Add new sretpromotion pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48032 91177308-0d34-0410-b5e6-96231b3b80d8

PPC64 passes arguments of integral type in i64 registers, not i32. Reflect this
by promoting smaller integral values (i32 at this point) to i64, then truncating
to get the wanted size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48030 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for lowering 128-bit shifts on ppc64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48029 91177308-0d34-0410-b5e6-96231b3b80d8