firefly-linux-kernel-4.4.55.git
11 years agodrm/radeon/dpm: pull in ppm info from atom
Alex Deucher [Wed, 20 Mar 2013 17:00:18 +0000 (13:00 -0400)]
drm/radeon/dpm: pull in ppm info from atom

Used by SI dpm.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: endian fixes for extended power tables
Alex Deucher [Wed, 20 Mar 2013 16:44:11 +0000 (12:44 -0400)]
drm/radeon/dpm: endian fixes for extended power tables

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: pull in phase shedding limits from atom
Alex Deucher [Wed, 20 Mar 2013 16:30:25 +0000 (12:30 -0400)]
drm/radeon/dpm: pull in phase shedding limits from atom

Required for dpm on SI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add an enum for pcie gen selection
Alex Deucher [Mon, 18 Mar 2013 21:03:01 +0000 (17:03 -0400)]
drm/radeon/dpm: add an enum for pcie gen selection

This makes it easier the understand what the code is
doing.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: implement clock and power gating for SI
Alex Deucher [Thu, 7 Mar 2013 17:56:35 +0000 (12:56 -0500)]
drm/radeon: implement clock and power gating for SI

Only Cape Verde supports power gating.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add clearstate init for verde power gating
Alex Deucher [Fri, 12 Apr 2013 20:48:21 +0000 (16:48 -0400)]
drm/radeon: add clearstate init for verde power gating

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: initialize save/restore buffer for pg on verde
Alex Deucher [Wed, 6 Mar 2013 23:48:05 +0000 (18:48 -0500)]
drm/radeon: initialize save/restore buffer for pg on verde

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add indirect accessors for UVD CTX registers
Alex Deucher [Mon, 25 Feb 2013 20:18:39 +0000 (15:18 -0500)]
drm/radeon: add indirect accessors for UVD CTX registers

These are needed for certain UVD power saving features.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add atom get leakage vddc function
Alex Deucher [Tue, 19 Feb 2013 22:14:43 +0000 (17:14 -0500)]
drm/radeon: add atom get leakage vddc function

Required for DPM on SI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update rlc programming sequence on SI
Alex Deucher [Fri, 15 Feb 2013 21:49:59 +0000 (16:49 -0500)]
drm/radeon: update rlc programming sequence on SI

This is required for certain power management features.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: enable additional power gating features on trinity
Alex Deucher [Fri, 15 Feb 2013 21:26:33 +0000 (16:26 -0500)]
drm/radeon: enable additional power gating features on trinity

TN has some additional powergating features beyond what is
supported on ON/LN.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add support for ASPM on SI asics (v2)
Alex Deucher [Fri, 15 Feb 2013 16:56:59 +0000 (11:56 -0500)]
drm/radeon: add support for ASPM on SI asics (v2)

Enables PCIE ASPM (Active State Power Management) on
SI asics.

v2: fix typo

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add support for ASPM on evergreen asics
Alex Deucher [Fri, 15 Feb 2013 16:02:50 +0000 (11:02 -0500)]
drm/radeon: add support for ASPM on evergreen asics

Enables PCIE ASPM (Active State Power Management) on
evergreen-cayman asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add accessors of pif_phy indirect register space
Alex Deucher [Thu, 14 Feb 2013 23:18:12 +0000 (18:18 -0500)]
drm/radeon: add accessors of pif_phy indirect register space

Required for accessing certain pcie related registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: implement pcie gen2/3 support for SI
Alex Deucher [Thu, 14 Feb 2013 22:16:51 +0000 (17:16 -0500)]
drm/radeon: implement pcie gen2/3 support for SI

If both the motherboard and GPU support pcie gen2 or 3,
enable it.  PCIE gen2 and 3 offer more bandwidth than
pcie gen1.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update radeon_atom_get_voltage_table() for SI
Alex Deucher [Wed, 13 Feb 2013 22:29:54 +0000 (17:29 -0500)]
drm/radeon: update radeon_atom_get_voltage_table() for SI

SI uses a new atom table revision.  Required for DPM on SI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update radeon_atom_is_voltage_gpio() for SI
Alex Deucher [Wed, 13 Feb 2013 22:04:59 +0000 (17:04 -0500)]
drm/radeon: update radeon_atom_is_voltage_gpio() for SI

SI uses a new atom table.  Required for DPM on SI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/atom: add helper to calcuate mpll params
Alex Deucher [Wed, 13 Feb 2013 21:38:25 +0000 (16:38 -0500)]
drm/radeon/atom: add helper to calcuate mpll params

There's a new table for calculating the memory pll
parameters on SI.  Required for SI DPM support.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: implement apci perf request
Alex Deucher [Wed, 13 Feb 2013 20:47:24 +0000 (15:47 -0500)]
drm/radeon: implement apci perf request

These functions use acpi methods to adjust the pcie
gen speed.  Used by DPM.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: remove local sumo_get_xclk()
Alex Deucher [Tue, 25 Jun 2013 19:45:03 +0000 (15:45 -0400)]
drm/radeon/dpm: remove local sumo_get_xclk()

Use the new asic callback instead.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add missing UVD clock set in cayman dpm code
Alex Deucher [Mon, 11 Feb 2013 18:27:23 +0000 (13:27 -0500)]
drm/radeon: add missing UVD clock set in cayman dpm code

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: remove broken dyn state remnants
Alex Deucher [Wed, 16 Jan 2013 19:40:26 +0000 (14:40 -0500)]
drm/radeon/dpm: remove broken dyn state remnants

Now that the proper fix has been implemented I can
remove the last remnants of the initial implementation.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add pre/post_set_power_state callback (cayman)
Alex Deucher [Wed, 16 Jan 2013 19:35:39 +0000 (14:35 -0500)]
drm/radeon/dpm: add pre/post_set_power_state callback (cayman)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add pre/post_set_power_state callback (BTC)
Alex Deucher [Wed, 16 Jan 2013 19:17:23 +0000 (14:17 -0500)]
drm/radeon/dpm: add pre/post_set_power_state callback (BTC)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add pre/post_set_power_state callback (TN)
Alex Deucher [Wed, 16 Jan 2013 18:53:40 +0000 (13:53 -0500)]
drm/radeon/dpm: add pre/post_set_power_state callback (TN)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add pre/post_set_power_state callback (sumo)
Alex Deucher [Tue, 25 Jun 2013 19:40:21 +0000 (15:40 -0400)]
drm/radeon/dpm: add pre/post_set_power_state callback (sumo)

This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add pre/post_set_power_state callbacks (6xx-eg)
Alex Deucher [Wed, 16 Jan 2013 18:13:42 +0000 (13:13 -0500)]
drm/radeon/dpm: add pre/post_set_power_state callbacks (6xx-eg)

For r6xx-evergreen, they are no-ops as they don't support
any dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add new pre/post_set_power_state callbacks
Alex Deucher [Wed, 16 Jan 2013 17:52:04 +0000 (12:52 -0500)]
drm/radeon/dpm: add new pre/post_set_power_state callbacks

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/tn: restructure code
Alex Deucher [Tue, 25 Jun 2013 19:34:00 +0000 (15:34 -0400)]
drm/radeon/dpm/tn: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/sumo: restructure code
Alex Deucher [Tue, 25 Jun 2013 19:31:49 +0000 (15:31 -0400)]
drm/radeon/dpm/sumo: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/cayman: restructure code
Alex Deucher [Wed, 16 Jan 2013 16:41:37 +0000 (11:41 -0500)]
drm/radeon/dpm/cayman: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/btc: restructure code
Alex Deucher [Wed, 26 Jun 2013 04:22:06 +0000 (00:22 -0400)]
drm/radeon/dpm/btc: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/evergreen: restructure code
Alex Deucher [Wed, 26 Jun 2013 04:20:28 +0000 (00:20 -0400)]
drm/radeon/dpm/evergreen: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/rv7xx: restructure code
Alex Deucher [Thu, 27 Jun 2013 22:54:46 +0000 (18:54 -0400)]
drm/radeon/dpm/rv7xx: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/rv6xx: restructure code
Alex Deucher [Wed, 16 Jan 2013 14:39:55 +0000 (09:39 -0500)]
drm/radeon/dpm/rv6xx: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm/rs780: restructure code
Alex Deucher [Wed, 16 Jan 2013 14:20:28 +0000 (09:20 -0500)]
drm/radeon/dpm/rs780: restructure code

Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add dpm support for cayman (v5)
Alex Deucher [Fri, 12 Apr 2013 20:42:42 +0000 (16:42 -0400)]
drm/radeon/kms: add dpm support for cayman (v5)

This adds dpm support for cayman asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)
- power containment
- shader power scaling

Set radeon.dpm=1 to enable.

v2: fold in tdp fix
v3: fix indentation
v4: fix 64 bit div
v5: attempt to fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
11 years agodrm/radeon/dpm: fixup dynamic state adjust for btc (v2)
Alex Deucher [Fri, 30 Nov 2012 00:27:56 +0000 (19:27 -0500)]
drm/radeon/dpm: fixup dynamic state adjust for btc (v2)

Use a dedicated copy of the current power state since
we may have to adjust it on the fly.

v2: fix up redundant state sets

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: fixup dynamic state adjust for TN
Alex Deucher [Fri, 30 Nov 2012 01:34:06 +0000 (20:34 -0500)]
drm/radeon/dpm: fixup dynamic state adjust for TN

Use a dedicated copy of the current power state since
we may have to adjust it on the fly.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: fixup dynamic state adjust for sumo
Alex Deucher [Fri, 30 Nov 2012 01:27:50 +0000 (20:27 -0500)]
drm/radeon/dpm: fixup dynamic state adjust for sumo

Use a dedicated copy of the current power state since
we may have to adjust it on the fly.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: track whether we are on AC or battery
Alex Deucher [Fri, 30 Nov 2012 15:56:57 +0000 (10:56 -0500)]
drm/radeon/dpm: track whether we are on AC or battery

Driver needs this information to validate power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add helpers for extended power tables (v2)
Alex Deucher [Thu, 15 Nov 2012 00:57:42 +0000 (19:57 -0500)]
drm/radeon/dpm: add helpers for extended power tables (v2)

This data will be needed for dpm on newer asics.

v2: fix typo in rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: enable UVD as needed (v9)
Alex Deucher [Fri, 21 Jun 2013 19:12:57 +0000 (15:12 -0400)]
drm/radeon/kms: enable UVD as needed (v9)

When using UVD, the driver must switch to a special UVD power
state.  In the CS ioctl, switch to the power state and schedule
work to change the power state back, when the work comes up,
check if uvd is still busy and if not, switch back to the user
state, otherwise, reschedule the work.

Note:  We really need some better way to decide when to
switch out of the uvd power state.  Switching power states
while playback is active make uvd angry.

V2: fix locking.

V3: switch from timer to delayed work

V4: check fence driver for UVD jobs, reduce timeout to
    1 second and rearm timeout on activity

v5: rebase on new dpm tree

v6: rebase on interim uvd on demand changes

v7: fix UVD when DPM is disabled

v8: unify non-DPM and DPM UVD handling

v9: remove leftover idle work struct

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
11 years agodrm/radeon: add dpm UVD handling for TN asics (v2)
Alex Deucher [Thu, 8 Nov 2012 01:05:07 +0000 (20:05 -0500)]
drm/radeon: add dpm UVD handling for TN asics (v2)

v2: fix typo noticed by Dan Carpenter

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add dpm UVD handling for sumo asics
Alex Deucher [Wed, 5 Dec 2012 20:59:11 +0000 (15:59 -0500)]
drm/radeon: add dpm UVD handling for sumo asics

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add dpm UVD handling for evergreen/btc asics
Alex Deucher [Wed, 26 Jun 2013 04:35:16 +0000 (00:35 -0400)]
drm/radeon: add dpm UVD handling for evergreen/btc asics

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add dpm UVD handling for r7xx asics
Alex Deucher [Thu, 27 Jun 2013 22:47:18 +0000 (18:47 -0400)]
drm/radeon: add dpm UVD handling for r7xx asics

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: let atom control display phy powergating
Alex Deucher [Tue, 27 Nov 2012 17:10:35 +0000 (12:10 -0500)]
drm/radeon/dpm: let atom control display phy powergating

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add dpm support for trinity asics
Alex Deucher [Fri, 12 Apr 2013 20:40:41 +0000 (16:40 -0400)]
drm/radeon/kms: add dpm support for trinity asics

This adds dpm support for trinity asics.  This includes:
- clockgating
- powergating
- dynamic engine clock scaling
- dynamic voltage scaling

set radeon.dpm=1 to enable it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add dpm support for sumo asics (v2)
Alex Deucher [Fri, 12 Apr 2013 18:56:21 +0000 (14:56 -0400)]
drm/radeon/kms: add dpm support for sumo asics (v2)

This adds dpm support for sumo asics.  This includes:
- clockgating
- powergating
- dynamic engine clock scaling
- dynamic voltage scaling

set radeon.dpm=1 to enable it.

v2: fix indention

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
11 years agodrm/radeon/kms: add dpm support for btc (v3)
Alex Deucher [Wed, 26 Jun 2013 04:15:24 +0000 (00:15 -0400)]
drm/radeon/kms: add dpm support for btc (v3)

This adds dpm support for btc asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)

Set radeon.dpm=1 to enable.

v2: reduce stack usage
v3: attempt to fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add dpm support for evergreen (v4)
Alex Deucher [Wed, 26 Jun 2013 04:33:35 +0000 (00:33 -0400)]
drm/radeon/kms: add dpm support for evergreen (v4)

This adds dpm support for evergreen asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)

Set radeon.dpm=1 to enable.

v2: reduce stack usage, rename ulv struct
v3: fix thermal interrupt check notices by Jerome
v4: fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add dpm support for rv7xx (v4)
Alex Deucher [Wed, 26 Jun 2013 04:11:19 +0000 (00:11 -0400)]
drm/radeon/kms: add dpm support for rv7xx (v4)

This adds dpm support for rv7xx asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching

Set radeon.dpm=1 to enable.

v2: reduce stack usage
v3: fix 64 bit div
v4: fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add dpm support for rv6xx (v3)
Alex Deucher [Fri, 12 Apr 2013 18:04:10 +0000 (14:04 -0400)]
drm/radeon/kms: add dpm support for rv6xx (v3)

This adds dpm support for rv6xx asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching

Set radeon.dpm=1 to enable.

v2: remove duplicate line
v3: fix thermal interrupt check noticed by Jerome

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
11 years agodrm/radeon/kms: add dpm support for rs780/rs880
Alex Deucher [Fri, 12 Apr 2013 17:59:22 +0000 (13:59 -0400)]
drm/radeon/kms: add dpm support for rs780/rs880

This adds dpm support for rs780/rs880 asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic voltage scaling

set radeon.dpm=1 to enable it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add common r600 dpm functions
Alex Deucher [Fri, 12 Apr 2013 17:58:03 +0000 (13:58 -0400)]
drm/radeon/kms: add common r600 dpm functions

These are shared by rs780/rs880, rv6xx, and newer chips.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: fix up dce6 display watermark calc for dpm
Alex Deucher [Thu, 3 May 2012 14:43:25 +0000 (10:43 -0400)]
drm/radeon/kms: fix up dce6 display watermark calc for dpm

Calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: fix up dce4/5 display watermark calc for dpm
Alex Deucher [Tue, 13 Mar 2012 20:25:11 +0000 (16:25 -0400)]
drm/radeon/kms: fix up dce4/5 display watermark calc for dpm

Calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: fix up 6xx/7xx display watermark calc for dpm
Alex Deucher [Thu, 25 Oct 2012 21:02:17 +0000 (17:02 -0400)]
drm/radeon/kms: fix up 6xx/7xx display watermark calc for dpm

Calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: fix up rs780/rs880 display watermark calc for dpm
Alex Deucher [Thu, 25 Oct 2012 20:58:55 +0000 (16:58 -0400)]
drm/radeon/kms: fix up rs780/rs880 display watermark calc for dpm

calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add common dpm infrastructure
Alex Deucher [Fri, 12 Apr 2013 17:55:22 +0000 (13:55 -0400)]
drm/radeon/kms: add common dpm infrastructure

This adds the common dpm (dynamic power management)
infrastructure:
- dpm callbacks
- dpm init/fini/suspend/resume
- dpm power state selection

No device specific code is enabled yet.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add new asic struct for rv6xx (v4)
Alex Deucher [Fri, 21 Jun 2013 18:42:08 +0000 (14:42 -0400)]
drm/radeon/kms: add new asic struct for rv6xx (v4)

Has a different dpm controller than r600.

v2: rebase on gpu reset changes
v3: rebase on get_xclk changes
v4: update rptr/wtpr callbacks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add atom helper functions for dpm (v3)
Alex Deucher [Mon, 24 Jun 2013 14:50:34 +0000 (10:50 -0400)]
drm/radeon/kms: add atom helper functions for dpm (v3)

dpm needs access to atombios data and command tables
for setup and calculation of a number of parameters.

v2: endian fix
v3: fix mc reg table bug

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: properly set up the RLC on ON/LN/TN (v3)
Alex Deucher [Fri, 12 Apr 2013 17:52:52 +0000 (13:52 -0400)]
drm/radeon: properly set up the RLC on ON/LN/TN (v3)

This is required for certain advanced functionality.

v2: save/restore list takes dword offsets
v3: rebase on gpu reset changes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: move ucode defines to a separate header
Alex Deucher [Fri, 11 Jan 2013 20:33:13 +0000 (15:33 -0500)]
drm/radeon/kms: move ucode defines to a separate header

Avoids confusion and duplication.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add support for thermal sensor on tn
Alex Deucher [Fri, 14 Dec 2012 16:57:36 +0000 (11:57 -0500)]
drm/radeon: add support for thermal sensor on tn

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: make get_temperature functions a callback
Alex Deucher [Fri, 21 Jun 2013 18:38:03 +0000 (14:38 -0400)]
drm/radeon: make get_temperature functions a callback

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/evergreen: add indirect register accessors for CG registers
Alex Deucher [Fri, 12 Apr 2013 15:49:51 +0000 (11:49 -0400)]
drm/radeon/evergreen: add indirect register accessors for CG registers

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add accessors for RCU indirect space
Alex Deucher [Fri, 12 Apr 2013 15:27:20 +0000 (11:27 -0400)]
drm/radeon/kms: add accessors for RCU indirect space

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add current KB pci ids
Alex Deucher [Thu, 24 Jan 2013 17:30:24 +0000 (12:30 -0500)]
drm/radeon: add current KB pci ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add current Bonaire PCI ids
Alex Deucher [Fri, 7 Jun 2013 15:52:42 +0000 (11:52 -0400)]
drm/radeon: add current Bonaire PCI ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add cik tile mode array query
Alex Deucher [Wed, 10 Apr 2013 17:41:25 +0000 (13:41 -0400)]
drm/radeon: add cik tile mode array query

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add radeon_asic struct for CIK (v12)
Alex Deucher [Tue, 9 Apr 2013 20:22:31 +0000 (16:22 -0400)]
drm/radeon: add radeon_asic struct for CIK (v12)

v2: fix up for latest reset changes
v3: use CP for pt updates for now
v4: update for 2 level PTs
v5: update for ib_parse removal
v6: vm_flush api change
v7: rebase
v8: fix gfx ring function pointers
v9: fix vm_set_page function params
v10: update for compute changes
v11: cleanup for release
v12: update rptr/wptr callbacks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/cik: add support for golden register init
Alex Deucher [Tue, 9 Apr 2013 18:43:30 +0000 (14:43 -0400)]
drm/radeon/cik: add support for golden register init

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/cik: add support for compute interrupts
Alex Deucher [Tue, 9 Apr 2013 18:26:16 +0000 (14:26 -0400)]
drm/radeon/cik: add support for compute interrupts

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: fix up ring functions for compute rings
Alex Deucher [Thu, 11 Apr 2013 13:36:17 +0000 (09:36 -0400)]
drm/radeon: fix up ring functions for compute rings

The compute rings use RELEASE_MEM rather then EOP
packets for writing fences and there is no SYNC_PFP_ME
packet on the compute rings.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/cik: switch to type3 nop packet for compute rings (v2)
Alex Deucher [Mon, 3 Jun 2013 15:21:58 +0000 (11:21 -0400)]
drm/radeon/cik: switch to type3 nop packet for compute rings (v2)

Type 2 packets are deprecated on CIK MEC and we should use
type 3 nop packets.  Setting the count field to the max value
(0x3fff) indicates that only one dword should be skipped
like a type 2 packet.

v2: add comment to code

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
11 years agodrm/radeon/cik: Add support for compute queues (v4)
Alex Deucher [Wed, 26 Jun 2013 21:37:11 +0000 (17:37 -0400)]
drm/radeon/cik: Add support for compute queues (v4)

On CIK, the compute rings work slightly differently than
on previous asics, however the basic concepts are the same.

The main differences:
- New MEC engines for compute queues
- Multiple queues per MEC:
  - CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per pipe = 32 queues
  -    KV: 2 MEC, 4 pipes per MEC, 8 queues per pipe = 64 queues
- Queues can be allocated and scheduled by another queue
- New doorbell aperture allows you to assign space in the aperture
  for the wptr which allows for userspace access to queues

v2: add wptr shadow, fix eop setup
v3: fix comment
v4: switch to new callback method

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
11 years agodrm/radeon: implement simple doorbell page allocator
Alex Deucher [Mon, 4 Mar 2013 17:47:46 +0000 (12:47 -0500)]
drm/radeon: implement simple doorbell page allocator

The doorbell aperture is a PCI BAR whose pages can be
mapped to compute resources for things like wptrs
for userspace queues.

This patch maps the BAR and sets up a simple allocator
to allocate pages from the BAR.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: use callbacks for ring pointer handling (v3)
Alex Deucher [Tue, 29 Jan 2013 19:10:56 +0000 (14:10 -0500)]
drm/radeon: use callbacks for ring pointer handling (v3)

Add callbacks to the radeon_asic struct to handle
rptr/wptr fetchs and wptr updates.
We currently use one version for all rings, but this
allows us to override with a ring specific versions.

Needed for compute rings on CIK.

v2: udpate as per Christian's comments
v3: fix some rebase cruft

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/cik: add srbm_select function
Alex Deucher [Tue, 29 Jan 2013 15:44:22 +0000 (10:44 -0500)]
drm/radeon/cik: add srbm_select function

Allows us to select instanced registers based on:
- ME (micro engine
- Pipe
- Queue
- VMID

Switch MC setup to use this new function.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add UVD support for CIK (v3)
Christian König [Tue, 9 Apr 2013 17:39:21 +0000 (13:39 -0400)]
drm/radeon: add UVD support for CIK (v3)

v2: agd5f: fix clock dividers setup for bonaire
v3: agd5f: rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update radeon_atom_get_clock_dividers for CIK
Alex Deucher [Tue, 19 Feb 2013 19:35:34 +0000 (14:35 -0500)]
drm/radeon: update radeon_atom_get_clock_dividers for CIK

CIK uses a slightly different variant of the table structs
and params.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update radeon_atom_get_clock_dividers() for SI
Alex Deucher [Fri, 7 Jun 2013 15:50:12 +0000 (11:50 -0400)]
drm/radeon: update radeon_atom_get_clock_dividers() for SI

SI uses v5 of the command table and uses a different table
for memory PLLs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/cik: add pcie_port indirect register accessors
Alex Deucher [Wed, 3 Apr 2013 23:28:32 +0000 (19:28 -0400)]
drm/radeon/cik: add pcie_port indirect register accessors

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add get_xclk() callback for CIK
Alex Deucher [Tue, 9 Apr 2013 17:32:18 +0000 (13:32 -0400)]
drm/radeon: add get_xclk() callback for CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add indirect register accessors for SMC registers
Alex Deucher [Fri, 20 Apr 2012 16:39:49 +0000 (12:39 -0400)]
drm/radeon: add indirect register accessors for SMC registers

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update CIK soft reset
Alex Deucher [Tue, 9 Apr 2013 16:59:51 +0000 (12:59 -0400)]
drm/radeon: update CIK soft reset

Update to the newer programming model.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add get_gpu_clock_counter() callback for cik
Alex Deucher [Wed, 19 Dec 2012 03:17:00 +0000 (22:17 -0500)]
drm/radeon: add get_gpu_clock_counter() callback for cik

Used for GPU clock counter snapshots.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: Update radeon_info_ioctl for CIK (v2)
Alex Deucher [Fri, 6 Jul 2012 21:40:32 +0000 (17:40 -0400)]
drm/radeon: Update radeon_info_ioctl for CIK (v2)

v2: rebase changes, fix a couple missed cases

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add SS override support for KB/KV
Alex Deucher [Wed, 25 Jul 2012 16:45:16 +0000 (12:45 -0400)]
drm/radeon: add SS override support for KB/KV

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: use frac fb div on DCE8
Alex Deucher [Wed, 19 Dec 2012 03:11:51 +0000 (22:11 -0500)]
drm/radeon: use frac fb div on DCE8

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: Handle PPLL0 powerdown on DCE8
Alex Deucher [Tue, 5 Feb 2013 16:58:11 +0000 (11:58 -0500)]
drm/radeon: Handle PPLL0 powerdown on DCE8

Only Bonaire has PPLL0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add support pll selection for DCE8 (v4)
Alex Deucher [Fri, 14 Sep 2012 15:57:21 +0000 (11:57 -0400)]
drm/radeon: add support pll selection for DCE8 (v4)

v2: make PPLL0 is available for non-DP on CI
v3: rebase changes, update documentation
v4: fix kabini

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update DISPCLK programming for DCE8
Alex Deucher [Fri, 13 Jul 2012 15:04:37 +0000 (11:04 -0400)]
drm/radeon: update DISPCLK programming for DCE8

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/atom: add support for new DVO tables
Alex Deucher [Tue, 24 Jul 2012 23:03:24 +0000 (19:03 -0400)]
drm/radeon/atom: add support for new DVO tables

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/atom: add DCE8 encoder support
Alex Deucher [Thu, 6 Sep 2012 18:32:06 +0000 (14:32 -0400)]
drm/radeon/atom: add DCE8 encoder support

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dce8: crtc_set_base updates
Alex Deucher [Wed, 11 Jul 2012 22:38:29 +0000 (18:38 -0400)]
drm/radeon/dce8: crtc_set_base updates

Some new fields and DESKTOP_HEIGHT register moved.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dce8: properly handle interlaced timing
Alex Deucher [Wed, 11 Jul 2012 22:02:10 +0000 (18:02 -0400)]
drm/radeon/dce8: properly handle interlaced timing

The register bits changed on DCE8 compared to previous
families.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/cik: add hw cursor support (v2)
Alex Deucher [Thu, 24 Jan 2013 15:06:33 +0000 (10:06 -0500)]
drm/radeon/cik: add hw cursor support (v2)

CIK (DCE8) hw cursors are programmed the same as evergreen
(DCE4) with the following caveats:
- cursors are now 128x128 pixels
- new alpha blend enable bit

v2: rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>