Factor out LiveIntervalAnalysis' code to determine whether an instruction
is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.

This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8

Extract scope information from the variable itself, instead of relying on alloca or llvm.dbg.declare location.

While recording beginning of a function, use scope info from the first location entry instead of just relying on first location entry itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83684 91177308-0d34-0410-b5e6-96231b3b80d8

ExecutionEngine::clearGlobalMappingsFromModule failed to remove reverse
mappings, which could cause errors and assert-failures.  This patch fixes that,
adds a test, and refactors the global-mapping-removal code into a single place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83678 91177308-0d34-0410-b5e6-96231b3b80d8

Add a const qualifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83677 91177308-0d34-0410-b5e6-96231b3b80d8

Use names instead of numbers for some of the magic
constants used in inlining heuristics (especially
those used in more than one file).  No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83675 91177308-0d34-0410-b5e6-96231b3b80d8

Added another bit of the ARM target assembler to llvm-mc to parse register
lists.  Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on
errors so 0-15 values could be returned as register numbers.  Also added the
rest of the arm register names to the currently hacked up version to allow more
testing.  Some changes to ARMAsmParser::ParseOperand to give different errors
for things not yet supported and some additions to the hacked
ARMAsmParser::MatchInstruction to allow more testing for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83673 91177308-0d34-0410-b5e6-96231b3b80d8

isTriviallyReMaterializable checks the
TargetInstrDesc::isRematerializable flag, so it isn't necessary to do
this check in its callers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83671 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the x86 test-shrink optimization so that it doesn't shrink comparisons
when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83670 91177308-0d34-0410-b5e6-96231b3b80d8

Merge a bunch of NEON tests into larger files so they run faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83667 91177308-0d34-0410-b5e6-96231b3b80d8

Add basic infrastructure and x86 support for preserving MachineMemOperand
information when unfolding memory references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83656 91177308-0d34-0410-b5e6-96231b3b80d8

Check invalid debug info for enums. This may happen when underlyng enum is optimized away. Eventually DwarfChecker will clean this up during llvm verification stage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83655 91177308-0d34-0410-b5e6-96231b3b80d8

when previous scratch register is killed, flag the value as no longer tracking

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83653 91177308-0d34-0410-b5e6-96231b3b80d8

Convert some ARM tests with lots of greps to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83651 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r83606 and add comments explaining why it isn't safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83649 91177308-0d34-0410-b5e6-96231b3b80d8

As it turns out, the bug fixes in GC codegen did not make it
to llvm-2.6. Remove the precise garbage collection feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83638 91177308-0d34-0410-b5e6-96231b3b80d8

80-columns!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83628 91177308-0d34-0410-b5e6-96231b3b80d8

Add initial information on VMKit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83627 91177308-0d34-0410-b5e6-96231b3b80d8

more random updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83625 91177308-0d34-0410-b5e6-96231b3b80d8

Give Dan and my recent changes, machine LICM is now code size neutral.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83624 91177308-0d34-0410-b5e6-96231b3b80d8

checkpoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83623 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83622 91177308-0d34-0410-b5e6-96231b3b80d8

checkpoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83621 91177308-0d34-0410-b5e6-96231b3b80d8

Slight rewording.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83620 91177308-0d34-0410-b5e6-96231b3b80d8

Omit the 'out_file_index != -1' check when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83619 91177308-0d34-0410-b5e6-96231b3b80d8

Use llvm-as only for compiling .ll -> .bc.

llc can compile .ll files directly these days.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83618 91177308-0d34-0410-b5e6-96231b3b80d8

Commit one last NEON test to use FileCheck.  That's all of them now!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83617 91177308-0d34-0410-b5e6-96231b3b80d8

Convert more NEON tests to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83616 91177308-0d34-0410-b5e6-96231b3b80d8

update clang section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83615 91177308-0d34-0410-b5e6-96231b3b80d8

Raise the limit on built-in plugins in llvmc to 10.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83614 91177308-0d34-0410-b5e6-96231b3b80d8

Reconfigure automatically when Base.td.in is changed.

Thanks to Chris for heads-up!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83613 91177308-0d34-0410-b5e6-96231b3b80d8

Reset kill markers after live interval is reconstructed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83608 91177308-0d34-0410-b5e6-96231b3b80d8

Indentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83607 91177308-0d34-0410-b5e6-96231b3b80d8

Preserve HasNSW and HasNUW when constructing SCEVs for Add and Mul
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83606 91177308-0d34-0410-b5e6-96231b3b80d8

When considering whether to inline Callee into Caller,
and that will make Caller too big to inline, see if it
might be better to inline Caller into its callers instead.
This situation is described in PR 2973, although I haven't
tried the specific case in SPASS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83602 91177308-0d34-0410-b5e6-96231b3b80d8

Add the ability to track HasNSW and HasNUW on more kinds of SCEV expressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83601 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83600 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83598 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83596 91177308-0d34-0410-b5e6-96231b3b80d8

Convert more NEON tests to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83595 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
Also fix some copy-and-paste errors in previous changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83590 91177308-0d34-0410-b5e6-96231b3b80d8

Remove code that makes no sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83589 91177308-0d34-0410-b5e6-96231b3b80d8

Convert more NEON tests to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83587 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83585 91177308-0d34-0410-b5e6-96231b3b80d8

Update CMake build yet again after a source file was removed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83575 91177308-0d34-0410-b5e6-96231b3b80d8

It's possible for a global variable to be optimized out of a metadata object. So
we should allow a "null" with this dyn_cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83573 91177308-0d34-0410-b5e6-96231b3b80d8

Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83572 91177308-0d34-0410-b5e6-96231b3b80d8

Clear variable debug info map at the end of the function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83571 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up some unnecessary initializations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83566 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up a comment (indentation was wrong).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83565 91177308-0d34-0410-b5e6-96231b3b80d8

Add a SelectionDAG getTargetInsertSubreg convenience function,
similar to getTargetExtractSubreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83564 91177308-0d34-0410-b5e6-96231b3b80d8

Do not record line number to implicitly mark start of function if function has arguments. Extra line number entries trip gdb in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83563 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing names for the XCore specific LADD and LSUB nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83556 91177308-0d34-0410-b5e6-96231b3b80d8

Add a form of addPreserved which takes a string argument, to allow passes
to declare that they preserve other passes without needing to pull in
additional header file or library dependencies. Convert MachineFunctionPass
and CodeGenLICM to make use of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83555 91177308-0d34-0410-b5e6-96231b3b80d8

some updates from users of llvm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83551 91177308-0d34-0410-b5e6-96231b3b80d8

Add some peepholes for signed comparisons using ashr X, X, 32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83549 91177308-0d34-0410-b5e6-96231b3b80d8

all content split into sections, still much work to be done.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83532 91177308-0d34-0410-b5e6-96231b3b80d8

remove LoopVR pass.  According to Nick:
"LoopVR's logic was copied into ScalarEvolution::getUnsignedRange and
::getSignedRange. Please delete LoopVR."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83531 91177308-0d34-0410-b5e6-96231b3b80d8

checkpoint, this is still not comprehendible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83530 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak the build.

Forgot about the need to reconfigure after modifying Base.td.in....

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83529 91177308-0d34-0410-b5e6-96231b3b80d8

Convert more NEON tests to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83528 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83526 91177308-0d34-0410-b5e6-96231b3b80d8

Make the Base plugin understand -MF and -MT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83525 91177308-0d34-0410-b5e6-96231b3b80d8

Input files should go before all other options.

Important, for example, when calling 'gcc a.o b.o c.o -lD -lE -lF'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83524 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup up unused R3LiveIn tracking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83522 91177308-0d34-0410-b5e6-96231b3b80d8

Re-enable register scavenging in Thumb1 by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83521 91177308-0d34-0410-b5e6-96231b3b80d8

bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83519 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83518 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83513 91177308-0d34-0410-b5e6-96231b3b80d8

In instcombine's debug output, avoid printing ADD for instructions that are
already on the worklist, and print Visited when an instruction is about to be
visited.  Net, on one input, this reduced the output size by at least 9x.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83510 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83508 91177308-0d34-0410-b5e6-96231b3b80d8

Convert more NEON tests to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83507 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83506 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the OProfile part of PR5018. This fixes --without-oprofile, makes
it the default, and works around a broken libopagent on some Debian
systems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83503 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83502 91177308-0d34-0410-b5e6-96231b3b80d8

reverting thumb1 scavenging default due to test failure while I figure out what's up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83501 91177308-0d34-0410-b5e6-96231b3b80d8

second half of lazy liveness removal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83500 91177308-0d34-0410-b5e6-96231b3b80d8

Fix handling of x86 'R' constraint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83499 91177308-0d34-0410-b5e6-96231b3b80d8

Convert more NEON tests to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83497 91177308-0d34-0410-b5e6-96231b3b80d8

Enable thumb1 register scavenging by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83496 91177308-0d34-0410-b5e6-96231b3b80d8

Enable thumb1 register scavenging by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83494 91177308-0d34-0410-b5e6-96231b3b80d8

Extract subprogram and compile unit information from the debug info attached to an instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83491 91177308-0d34-0410-b5e6-96231b3b80d8

Add some instruction encoding bits for NEON load/store instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83490 91177308-0d34-0410-b5e6-96231b3b80d8

80-column and whitespace fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83489 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed MCSectionMachO::ParseSectionSpecifier to allow an attribute of "none" so
that a symbol stub section with no attributes can be parsed as in:
.section __TEXT,__picsymbolstub4,symbol_stubs,none,16

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83488 91177308-0d34-0410-b5e6-96231b3b80d8

Convert test to FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83487 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst4 intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83486 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst3 intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83484 91177308-0d34-0410-b5e6-96231b3b80d8

grammar

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83483 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vst2 intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83482 91177308-0d34-0410-b5e6-96231b3b80d8

add initializers for clarity. Add missing assignment of PrevLastUseOp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83481 91177308-0d34-0410-b5e6-96231b3b80d8

Remove LazyLiveness from the tree.  It doesn't work right now, and I'm not going to have the time
to finish it any time soon.  If someone's interested it, they can resurrect it from SVN history.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83480 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld4 intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83479 91177308-0d34-0410-b5e6-96231b3b80d8

Add another bit of the ARM target assembler to llvm-mc to parse registers
with writeback, things like "sp!", etc.  Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83477 91177308-0d34-0410-b5e6-96231b3b80d8

Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and
teach it how to recognize invariant physical registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83476 91177308-0d34-0410-b5e6-96231b3b80d8

Replace TargetInstrInfo::isInvariantLoad and its target-specific
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83475 91177308-0d34-0410-b5e6-96231b3b80d8

Add a few simple MachineVerifier checks for MachineMemOperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83474 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for NEON vld3 intrinsics with 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83471 91177308-0d34-0410-b5e6-96231b3b80d8

Rearrange code for selecting vld2 intrinsics.  No functionality change.
This is just to be more consistent with the forthcoming code for vld3/4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83470 91177308-0d34-0410-b5e6-96231b3b80d8

Add tests for vld2 of 128-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83468 91177308-0d34-0410-b5e6-96231b3b80d8