Fix what surely must be a copy+pasto.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67881 91177308-0d34-0410-b5e6-96231b3b80d8

Initialize LiveOutInfo's APInt members to zero, as APInt's
default constructor produces an uninitialized APInt.
This fixes PR3896.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67879 91177308-0d34-0410-b5e6-96231b3b80d8

remove trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67874 91177308-0d34-0410-b5e6-96231b3b80d8

"ghostify" the ilist<Function> sentinel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67872 91177308-0d34-0410-b5e6-96231b3b80d8

Allow invertable -xno- style optins as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67862 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r67844. This fixes the llvm-gcc-4.2 build on Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67856 91177308-0d34-0410-b5e6-96231b3b80d8

Fix build on MacOS 10.4 systems (suggested by Mike Smith).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67855 91177308-0d34-0410-b5e6-96231b3b80d8

Fix this test so that it doesn't spuriously fail due to some
unrelated debugging output happening to contain the string "store".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67849 91177308-0d34-0410-b5e6-96231b3b80d8

Avoid hardcoding that X86 addresses have 4 operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67848 91177308-0d34-0410-b5e6-96231b3b80d8

Use less hard coded constants to make the code less brittle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67846 91177308-0d34-0410-b5e6-96231b3b80d8

Reapply r66415, which was reverted in r66426 for
causing a bootstrap failure.  Bootstraps here on
x86-32-linux and x86-64-linux.  Requested by the
author Gabor Greif who says that a bug that might
have been causing the failure has since been fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67844 91177308-0d34-0410-b5e6-96231b3b80d8

I am trying to add a segment to the X86 addresses matching to
improve TLS support (see http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090309/075220.html), but that code is VERY brittle.

This patch just makes it a bit more resistant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67843 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r67798: it breaks llvm-gcc bootstrap on x86-64-linux, presumably due to
a miscompilation.

make[4]: Entering directory `gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include'
if [ ! -d "./x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch" ]; then \
          mkdir -p ./x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch; \
        fi; \
        gcc-4.2.llvm-objects/./gcc/xgcc -shared-libgcc -Bgcc-4.2.llvm-objects/./gcc -nostdinc++
-Lgcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/src -Lgcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/src/.libs
-B/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/bin/ -B/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/lib/ -isystem
/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/include -isystem /usr/local/gnat-llvm/x86_64-unknown-linux-gnu/sys-include -Winvalid-pch -Wno-deprecated -x
c++-header -g -O2  -D_GNU_SOURCE -Igcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/x86_64-unknown-linux-gnu
-Igcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include -Igcc-4.2.llvm/libstdc++-v3/libsupc++ -O2 -g
gcc-4.2.llvm/libstdc++-v3/include/precompiled/stdtr1c++.h -o x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch/O2g.gch
In file included from gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/repeat.h:247,
                 from gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/functional:1098,
                 from gcc-4.2.llvm/libstdc++-v3/include/precompiled/stdtr1c++.h:53:
gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/functional_iterate.h:417: internal compiler error: in ggc_recalculate_in_use_p, at
ggc-page.c:1602
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://llvm.org/bugs/> for instructions.
make[4]: *** [x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch/O2g.gch] Error 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67839 91177308-0d34-0410-b5e6-96231b3b80d8

Documentation update.

Expand a bit on various '--*-graph' options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67836 91177308-0d34-0410-b5e6-96231b3b80d8

-write-graph now can be used with -o.

Makes it possible to set the output file name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67835 91177308-0d34-0410-b5e6-96231b3b80d8

Revert previous change in favour of an explanatory
comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67833 91177308-0d34-0410-b5e6-96231b3b80d8

A Release-Asserts build makes it sound like assertions
are turned on, while in fact they are turned off.  Name
this Release-NoAsserts instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67831 91177308-0d34-0410-b5e6-96231b3b80d8

Shrink wrapping in PEI: initial release. Finishing development, enable with --shrink-wrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67828 91177308-0d34-0410-b5e6-96231b3b80d8

Add a __builtin___memset_chk test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67815 91177308-0d34-0410-b5e6-96231b3b80d8

One more place to skip debug info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67811 91177308-0d34-0410-b5e6-96231b3b80d8

While hoisting an instruction, update alias info set tracker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67798 91177308-0d34-0410-b5e6-96231b3b80d8

Update to account for driver renaming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67791 91177308-0d34-0410-b5e6-96231b3b80d8

-no-implicit-float means explicit fp operations are legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67784 91177308-0d34-0410-b5e6-96231b3b80d8

Add -march=x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67783 91177308-0d34-0410-b5e6-96231b3b80d8

Fix misc. small issues with debug visualization.

Detailed bug report:
http://llvm.org/bugs/show_bug.cgi?id=3873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67768 91177308-0d34-0410-b5e6-96231b3b80d8

tADDhirr is a thumb instruction. Do not allow this code to be reached in non-thumb mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67765 91177308-0d34-0410-b5e6-96231b3b80d8

Don't assign a new stack slot if the pre-alloc splitter already assigned one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67764 91177308-0d34-0410-b5e6-96231b3b80d8

fix a few spelling errors and typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67758 91177308-0d34-0410-b5e6-96231b3b80d8

Use 'bool' for FoundRC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67750 91177308-0d34-0410-b5e6-96231b3b80d8

Add -f to RUN line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67744 91177308-0d34-0410-b5e6-96231b3b80d8

Pull transform from target-dependent code into target-independent code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67742 91177308-0d34-0410-b5e6-96231b3b80d8

no need for eh info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67740 91177308-0d34-0410-b5e6-96231b3b80d8

fix warning in -asserts mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67739 91177308-0d34-0410-b5e6-96231b3b80d8

fix some warnings in release-asserts mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67738 91177308-0d34-0410-b5e6-96231b3b80d8

fix an apparently real bug exposed by a warning in -asserts mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67737 91177308-0d34-0410-b5e6-96231b3b80d8

fix warning in -asserts build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67736 91177308-0d34-0410-b5e6-96231b3b80d8

Add testcase for r67728.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67729 91177308-0d34-0410-b5e6-96231b3b80d8

Match this pattern so that we can generate simpler code:

  %a = ...
  %b = and i32 %a, 2
  %c = srl i32 %b, 1
  %d = br i32 %c,

into

  %a = ...
  %b = and %a, 2
  %c = X86ISD::CMP %b, 0
  %d = X86ISD::BRCOND %c ...

This applies only when the AND constant value has one bit set and the SRL
constant is equal to the log2 of the AND constant. The back-end is smart enough
to convert the result into a TEST/JMP sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67728 91177308-0d34-0410-b5e6-96231b3b80d8

Doxygen-ify comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67727 91177308-0d34-0410-b5e6-96231b3b80d8

Skip debug info one more place.  (This one gets
called from llc, not opt, but it's an IR level
optimization nevertheless.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67724 91177308-0d34-0410-b5e6-96231b3b80d8

Before deleting a basic block, give other loop passes a chance cleanup analysis values, related to the instructions in the basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67719 91177308-0d34-0410-b5e6-96231b3b80d8

Modify getRegisterValueType() to allow for a register being in mutliple
register classes. Before, MVT::Other would be returned anytime a reg was
in multiple register classes. Now, MVT::Other is only returned if the types
for those register classes differ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67714 91177308-0d34-0410-b5e6-96231b3b80d8

Add a test case for PR3779: when to promote the function return value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67702 91177308-0d34-0410-b5e6-96231b3b80d8

Revert 67132. This is breaking some objective-c apps.
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8

One more test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67694 91177308-0d34-0410-b5e6-96231b3b80d8

When optimizing with debug info, don't keep the
stoppoint nodes around until Legalize; doing this
imposed an ordering on a sequence of loads that
came from different lines, interfering with scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67692 91177308-0d34-0410-b5e6-96231b3b80d8

Add __builtin___memcpy_chk tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67691 91177308-0d34-0410-b5e6-96231b3b80d8

These tests pass on linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67689 91177308-0d34-0410-b5e6-96231b3b80d8

Add a __builtin_object_size test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67688 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug in our autoupgrade support: in an argument list to a function
call, we should treat "i64 zext" as the start of a constant expr, but
"i64 0 zext" as an argument with an obsolete attribute on it (this form
is already tested by test/Assembler/2007-07-30-AutoUpgradeZextSext.ll).

Make the autoupgrade logic more discerning to avoid treating "i64 zext"
as an old-style attribute, causing us to reject a valid constant expr.
This fixes PR3876.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67682 91177308-0d34-0410-b5e6-96231b3b80d8

do not rely on callee being operand 0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67681 91177308-0d34-0410-b5e6-96231b3b80d8

Do not ignore DW_TAG_class_type!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67675 91177308-0d34-0410-b5e6-96231b3b80d8

CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67669 91177308-0d34-0410-b5e6-96231b3b80d8

CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8

Don't print global names twice with -asm-verbose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67667 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r67655 and r67656, as they are breaking the build. I'm
not going to persue this further at this time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67666 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR3874 by restoring a condition I removed, but making it more
precise than it used to be.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67662 91177308-0d34-0410-b5e6-96231b3b80d8

Do not ignore DW_TAG_class_type!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67661 91177308-0d34-0410-b5e6-96231b3b80d8

LLVM's master Makefile.common is in LLVM_SRC_ROOT, not LLVM_OBJ_ROOT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67658 91177308-0d34-0410-b5e6-96231b3b80d8

oops, I intended to remove this, not comment it out.  Thanks Duncan!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67657 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate configure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67656 91177308-0d34-0410-b5e6-96231b3b80d8

Fix paths; AutoRegen.sh changes its current working directory to be the
autoconf directory, but these paths need to be relative to the main
source directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67655 91177308-0d34-0410-b5e6-96231b3b80d8

Update for autoconf 2.6x;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67654 91177308-0d34-0410-b5e6-96231b3b80d8

Converted a1.ll to unittests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67652 91177308-0d34-0410-b5e6-96231b3b80d8

Mention explicitly that the Ada front-end will not bootstrap.
The configure line had --disable-bootstrap, but it was not
clear that this is essential.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67651 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR3845: Avoid stale MachineInstruction pointer reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67649 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bash-isms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67647 91177308-0d34-0410-b5e6-96231b3b80d8

Set the svn:mime-type to text/x-sh, so that diffs work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67646 91177308-0d34-0410-b5e6-96231b3b80d8

simplify logic and get rid of the assumption that operand 0 is the callee

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67642 91177308-0d34-0410-b5e6-96231b3b80d8

canonicalize inttoptr and ptrtoint instructions which cast pointers
to/from integer types that are not intptr_t to convert to intptr_t
then do an integer conversion to the dest type.  This exposes the
cast to the optimizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67638 91177308-0d34-0410-b5e6-96231b3b80d8

fix one more fp80 case (used only by Interpreter)
and streamline code here a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67636 91177308-0d34-0410-b5e6-96231b3b80d8

two changes:
1. Make instcombine always canonicalize trunc x to i1 into an icmp(x&1).  This
   exposes the AND to other instcombine xforms and is more of what the code
   generator expects.
2. Rewrite the remaining trunc pattern match to use 'match', which
   simplifies it a lot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67635 91177308-0d34-0410-b5e6-96231b3b80d8

Change JIT for different layout of fp80.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67629 91177308-0d34-0410-b5e6-96231b3b80d8

Add a testcase for the scheduling heuristic introduced in r67586.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67622 91177308-0d34-0410-b5e6-96231b3b80d8

more tidying: name the components of PhysReg in the case when
the target constraint specifies a specific physreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67618 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy a bit more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67617 91177308-0d34-0410-b5e6-96231b3b80d8

simplify this code a bit now that "allocation to a vreg class" can never
fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67616 91177308-0d34-0410-b5e6-96231b3b80d8

I was convinced that it's ok to allow a second i8 return value
to be returned in DL. LLVM's multiple-return-value support is
not ABI-conforming; front-ends that wish to have code emitted
that conforms to an ABI are currently expected to make
arrangements for this on their own rather than assuming that
multiple-return-values will automatically do the right thing.
This commit doesn't fundamentally change this situation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67588 91177308-0d34-0410-b5e6-96231b3b80d8

Minor compile-time optimization; don't bother checking
canClobberPhysRegDefs if the successor node doesn't
clobber any physical registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67587 91177308-0d34-0410-b5e6-96231b3b80d8

Add a pre-pass to the burr-list scheduler which makes adjustments to
help out the register pressure reduction heuristics in the case of
nodes with multiple uses. Currently this uses very conservative
heuristics, so it doesn't have a broad impact, but in cases where it
does help it can make a big difference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67586 91177308-0d34-0410-b5e6-96231b3b80d8

Do not emit comments unless -asm-verbose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67580 91177308-0d34-0410-b5e6-96231b3b80d8

Use a SmallPtrSet instead of std::set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67578 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases.
e.g. allocating for GR32, bh is not used, updating bl spill weight.
     bl should get the same spill weight otherwise it will be choosen
     as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67574 91177308-0d34-0410-b5e6-96231b3b80d8

Add sanity check in Clang TableGen backend to check if 'Component' is a string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67565 91177308-0d34-0410-b5e6-96231b3b80d8

Fix internal representation of fp80 to be the
same as a normal i80 {low64, high16} rather
than its own {high64, low16}.  A depressing number
of places know about this; I think I got them all.
Bitcode readers and writers convert back to the old
form to avoid breaking compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67562 91177308-0d34-0410-b5e6-96231b3b80d8

README.txt: test commit w/blank line appended

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67560 91177308-0d34-0410-b5e6-96231b3b80d8

When unfolding a load during scheduling, the new operator node has
a data dependency on the load node, so it really needs a
data-dependence edge to the load node, even if the load previously
existed.

And add a few comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67554 91177308-0d34-0410-b5e6-96231b3b80d8

Update test for pr3864.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67545 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR3391 and PR3864. Reg allocator infinite looping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67544 91177308-0d34-0410-b5e6-96231b3b80d8

Don't set SUnit::hasPhysRegDefs to true unless the defs are
actually have uses, which reflects the way it's used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67540 91177308-0d34-0410-b5e6-96231b3b80d8

Fix canClobberPhysRegDefs to check all SDNodes grouped together
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67531 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new bit to SUnit to record whether a node has implicit physreg
defs, regardless of whether they are actually used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67528 91177308-0d34-0410-b5e6-96231b3b80d8

Now that errs() is properly non-buffered, there's no need to
explicitly flush it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67526 91177308-0d34-0410-b5e6-96231b3b80d8

Clarify a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67525 91177308-0d34-0410-b5e6-96231b3b80d8

LoopVR is not CFGOnly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67524 91177308-0d34-0410-b5e6-96231b3b80d8

Enhance LiveValues to work on PHI operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67523 91177308-0d34-0410-b5e6-96231b3b80d8

Make getOperandNumForIncomingValue and getOperandNumForIncomingBlock
static member functions, and add getIncomingValueNumForOperand
and getIncomingBlockNumForOperand, which are the respective
inverses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67522 91177308-0d34-0410-b5e6-96231b3b80d8

Correct some comments. Operand numbers start at 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67518 91177308-0d34-0410-b5e6-96231b3b80d8

Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67512 91177308-0d34-0410-b5e6-96231b3b80d8

Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67511 91177308-0d34-0410-b5e6-96231b3b80d8