Elaine Zhang [Tue, 7 Feb 2017 09:39:11 +0000 (17:39 +0800)]
dt-bindings: clock: rk3328: add clk_mac2io_ext ID
Change-Id: I1f17c50020d5f37f5cfd6a4d0ecfc195bad2687d
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
shengfei Xu [Mon, 6 Feb 2017 07:45:12 +0000 (15:45 +0800)]
ARM64: dts: rk3399: enable rockchip-suspend for evb3
Change-Id: I1d1511965c2eb7c04a7f91f093e95f2eceeb4790
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Shengfei xu [Tue, 17 Jan 2017 07:15:03 +0000 (15:15 +0800)]
arm64: dts: rockchip: add rockchip-suspend node for rk3399
Change-Id: I6af1f487f40c0775102d3b9951617c5d03b884ef
Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Shengfei xu [Tue, 17 Jan 2017 06:46:21 +0000 (14:46 +0800)]
arm64: rockchip_defconfig: enable suspend mode config
Change-Id: Ifdf47ad8ff9303f5b94362f73f5115faaa3403d0
Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Shengfei xu [Tue, 17 Jan 2017 06:42:41 +0000 (14:42 +0800)]
arm64: rockchip_defconfig: enable SIP interface
Change-Id: I4f805ac550c291f4d0821cf7b2eb1eefe54ce067
Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Shengfei xu [Thu, 5 Jan 2017 08:55:54 +0000 (16:55 +0800)]
suspend: rockchip: set the suspend config to ATF
Change-Id: I400aa252c24b814e3da7fa6703a4e03a1c90d572
Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Huang, Tao [Tue, 7 Feb 2017 03:11:47 +0000 (11:11 +0800)]
dt-bindings: suspend: remove unused rockchip-pm.h
Which is legacy code, do not need any more.
Change-Id: I15f5cbf1389a6442fca6fbf348d2d94a59510338
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Ziyuan Xu [Sun, 5 Feb 2017 09:51:43 +0000 (17:51 +0800)]
ARM: dts: rockchip: fix some incorrect supply for miniarm
Redress the supply node for rk3288-miniarm board, which obey strictly
schematic.
Change-Id: I2c38c7ec080bc836e77857af3a6d3ef02345a120
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Mark Yao [Mon, 23 Jan 2017 08:20:08 +0000 (16:20 +0800)]
drm/rockchip: fix race with kms hotplug and fbdev
Kms hotplug event may race into fbdev helper initial, that would
cause the bug:
[ 0.735411] [
00000200] *pgd=
00000000f6ffe003, *pud=
00000000f6ffe003, *pmd=
0000000000000000
[ 0.736156] Internal error: Oops:
96000005 [#1] PREEMPT SMP
[ 0.736648] Modules linked in:
[ 0.736930] CPU: 2 PID: 20 Comm: kworker/2:0 Not tainted 4.4.41 #20
[ 0.737480] Hardware name: Rockchip RK3399 Board rev2 (BOX) (DT)
[ 0.738020] Workqueue: events cdn_dp_pd_event_work
[ 0.738447] task:
ffffffc0f21f3100 ti:
ffffffc0f2218000 task.ti:
ffffffc0f2218000
[ 0.739109] PC is at mutex_lock+0x14/0x44
[ 0.739469] LR is at drm_fb_helper_hotplug_event+0x30/0x114
[ 0.756253] [<
ffffff8008a344f4>] mutex_lock+0x14/0x44
[ 0.756260] [<
ffffff8008445708>] drm_fb_helper_hotplug_event+0x30/0x114
[ 0.756271] [<
ffffff8008473c84>] rockchip_drm_output_poll_changed+0x18/0x20
[ 0.756280] [<
ffffff8008439fcc>] drm_kms_helper_hotplug_event+0x28/0x34
[ 0.756286] [<
ffffff800846c444>] cdn_dp_pd_event_work+0x394/0x3c4
[ 0.756295] [<
ffffff80080b2b38>] process_one_work+0x218/0x3e0
[ 0.756302] [<
ffffff80080b3538>] worker_thread+0x2e8/0x404
[ 0.756308] [<
ffffff80080b7e70>] kthread+0xe8/0xf0
[ 0.756316] [<
ffffff8008082690>] ret_from_fork+0x10/0x40
Change-Id: I8d594183cf8187131418a0096dde840cbf01ed6b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 22 Jan 2017 07:39:33 +0000 (15:39 +0800)]
drm/rockchip: dw_hdmi: get rid of clock slop
Clock slop is a solution for rk3288, not suitable for rk3399,
after use crtc mode_valid, we can remove the clock slop.
Change-Id: I68121505dfb7e65bf09c26d51c23edc909bdb517
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 22 Jan 2017 07:46:48 +0000 (15:46 +0800)]
drm/rockchip: cdn-dp: check display mode with crtc mode valid
Change-Id: I431ae8e56c18b827e1995ce0dec125c585d096f9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 22 Jan 2017 07:54:24 +0000 (15:54 +0800)]
drm/rockchip: dw_hdmi: check display mode with crtc mode valid
Change-Id: I23470e46b97169da0b59153dfc0835833f1aa549
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 22 Jan 2017 07:53:49 +0000 (15:53 +0800)]
drm/rockchip: vop: support mode_valid for crtc
Change-Id: I51f2377c5bd4bdecf44ad31f11e4e7131c2c10c1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 22 Jan 2017 04:38:49 +0000 (12:38 +0800)]
arm64: dts: rk3399-android-next: add cdn display node
Change-Id: I3c940e330ceab488da3d4351de3a3f9500a6fb5e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 22 Jan 2017 04:00:01 +0000 (12:00 +0800)]
arm64: dts: rk3399-android-next: use status disabled instead delete node
Change-Id: Ia959ade5dda6f22682293494bafb45bdccba02be
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 22 Jan 2017 03:56:06 +0000 (11:56 +0800)]
drm: of: don't mask possible_crtcs if remote-point is disabled
Change-Id: I98d42ce5c9a5ed832e455a3d1fc88cf3ec717d69
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
zhangjun [Fri, 20 Jan 2017 06:03:34 +0000 (14:03 +0800)]
ASoC: rockchip: i2s: add other configurable formats
simple-audio-card,bitclock-inversion = <1> : bclk falling edge taken
simple-audio-card,format = "dsp_a" : pcm no delay mode
simple-audio-card,format = "dsp_b" : pcm late 1 mode
Change-Id: I3d99fd04ee63dec46eb74c625b1e43e698092fe5
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
Arnd Bergmann [Sun, 5 Feb 2017 02:19:54 +0000 (10:19 +0800)]
UPSTREAM: PCI: rockchip: Mark PM functions as __maybe_unused
When CONFIG_PM_SLEEP is disabled, we get harmless build warnings:
host/pcie-rockchip.c:1267:12: error: 'rockchip_pcie_resume_noirq'
defined but not used [-Werror=unused-function]
host/pcie-rockchip.c:1240:12: error: 'rockchip_pcie_suspend_noirq'
defined but not used [-Werror=unused-function]
Marking both functions as __maybe_unused avoids the warning without
the need for #ifdef around them.
Change-Id: Ic5f9f9d576049b77fd091488c785d09c46cb9b78
Fixes: 013dd3d5e183 ("PCI: rockchip: Add system PM support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git
commit
0b351c986a5ffedb502632c1b27690c9730d79c4)
Shawn Lin [Wed, 18 Jan 2017 03:03:17 +0000 (11:03 +0800)]
UPSTREAM: PCI: rockchip: improve the training polling code
Use the readl_poll_timeout instead of open coding them.
Change-Id: I68e801d395d3258a8a18ead2e18c2c479625d1fa
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git
commit
7faebda21d573a6889bab1e0100ed4092a5a4716)
Kirill A. Shutemov [Mon, 9 Mar 2015 21:11:12 +0000 (23:11 +0200)]
ANDROID: pagemap: do not leak physical addresses to non-privileged userspace
As pointed by recent post[1] on exploiting DRAM physical imperfection,
/proc/PID/pagemap exposes sensitive information which can be used to do
attacks.
This disallows anybody without CAP_SYS_ADMIN to read the pagemap.
[1] http://googleprojectzero.blogspot.com/2015/03/exploiting-dram-rowhammer-bug-to-gain.html
[ Eventually we might want to do anything more finegrained, but for now
this is the simple model. - Linus ]
We add this patch again for pass CTS
FileSystemPermissionTest: Assert /proc/self/pagemap not readable
Change-Id: Id4bf9ea27af000734356b921cd723868802b4335
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Konstantin Khlebnikov <khlebnikov@openvz.org>
Acked-by: Andy Lutomirski <luto@amacapital.net>
Cc: Pavel Emelyanov <xemul@parallels.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Mark Seaborn <mseaborn@chromium.org>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Lorenzo Colitti [Wed, 3 Feb 2016 15:52:15 +0000 (00:52 +0900)]
selinux: nlmsgtab: add SOCK_DESTROY to the netlink mapping tables
Without this, using SOCK_DESTROY in enforcing mode results in:
SELinux: unrecognized netlink message type=21 for sclass=32
Change-Id: I7862bb0fc83573567243ffa9549a2c7405b5986c
Elaine Zhang [Sun, 22 Jan 2017 06:57:29 +0000 (14:57 +0800)]
clk: rockchip: rk3399: fix up the pr_err for debug
Change-Id: I16eeacaf0307146ebf8db745621ef57e5ab16fec
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Bin Yang [Mon, 19 Dec 2016 10:16:46 +0000 (18:16 +0800)]
arm64: rockchip_defconfig: enable dp driver for drm
Change-Id: I6f7061fb6cc8c3f36f8b5b6d569266061a443e46
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Mark Yao [Fri, 20 Jan 2017 07:15:35 +0000 (15:15 +0800)]
drm/rockchip: dw_hdmi: move vpll set rate to encoder enable
Change-Id: I5cf7f32f15cf1ea3e85b69009615756be3809c5e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 20 Jan 2017 06:51:45 +0000 (14:51 +0800)]
arm64: dts: rk3399: fixup hdmi clocks node
Change-Id: If3c26da746b582e5b54fb953c04d75a3c640c19b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Huibin Hong [Thu, 19 Jan 2017 02:12:23 +0000 (10:12 +0800)]
fiq_debugger: Switch current cpu when the former cpu is offline
Change-Id: Ie1a5fe5c3496e5182f0f9aaab336a4d0ff683dfa
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
david.wu [Fri, 20 Jan 2017 07:03:39 +0000 (15:03 +0800)]
pwm: rockchip: add individual clocks supported for APB and function
New PWM module provides two individual clocks for APB bus clock
and function clock.
Change-Id: I0c262472c5d8b0c527c5a0a8d66b4512ac66f2ce
Signed-off-by: david.wu <david.wu@rock-chips.com>
Zhou weixin [Fri, 20 Jan 2017 02:07:53 +0000 (10:07 +0800)]
ARM64: dts: rk3399-tve1205g: add some config for uboot charge
1. add charge ic support max input voltage and current for fusb302 pd.
2. set uboot-exit-charge-level to 2.
Change-Id: I41558bd3d72c4ad8cd4392c6cbedb4b1ebf6b28c
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
Zhou weixin [Thu, 19 Jan 2017 13:59:07 +0000 (21:59 +0800)]
ARM64: dts: rk3399-tve1205g: add config for uboot charge with fusb302 sink
Change-Id: Ie1a54a1c05f0db2b16851728bdf442699b69f277
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
Elaine Zhang [Fri, 20 Jan 2017 02:07:59 +0000 (10:07 +0800)]
rockchip: clk: rk3399: Mark some grf clock as critical
pclk_perihp_grf and pclk_vio_grf is for some grf regs read and write,
mark it as critical and it never turns off.
Change-Id: If9465334b9168b4376a7ac95d5f08e389048409f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Mark Yao [Thu, 19 Jan 2017 09:49:52 +0000 (17:49 +0800)]
drm/rockchip: vop: no need wait vblank on crtc enable
Since atomic framework, crtc enable and disable are in pairs,
no need to wait vblank.
Change-Id: I87b630b89a8361b59f613d1954addd655b7a4e37
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 19 Jan 2017 09:14:06 +0000 (17:14 +0800)]
drm/rockchip: vop: add display input/output limit
Change-Id: If218ca6d2de5c05b6f8ed417cefa437c62c31935
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Jianhong Chen [Fri, 6 Jan 2017 08:51:55 +0000 (16:51 +0800)]
ARM64: dts: rk3328-evb: support rk805
Change-Id: I462c26188dbaaed84a1d7addd43dc1d95d5a3af7
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
Alan Stern [Mon, 27 Jun 2016 14:23:10 +0000 (10:23 -0400)]
UPSTREAM: USB: don't free bandwidth_mutex too early
The USB core contains a bug that can show up when a USB-3 host
controller is removed. If the primary (USB-2) hcd structure is
released before the shared (USB-3) hcd, the core will try to do a
double-free of the common bandwidth_mutex.
The problem was described in graphical form by Chung-Geol Kim, who
first reported it:
=================================================
At *remove USB(3.0) Storage
sequence <1> --> <5> ((Problem Case))
=================================================
VOLD
------------------------------------|------------
(uevent)
________|_________
|<1> |
|dwc3_otg_sm_work |
|usb_put_hcd |
|peer_hcd(kref=2)|
|__________________|
________|_________
|<2> |
|New USB BUS #2 |
| |
|peer_hcd(kref=1) |
| |
--(Link)-bandXX_mutex|
| |__________________|
|
___________________ |
|<3> | |
|dwc3_otg_sm_work | |
|usb_put_hcd | |
|primary_hcd(kref=1)| |
|___________________| |
_________|_________ |
|<4> | |
|New USB BUS #1 | |
|hcd_release | |
|primary_hcd(kref=0)| |
| | |
|bandXX_mutex(free) |<-
|___________________|
(( VOLD ))
______|___________
|<5> |
| SCSI |
|usb_put_hcd |
|peer_hcd(kref=0) |
|*hcd_release |
|bandXX_mutex(free*)|<- double free
|__________________|
=================================================
This happens because hcd_release() frees the bandwidth_mutex whenever
it sees a primary hcd being released (which is not a very good idea
in any case), but in the course of releasing the primary hcd, it
changes the pointers in the shared hcd in such a way that the shared
hcd will appear to be primary when it gets released.
This patch fixes the problem by changing hcd_release() so that it
deallocates the bandwidth_mutex only when the _last_ hcd structure
referencing it is released. The patch also removes an unnecessary
test, so that when an hcd is released, both the shared_hcd and
primary_hcd pointers in the hcd's peer will be cleared.
Change-Id: I4416ecd383136fa5898a5d6900de1ecf30ba5c54
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Reported-by: Chung-Geol Kim <chunggeol.kim@samsung.com>
Tested-by: Chung-Geol Kim <chunggeol.kim@samsung.com>
CC: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: William Wu <wulf@rock-chips.com>
(cherry picked from commit
ab2a4bf83902c170d29ba130a8abb5f9d90559e1)
Chris Bainbridge [Mon, 25 Apr 2016 12:48:38 +0000 (13:48 +0100)]
UPSTREAM: usb: core: hub: hub_port_init lock controller instead of bus
The XHCI controller presents two USB buses to the system - one for USB2
and one for USB3. The hub init code (hub_port_init) is reentrant but
only locks one bus per thread, leading to a race condition failure when
two threads attempt to simultaneously initialise a USB2 and USB3 device:
[ 8.034843] xhci_hcd 0000:00:14.0: Timeout while waiting for setup device command
[ 13.183701] usb 3-3: device descriptor read/all, error -110
On a test system this failure occurred on 6% of all boots.
The call traces at the point of failure are:
Call Trace:
[<
ffffffff81b9bab7>] schedule+0x37/0x90
[<
ffffffff817da7cd>] usb_kill_urb+0x8d/0xd0
[<
ffffffff8111e5e0>] ? wake_up_atomic_t+0x30/0x30
[<
ffffffff817dafbe>] usb_start_wait_urb+0xbe/0x150
[<
ffffffff817db10c>] usb_control_msg+0xbc/0xf0
[<
ffffffff817d07de>] hub_port_init+0x51e/0xb70
[<
ffffffff817d4697>] hub_event+0x817/0x1570
[<
ffffffff810f3e6f>] process_one_work+0x1ff/0x620
[<
ffffffff810f3dcf>] ? process_one_work+0x15f/0x620
[<
ffffffff810f4684>] worker_thread+0x64/0x4b0
[<
ffffffff810f4620>] ? rescuer_thread+0x390/0x390
[<
ffffffff810fa7f5>] kthread+0x105/0x120
[<
ffffffff810fa6f0>] ? kthread_create_on_node+0x200/0x200
[<
ffffffff81ba183f>] ret_from_fork+0x3f/0x70
[<
ffffffff810fa6f0>] ? kthread_create_on_node+0x200/0x200
Call Trace:
[<
ffffffff817fd36d>] xhci_setup_device+0x53d/0xa40
[<
ffffffff817fd87e>] xhci_address_device+0xe/0x10
[<
ffffffff817d047f>] hub_port_init+0x1bf/0xb70
[<
ffffffff811247ed>] ? trace_hardirqs_on+0xd/0x10
[<
ffffffff817d4697>] hub_event+0x817/0x1570
[<
ffffffff810f3e6f>] process_one_work+0x1ff/0x620
[<
ffffffff810f3dcf>] ? process_one_work+0x15f/0x620
[<
ffffffff810f4684>] worker_thread+0x64/0x4b0
[<
ffffffff810f4620>] ? rescuer_thread+0x390/0x390
[<
ffffffff810fa7f5>] kthread+0x105/0x120
[<
ffffffff810fa6f0>] ? kthread_create_on_node+0x200/0x200
[<
ffffffff81ba183f>] ret_from_fork+0x3f/0x70
[<
ffffffff810fa6f0>] ? kthread_create_on_node+0x200/0x200
Which results from the two call chains:
hub_port_init
usb_get_device_descriptor
usb_get_descriptor
usb_control_msg
usb_internal_control_msg
usb_start_wait_urb
usb_submit_urb / wait_for_completion_timeout / usb_kill_urb
hub_port_init
hub_set_address
xhci_address_device
xhci_setup_device
Mathias Nyman explains the current behaviour violates the XHCI spec:
hub_port_reset() will end up moving the corresponding xhci device slot
to default state.
As hub_port_reset() is called several times in hub_port_init() it
sounds reasonable that we could end up with two threads having their
xhci device slots in default state at the same time, which according to
xhci 4.5.3 specs still is a big no no:
"Note: Software shall not transition more than one Device Slot to the
Default State at a time"
So both threads fail at their next task after this.
One fails to read the descriptor, and the other fails addressing the
device.
Fix this in hub_port_init by locking the USB controller (instead of an
individual bus) to prevent simultaneous initialisation of both buses.
Fixes: 638139eb95d2 ("usb: hub: allow to process more usb hub events in parallel")
Link: https://lkml.org/lkml/2016/2/8/312
Link: https://lkml.org/lkml/2016/2/4/748
Conflicts:
drivers/usb/core/hcd.c
Change-Id: I5f266198d32793ea3bc009f64ffc8b2a7744461a
Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com>
Cc: stable <stable@vger.kernel.org>
Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: William Wu <wulf@rock-chips.com>
(cherry picked from commit
feb26ac31a2a5cb88d86680d9a94916a6343e9e6)
Jacob Chen [Fri, 20 Jan 2017 01:33:40 +0000 (09:33 +0800)]
arm: dts: fix dts for rk3288-popmetal
We have so many evaluation boards.....
Change-Id: I1fec7821dc7b96a263fd07fb5b910f526f4d1389
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
zzc [Wed, 18 Jan 2017 01:21:47 +0000 (09:21 +0800)]
net: rkwifi: fix using wext protocol anomaly
Change-Id: Id7a6b4069cb25bcf369f506e47630e86f98ec890
Signed-off-by: zzc <zzc@rock-chips.com>
Mark Yao [Thu, 19 Jan 2017 09:34:51 +0000 (17:34 +0800)]
drm/rockchip: vop: fix display logo flash
bootup logo path also would run into vop_enable, do windows disable on
vop_enable would may logo flash.
Just move register initial out of vop_enable, and rename vop_enable to
vop_power_enable.
Change-Id: I17b84970dbb473918ae7da5fab989694ef9bd109
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 19 Jan 2017 07:01:03 +0000 (15:01 +0800)]
drm/rockchip: fix some warning from smatch check
drivers/gpu/drm/rockchip/rockchip_drm_drv.c:489
update_state() warn: variable dereferenced before check 'encoder' (see line 488)
drivers/gpu/drm/rockchip/rockchip_drm_drv.c:687
rockchip_register_crtc_funcs() error: buffer overflow 'priv->crtc_funcs' 2 <= 2
drivers/gpu/drm/rockchip/rockchip_drm_drv.c:700
rockchip_unregister_crtc_funcs() error: buffer overflow 'priv->crtc_funcs' 2 <= 2
drivers/gpu/drm/rockchip/rockchip_drm_rga.c:848
rga_probe() warn: passing zero to 'PTR_ERR'
drivers/gpu/drm/rockchip/rockchip_drm_vop.c:597
vop_csc_setup() warn: variable dereferenced before check 'y2r_table' (see line 578)
drivers/gpu/drm/rockchip/rockchip_drm_vop.c:1059
vop_plane_atomic_update() warn: variable dereferenced before check 'crtc' (see line 1041)
drivers/gpu/drm/rockchip/rockchip_lvds.c:88
lvds_name_to_format() error: strncmp() '"vesa"' too small (5 vs 6)
I don't konw how to fix following error, maybe rga owner can fix it.
drivers/gpu/drm/rockchip/rockchip_drm_rga.c:174
rga_alloc_dma_buf_for_cmdlist() error: buffer overflow 'cmdlist->data' 64 <= 64
Change-Id: I41cd098dbd2f311d01b4e84cf0d51598264c8e31
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Huibin Hong [Thu, 19 Jan 2017 03:41:42 +0000 (11:41 +0800)]
fiq_debugger: do reboot_notifier for reset command
Change-Id: I31e0789e7a7ed8cd645d103abc20a21fc3140f36
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Mark Yao [Thu, 19 Jan 2017 06:19:00 +0000 (14:19 +0800)]
drm/rockchip: vop: fix iommu crash when resume
Iommu crash with that path:
vop_disable:
1, disable all windows and set vop config done
2, vop enter to standy, all windows not works, but their registers
are not clean, when you read window's enable bit, may found the
window is enable.
vop_enable:
1, memcpy(vop->regsbak, vop->regs, len)
save current vop registers to vop->regsbak, then you can found
window is enable on regsbak.
2, VOP_WIN_SET(vop, win, gate, 1);
force enable window gate, but gate and enable is on same
hardware register, the means window enable rewrite to vop hardware.
then:
when some on do vop_config_done but not reconfigure the bad
register window, iommu crash.
Do register configure before memcpy(vop->regsbak, vop->regs, len) is not
safe, after that would be save.
Change-Id: I55b7846b1d39901c6b357fe541c9af1729b2c6b9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Jacob Chen [Thu, 19 Jan 2017 05:51:50 +0000 (13:51 +0800)]
MALI: midgard: linux: remove default_config_mk
Change-Id: I82f0479f47d9db56553de65ca3ed0467c020f012
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 19 Jan 2017 03:48:22 +0000 (11:48 +0800)]
ARM: rockchip_linux_deconfig: make MIDGARD CONFIG back
Since commit "gpu: mali: allow midgard for linux build as a module",
we have move midgard config define from default.mk to defconfig.
Change-Id: Ia24f6bf8489404d52954ee72a83e66a168d97fc4
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 19 Jan 2017 03:48:15 +0000 (11:48 +0800)]
arm64: rockchip_linux_deconfig: make MIDGARD CONFIG back
Since commit "gpu: mali: allow midgard for linux build as a module",
we have move midgard config define from default.mk to defconfig.
Change-Id: Ic27a12a453af1c87b9a4ab6f79d8e0a989070ffb
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
ayaka [Mon, 16 Jan 2017 04:42:56 +0000 (12:42 +0800)]
gpu: mali: allow midgard for linux build as a module
In order to build a kernel for different platforms, the mali
module should be load at boot time.
Change-Id: I03144648cb3548c6916620bc73fdfa2b4dab98dd
Signed-off-by: ayaka <ayaka@soulik.info>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
ayaka [Mon, 16 Jan 2017 04:42:55 +0000 (12:42 +0800)]
mali: gpu: video: make the menu of midgard for linux visible
Although it is not allow to offer two config menu source at
the same time, but at lease we could tune some options of
it now.
Change-Id: I0b447876d13a0d5a95276cfe4600b6030f6b8529
Signed-off-by: ayaka <ayaka@soulik.info>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Jung Zhao [Tue, 10 Jan 2017 06:53:40 +0000 (14:53 +0800)]
video: rockchip: vcodec: fix reboot crash when playing
shutdown function need wait last irq finish and then continue
its work.
Change-Id: I12bed04f6eeac1f12eedf55a09699be49fb4ac35
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Jacob Chen [Wed, 18 Jan 2017 05:50:27 +0000 (13:50 +0800)]
clk: rk3288: correct cif_out to vip_out
we already have vip_src and sclk_vip_out defined, which are the clocks
we add as cif_out, so let's correct it.
Change-Id: I952b1490a882d290aa36d9629aeb32eee22ce8b3
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jianhong Chen [Fri, 6 Jan 2017 08:52:49 +0000 (16:52 +0800)]
mfd: rk808: add rk805 support
include sub modules: regulator, rtc, gpio, pwrkey
Change-Id: I19796e2a94764f95588d4b90bca1f3bc616f4f56
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
Randy Li [Thu, 29 Dec 2016 06:51:53 +0000 (14:51 +0800)]
ARM: dts: rockchip: add clocks for iommu in RK3288
As the commit "iommu/rockchip: Add pd/clk operation in iommu"
make iommu could operation clocks and power, this commit
would assign clocks to VPU, HEVC and VOP at rk3288.
Change-Id: I6a8f57e41e7db4f57200481e5a45dd24324c72f2
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Jacob Chen [Wed, 18 Jan 2017 07:45:08 +0000 (15:45 +0800)]
arm: dts: rk3288-evb add adc keys
Change-Id: I976f05f9152895c02d44c4eb741b5691d3539969
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Wed, 18 Jan 2017 05:51:35 +0000 (13:51 +0800)]
arm: rockchip_linux_defconfig: add CONFIG_KEYBOARD_ADC
Change-Id: I588fda6a6b5289c97cf149e61f0aeecbdc53d6fb
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Mark Yao [Wed, 18 Jan 2017 04:58:31 +0000 (12:58 +0800)]
drm/rockchip: logo: no need IOMMU_WRITE for logo
Change-Id: Id047a37db7ffa865403b99429e8cdbd37a588e59
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Wed, 18 Jan 2017 04:50:40 +0000 (12:50 +0800)]
drm/rockchip: logo: add iommu map size for logo buffer iommu mapping
Fix bug:
iova 0x0(logo buffer) unmap fail:
iommu: unaligned: iova 0x0 size 0xa5638 min_pagesz 0x1000
then cause iova 0x0 mmap fail:
iova: 0x0000000000000000 already mapped to 0x00000000f5c00000 cannot remap to phys: 0x00000000d6c6f000 prot: 0x3
Change-Id: I77443e9dba98aa6141aa44a42880b1cccc04043b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
zhangjun [Tue, 17 Jan 2017 07:53:40 +0000 (15:53 +0800)]
ASoC: codec cx2072x will only use mclk 12.288M
1. due to cx2072x only support playback samplerate 48K
2. set_clk_rate called from codec side will make the clock
tree correct, otherwise mclk will be closed from
i2s_runtime_suspend unexpected
Change-Id: Iaa748bb27635e21f7c2d2997823228cdf7308fe8
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
david.wu [Wed, 18 Jan 2017 03:56:36 +0000 (11:56 +0800)]
net: stmmac: dwmac-rk: Add rk3328 gmac support
Change-Id: I6d707c67c8edf809e47e1907765440088e162855
Signed-off-by: david.wu <david.wu@rock-chips.com>
david.wu [Wed, 18 Jan 2017 03:49:47 +0000 (11:49 +0800)]
PM / AVS: rockchip-io: Add rk3328 io-domains support
Change-Id: Ib99a22042cdc23367cd48a178b61b8744a8b3a57
Signed-off-by: david.wu <david.wu@rock-chips.com>
Huang Jiachai [Fri, 6 Jan 2017 07:28:15 +0000 (15:28 +0800)]
arm64: dts: rockchip: rk3399-android-next: fix color gradation
Change-Id: I482f10b9969d724472c188ec61d76fe6daaba84e
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Zhou weixin [Tue, 17 Jan 2017 11:05:51 +0000 (19:05 +0800)]
HID: hid-alps: fix touchpad data report error after the android restart
Change-Id: Id4204bc9b20ca257da65bcdec02eab8a6e398d02
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
Shunqing Chen [Tue, 17 Jan 2017 01:06:52 +0000 (09:06 +0800)]
ARM64: dts: rk3399-tve1205g: disable android charge
1. disable android charge
2. disable uboot charge brightness
Change-Id: Id9c4d7d2c9ef52ab319d009fe883595fc7181c0e
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Mark Yao [Tue, 17 Jan 2017 09:30:39 +0000 (17:30 +0800)]
drm/rockchip: gem: fixup iommu_map_sg error path
If iommu_map_sg is error, it's return value is zero, but
rockchip_gem_iommu_map feel the zero return value is success,
bug happen:
[ 5.227458] [drm:rockchip_gem_iommu_map] *ERROR* failed to map buffer: 0
[ 12.291590] WARNING: at drivers/gpu/drm/drm_mm.c:369
[ 12.291611] Modules linked in:
[ 12.291634]
[ 12.291658] CPU: 4 PID: 338 Comm: cameraserver Not tainted 4.4.41 #196
[ 12.291680] Hardware name: rockchip,rk3399-mid (DT)
[ 12.291703] task:
ffffffc0e5a23100 ti:
ffffffc0e5a64000 task.ti:
ffffffc0e5a64000
[ 12.291739] PC is at drm_mm_remove_node+0xc/0xf8
[ 12.291766] LR is at rockchip_gem_iommu_unmap+0x3c/0x54
[ 12.303799] [<
ffffff80084526e0>] drm_mm_remove_node+0xc/0xf8
[ 12.303827] [<
ffffff8008475430>] rockchip_gem_free_object+0x98/0x168
[ 12.303854] [<
ffffff8008449e80>] drm_gem_object_free+0x2c/0x34
[ 12.303878] [<
ffffff80084626c4>] drm_gem_dmabuf_release+0x90/0xa4
[ 12.303904] [<
ffffff80084ee73c>] dma_buf_release+0x64/0x15c
[ 12.303929] [<
ffffff80081aa8dc>] __fput+0xe0/0x1a4
[ 12.303950] [<
ffffff80081aa9f8>] ____fput+0xc/0x14
[ 12.303977] [<
ffffff80080b65ec>] task_work_run+0xa0/0xc0
[ 12.304004] [<
ffffff8008087f18>] do_notify_resume+0x40/0x54
[ 12.304026] [<
ffffff80080825e4>] work_pending+0x10/0x14
Change-Id: Id79c052691270553c1c60086f9926f39a5296354
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 15 Jan 2017 08:50:24 +0000 (16:50 +0800)]
drm/sysfs: add current display mode to sysfs
Change-Id: I2a1a699bac74d9fe71151ba1eb8e33e0683a48a5
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sat, 14 Jan 2017 07:31:01 +0000 (15:31 +0800)]
drm/sysfs: rename connector modes' name
Most drm display mode's name is "[hdisplay]x[vdisplay]", like "1440x900",
it's not a friendly name.
Change-Id: I64d2fd3b00cdfc28906b31815af7e857fc88461e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
wenping.zhang [Mon, 16 Jan 2017 03:44:23 +0000 (11:44 +0800)]
arm64: dts: rockchip: add adc key support for rk3399 linux project.
we use linux upstream adc key driver to support adc keyboard.
Change-Id: Id93a4ab3d58ff92ce0fc11b35abd4d4b8d3737e0
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
Shawn Lin [Mon, 16 Jan 2017 09:36:27 +0000 (17:36 +0800)]
arm64: dts: rockchip: replace clkreqn with cpm GPIO for rk3399-tve1205g
We should convert to use cpm mode instead of L1 substate.
Fix it anyway.
Change-Id: I5d997d53b2151ba9b1d29bd07272894a377c2eda
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Shawn Lin [Mon, 16 Jan 2017 09:35:16 +0000 (17:35 +0800)]
arm64: dts: rockchip: enable PCIe for rk3399-tve1205g
Change-Id: I8492ea9deb6ba517bcd7a8b4bf97494368904f67
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
wenping.zhang [Mon, 16 Jan 2017 03:42:22 +0000 (11:42 +0800)]
arm64: rockchip_linux_defconfig: add CONFIG_KEYBOARD_ADC for rk3399 linux project.
Change-Id: Ieb8c8bf311202119a31798a9a39883fc5e121f02
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
Jacob Chen [Fri, 13 Jan 2017 08:38:37 +0000 (16:38 +0800)]
ARM: rockchip_linux_defconfig: add some config for wifi AP function
Change-Id: I082b22858e0ded5055484ad0f1fdd04e23e01113
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
zzc [Fri, 13 Jan 2017 07:25:57 +0000 (15:25 +0800)]
arm64: rockchip_linux_defconfig: add some config for wifi AP function
Change-Id: I6884fb9335d3f035f3ea8f530dcb8422e96c73c2
Signed-off-by: zzc <zzc@rock-chips.com>
Meng Dongyang [Wed, 11 Jan 2017 02:46:24 +0000 (10:46 +0800)]
usb: dwc3: rockchip: add force dr_mode function
In current code, the mode of usb is control by extcon or
define in the dts. So in the case of none extcon, we can't
change the usb mode. This patch add a node in debug file
system for the application to change usb mode even if the
extcon is not exist. (P.S. The extcon property must not be
set and dr_mode must be otg if you want to use
rk_usb_force_mode.)
usage:
config host dr_mode:
echo host > sys/kernel/debug/usb@
fe800000/rk_usb_force_mode
config peripheral dr_mode:
echo peripheral > sys/kernel/debug/usb@
fe800000/rk_usb_force_mode
config otg dr_mode:
echo otg > sys/kernel/debug/usb@
fe800000/rk_usb_force_mode
Change-Id: I9cb3b14b7a365fe74e4aa253f0e3f680f45e0f9f
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Meng Dongyang [Wed, 11 Jan 2017 02:43:28 +0000 (10:43 +0800)]
phy: rockchip-inno-usb2: add u2phy set mode function
The usb controller may need to disconnect vbus to trigger disconnect
process or connect vbus to trigger connect interrupt by software. But
current code does not realize the interface. This patch add set mode
function in usb2 phy driver, connect vbus in device mode and disconnect
in other mode.
Change-Id: I49b4180af2f47156a3f4d31f4539f3e444f89a62
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Alexandre Belloni [Tue, 30 Aug 2016 02:57:06 +0000 (19:57 -0700)]
UPSTREAM: Input: add ADC resistor ladder driver
A common way of multiplexing buttons on a single input in cheap devices is
to use a resistor ladder on an ADC. This driver supports that configuration
by polling an ADC channel provided by IIO.
Change-Id: I110d95d7787a3ad42b5d4040d73b01efe2ca76e4
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
680772647d96ed853d20f837a2726151f24d8b20)
Laxman Dewangan [Wed, 6 Apr 2016 10:31:06 +0000 (16:01 +0530)]
UPSTREAM: iio: core: Add devm_ APIs for iio_channel_{get,release}
Some of kernel driver uses the IIO framework to get the sensor
value via ADC or IIO HW driver. The client driver get iio channel
by iio_channel_get() and release it by calling iio_channel_release().
Add resource managed version (devm_*) of these APIs so that if client
calls the devm_iio_channel_get() then it need not to release it explicitly,
it can be done by managed device framework when driver get un-binded.
This reduces the code in error path and also need of .remove callback in
some cases.
Change-Id: Ia00f42dab2f66aefa0b26523db849e75927003af
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
8bf872d8d261feefcdf67027522e3f717cad2bfe)
Huang, Tao [Fri, 13 Jan 2017 07:08:57 +0000 (15:08 +0800)]
arm64: rockchip_defconfig: Enable QUOTA related configs
af5c611fce52 ("ANDROID: android-base: Enable QUOTA related configs")
Change-Id: Ieb37babe6417ac7fe7abec696c28384b461ca1c2
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Fri, 13 Jan 2017 07:05:51 +0000 (15:05 +0800)]
arm64: rockchip_defconfig: disable AIO
3ff793f3db4d ("disable aio support in recommended configuration")
Change-Id: I13ec4505e7f51ccdf46bf828360a6fbf206c567d
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
wuliangqing [Thu, 12 Jan 2017 03:51:25 +0000 (11:51 +0800)]
ARM64: dts: rk3399: sapphire: type-c add vbus-5v-gpios ctrl
Change-Id: I5cc9ad7cf8710723708526f3fc95a1739dc8f78e
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
chenzhen [Thu, 12 Jan 2017 09:18:47 +0000 (17:18 +0800)]
Revert "MALI: rockchip: upgrade midgard DDK to r14p0-01rel0"
This reverts commit
d1637ff80953fd46692f923f3ee7b656fb917081.
Change-Id: Ib99bae99fe7246142bfa7369b8e79ebbfae1e736
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Shawn Lin [Fri, 13 Jan 2017 01:56:51 +0000 (09:56 +0800)]
FROMLIST: arm64: dts: rockchip: add aspm-no-l0s for rk3399
Per the discussion of bug fix[1], we now actually
leaves the default clock choice for pcie phy is
derived from 24MHz OSC to guarantee the least BER.
So let's add aspm-no-l0s here and folks could delete
this property from their dts.
Change-Id: I5ee57a2e27d3751f6541fdf059e6745c26d0a6ef
[1] https://patchwork.kernel.org/patch/
9470519/
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherr picked from https://patchwork.kernel.org/patch/
9477651/)
Shawn Lin [Thu, 12 Jan 2017 01:53:17 +0000 (09:53 +0800)]
UPSTREAM: PCI: rockchip: Disable RC's ASPM L0s based on DT "aspm-no-l0s"
Rockchip's RC produces a 100MHz reference clock but there are two
methods for the PHY to generate it:
(1) Use the system PLL to generate a 100MHz clock. The PHY will relock
it, filter signal noise, and output the reference clock. ASPM L0s
works correctly, but circuit noise issues make it difficult to pass
the TX compatibility test.
(2) Share the SoC's 24MHZ crystal oscillator with the PHY and force the
PHY's PLL to generate 100MHz internally. In this case, exit from
ASPM L0s sometimes fails due to a design error in the RC receiver
circuit. Even if we use extended-synch, the PHY sometimes fails to
relock the bits from FTS, which will hang the system.
We want the flexibility to use both clocking methods, so add a DT
property, "aspm-no-l0s". If that's present, disable L0s to avoid the
issues with case (2).
Change-Id: Iefbac055dc9d916815aace25f3558e0642e3522b
[bhelgaas: changelog]
Reported-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git
commit
afc9595ea4770f0157ae06fb3acedff703e169b6)
Shawn Lin [Fri, 13 Jan 2017 01:44:14 +0000 (09:44 +0800)]
Revert "UPSTREAM: PCI: rockchip: Add quirk to disable RC's ASPM L0s"
This reverts commit
6c71bcdab9b48258ab496218581d035afb65e0dd.
As it was dropped from pci-next and we have another rework there.
Change-Id: Icaf9d7a7fbdca5ab39b550dd0a5031fd0d3770d0
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Jacob Chen [Thu, 12 Jan 2017 03:09:48 +0000 (11:09 +0800)]
MALI: rockchip: linux: upgrade to DDK r13p0-00rel0
Since r9p0 can't recover form error "DATA_INVALID_FAULT",
we have to update to r13p0.
Change-Id: Iac820870159def15dd4c214d0d98f81f81480340
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Mark Yao [Thu, 12 Jan 2017 01:33:49 +0000 (09:33 +0800)]
drm/rockchip: vop: wait for completion with timeout
Wait for completion forever is very dangerous, make system
die is very bad.
Change-Id: Ib447b9bbf3564b5107b33edec331d4925241fc45
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Wed, 11 Jan 2017 09:30:10 +0000 (17:30 +0800)]
drm/rockchip: vop: fixup afbc flags on vop
Change-Id: Ia6ce813a1eb9f6aa1b9a76a0437e2cf11b1b403d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Tue, 20 Dec 2016 00:46:23 +0000 (08:46 +0800)]
drm/rockchip: mipi: move mode_set/commit to enable ops
enable/disable ops is more compatile to drm atomic framework.
fix mipi driver crash when resume:
[ 195.399833] PC is at drm_mode_vrefresh+0x0/0x78
[ 195.400249] LR is at dw_mipi_dsi_encoder_commit+0x2ec/0x424
[ 195.400749] pc : [<
ffffff800845ee7c>] lr : [<
ffffff800846f190>] pstate:
20000145
[ 195.529911] [<
ffffff800845ee7c>] drm_mode_vrefresh+0x0/0x78
[ 195.530421] [<
ffffff80084441e0>] drm_atomic_helper_commit_modeset_enables+0x168/0x190
[ 195.531126] [<
ffffff80084733b4>] rockchip_atomic_commit_complete+0x3c/0x14c
[ 195.531753] [<
ffffff8008473540>] rockchip_drm_atomic_commit+0x7c/0x9c
[ 195.532336] [<
ffffff8008467b60>] drm_atomic_commit+0x6c/0x84
[ 195.532849] [<
ffffff80084447fc>] drm_atomic_helper_connector_dpms+0xf4/0x154
[ 195.533481] [<
ffffff800845d21c>] drm_mode_obj_set_property_ioctl+0x148/0x204
[ 195.534113] [<
ffffff800845d318>] drm_mode_connector_property_set_ioctl+0x40/0x60
[ 195.534778] [<
ffffff800844dba4>] drm_ioctl+0x270/0x3fc
[ 195.535249] [<
ffffff80081b9180>] do_vfs_ioctl+0x4d0/0x5bc
[ 195.535739] [<
ffffff80081b92cc>] SyS_ioctl+0x60/0x88
[ 195.536194] [<
ffffff80080826f0>] el0_svc_naked+0x24/0x28
Change-Id: Ic80f364a4297e7318c3f0316dd4100737ad7ff6e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Wed, 11 Jan 2017 02:14:26 +0000 (10:14 +0800)]
drm/rockchip: vop: support overscan setting
Change-Id: I2213c7da45fd625d154a9bf11c79ec5608b06a0e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Jacob Chen [Mon, 9 Jan 2017 10:44:39 +0000 (18:44 +0800)]
mali: utgard: Fix build issue
The following statement doesn't have consistent behaviour on all machines.
Since the driver is in-tree, we can assume GPL compliance
Change-Id: I5d993ba8f1b4002a1bcd20b8ac40f442269897a8
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Tue, 10 Jan 2017 08:20:53 +0000 (16:20 +0800)]
ARM: rockchip: clean folder
Change-Id: I5ab0d917dc79976a944b380ca3a77d823b6cae98
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 12 Jan 2017 01:18:12 +0000 (09:18 +0800)]
ARM: dts: rockchip: sort rk3288 dts by base adress
Change-Id: Ibfd497cd8a2dbdbfe4ccb6a35501451926e4fe7e
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Wed, 11 Jan 2017 06:45:57 +0000 (14:45 +0800)]
ARM: dts: rockchip: add ddr related node for rk3288
Add dmc,sram,noc nodes which are used for ddr function
Change-Id: I5798f7a2c444adf6940b44fe0cdadca8655e534e
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Tue, 10 Jan 2017 07:14:32 +0000 (15:14 +0800)]
ARM: rockchip: Convert resume code to C
This CL introduces the concept of "embedded blobs" for Rockchip, which
allows you to compile some C code into a binary blob that is linked
into the kernel. This binary blob is self contained and is intended
to run in cases where SDRAM (and thus the rest of Linux) isn't
available. Resume is a prime candiate for this as is the planned
DDRFreq code.
We convert the existing assembly resume code into C as proof that this
works and to prepare for linking in SDRAM reinit code.
Change-Id: I0ff109766cfd4b25bf65de9258631a07d2ebe1d5
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Wed, 11 Jan 2017 06:42:19 +0000 (14:42 +0800)]
rockchip: pm: add deep sleep support for rk3288
This adds deep sleep support for rk3288 suspend & resume
It can suspend by "echo 1 > /sys/module/pm/parameters/deep_sleep &&
echo mem > /sys/power/state", and resume by power
Change-Id: Iff55f17dc74e27e37db8c8417a08d931f2767afe
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Wed, 11 Jan 2017 05:32:47 +0000 (13:32 +0800)]
arm: dts: rockchip: increase vdd log for rk3288-evb-act8846
1v is too low for ddr 533, gpu 600
Change-Id: I7dc4744b578573dd772803bc4f772f6a8ed0a133
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
xubilv [Tue, 10 Jan 2017 07:01:49 +0000 (15:01 +0800)]
video: rockchip: edp: Solve the bug of asymmetric pd enable and disable
Change-Id: I626210fc3e63c076e402563393a388cbd25fdd74
Signed-off-by: xubilv <xbl@rock-chips.com>
Randy Li [Sat, 24 Sep 2016 18:50:17 +0000 (02:50 +0800)]
UPSTREAM: phy: Add reset callback for not generic phy
I forget to add a dummy function in case the CONFIG_GENERIC_PHY
is disabled.
Change-Id: Ic324387058ef260473fd4ad20ed43eff79044dfe
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from
98430c7aad6a3fdedcc78a0d6780dabb6580dc38)
wjh [Wed, 11 Jan 2017 08:01:20 +0000 (16:01 +0800)]
HID: hid-rkvr: update TP input events
Change-Id: I9c72693ff6db1beccc4ed79fc01b33616fd8931d
Signed-off-by: wjh <wjh@rock-chips.com>
sean.huang [Tue, 10 Jan 2017 04:48:20 +0000 (12:48 +0800)]
OP-TEE: update optee_linuxdriver to match updated optee_os & optee_client
Match the optee_os version 1.5 or later.
Main update features:
1.Support 32-bit client working with 64-bit linux kernel.
2.Fix Shared Memory protection.
3.Add mutex to serialize tee-supplicant request.
4.Revert "rename tee-supplicant to tee_supplicant".
cherry-pick from 3.10
commit id:
5f6467dc09e8c00f7fa6a621b3aad7046ae84d48
Change-Id: I5c77ed85aa56e36d346be7c4462c5a15120df439
Signed-off-by: sean.huang <sean.huang@rock-chips.com>
Shawn Lin [Tue, 10 Jan 2017 07:59:26 +0000 (15:59 +0800)]
arm64: dts: rockchip: clean up emmc_phy
freq-sel, dr-sel and opdelay are obsolete now, so we
should remove them from the DT files to prevent the
spread of unused code.
Change-Id: Ibfa4fa225231a004913aa31aac475eb252e329c6
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Shawn Lin [Tue, 10 Jan 2017 07:55:35 +0000 (15:55 +0800)]
arm64: dts: rockchip: replace clkreqn with new cpm GPIO for rk3399-evb
We should convert to use cpm mode instead of L1 substate.
Fix it anyway.
Change-Id: I50fd43a1b15df6b8dc617783a1525ba0579b6a92
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Shawn Lin [Tue, 10 Jan 2017 07:47:54 +0000 (15:47 +0800)]
arm64: dts: rockchip: add pcie clkreq for cpm mode in rk3399.dtsi
Since we don't support L1 substate due to the errata of TRM,
let's instead add cpm mode if possible. Note that in cpm mode,
clkreq should be a GPIO and the EP will take over the ownship
of it and de-assert it when exiting from the low power mode.
Change-Id: I4d5542289c0118ba8702ad6b2783e6fad64828a1
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Frank Wang [Thu, 5 Jan 2017 06:44:16 +0000 (14:44 +0800)]
arm64: configs: rockchip_linux: enable usb-otg related config
This adds select below config for usb-otg:
CONFIG_USB_DWC2_DUAL_ROLE
CONFIG_USB_GADGET_DEBUG_FILES
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_CONFIGFS_UEVENT
Change-Id: Ic4765eb59e187dbf4e20d26a76722a309021122c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>