David Majnemer [Fri, 26 Jun 2015 18:55:48 +0000 (18:55 +0000)]
Revert "Revert r240762 "[X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant""
This reverts commit r240793 while fixing how we handle array constant
pool entries.
This fixes PR23966.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240811
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Rafael Espindola [Fri, 26 Jun 2015 18:42:17 +0000 (18:42 +0000)]
Fix error handling in getString and simplify callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240810
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Pete Cooper [Fri, 26 Jun 2015 18:41:54 +0000 (18:41 +0000)]
Convert a bunch of loops to foreach. NFC.
This uses the new SDNode::op_values() iterator range committed in r240805.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240809
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Rafael Espindola [Fri, 26 Jun 2015 18:32:53 +0000 (18:32 +0000)]
Delete dead code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240807
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Pete Cooper [Fri, 26 Jun 2015 18:17:36 +0000 (18:17 +0000)]
Add op_values() to iterate over the SDValue operands of an SDNode.
SDNode already had ops() which would iterate over the operands and return
SDUse*. This version instead gets the SDValue's out of the SDUse's so that
we can use foreach in more places.
Reviewed by David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240805
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David Blaikie [Fri, 26 Jun 2015 18:02:52 +0000 (18:02 +0000)]
Move VectorUtils from Transforms to Analysis to correct layering violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240804
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Javed Absar [Fri, 26 Jun 2015 17:42:37 +0000 (17:42 +0000)]
[ARM] Cortex-R5 is not VFPOnlySP
This patch fixes the error in ARM.td which stated that Cortex-R5
floating point unit can do only single precision, when it can do double as well.
Reviewers: rengolin
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240799
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Adam Nemet [Fri, 26 Jun 2015 17:25:43 +0000 (17:25 +0000)]
[LAA] Try to prove non-wrapping of pointers if SCEV cannot
Summary:
Scalar evolution does not propagate the non-wrapping flags to values
that are derived from a non-wrapping induction variable because
the non-wrapping property could be flow-sensitive.
This change is a first attempt to establish the non-wrapping property in
some simple cases. The main idea is to look through the operations
defining the pointer. As long as we arrive to a non-wrapping AddRec via
a small chain of non-wrapping instruction, the pointer should not wrap
either.
I believe that this essentially is what Andy described in
http://article.gmane.org/gmane.comp.compilers.llvm.cvs/220731 as the way
forward.
Reviewers: aschwaighofer, nadav, sanjoy, atrick
Reviewed By: atrick
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240798
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Alex Lorenz [Fri, 26 Jun 2015 17:07:27 +0000 (17:07 +0000)]
Fix unused variable from r240792.
The variable 'I' wasn't used when assertions were disabled.
This commit ensures that 'I' is used outside of an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240797
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Benjamin Kramer [Fri, 26 Jun 2015 16:59:31 +0000 (16:59 +0000)]
[DAGCombine] Fix demanded bits computation for exact shifts.
Fixes a miscompilation of MultiSource/Benchmarks/MallocBench/gs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240796
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Douglas Katzman [Fri, 26 Jun 2015 16:58:59 +0000 (16:58 +0000)]
[X86]: Correctly sign-extend 16-bit immediate in CALL instruction.
Patch by Matthew Barney. Thanks!
Differential Revision: http://reviews.llvm.org/D9514
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240795
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David Blaikie [Fri, 26 Jun 2015 16:57:30 +0000 (16:57 +0000)]
Fix ODR violation waiting to happen by making static function definitions in VectorUtils.h non-static and defined out of line
Patch by Ashutosh Nema
Differential Revision: http://reviews.llvm.org/D10682
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240794
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Hans Wennborg [Fri, 26 Jun 2015 16:48:02 +0000 (16:48 +0000)]
Revert r240762 "[X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant"
It seems to have caused PR23966: "UNREACHABLE executed at ..\lib\Target\X86\X86TargetObjectFile.cpp:148"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240793
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Alex Lorenz [Fri, 26 Jun 2015 16:46:11 +0000 (16:46 +0000)]
MIR Serialization: Serialize machine basic block operands.
This commit serializes machine basic block operands. The
machine basic block operands use the following syntax:
%bb.<id>[.<name>]
This commit also modifies the YAML representation for the
machine basic blocks - a new, required field 'id' is added
to the MBB YAML mapping.
The id is used to resolve the MBB references to the
actual MBBs. And while the name of the MBB can be
included in a MBB reference, this name isn't used to
resolve MBB references - as it's possible that multiple
MBBs will reference the same BB and thus they will have the
same name. If the name is specified, the parser will verify
that it is equal to the name of the MBB with the specified id.
Reviewers: Duncan P. N. Exon Smith
Differential Revision: http://reviews.llvm.org/D10608
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240792
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Rafael Espindola [Fri, 26 Jun 2015 15:27:04 +0000 (15:27 +0000)]
ELF: Simplify the rel/rela implementation.
Now the rela class inherits from rel and just adds the addend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240790
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Benjamin Kramer [Fri, 26 Jun 2015 14:51:49 +0000 (14:51 +0000)]
[DAGCombiner] Preserve the exact bit when simplifying SRA to SRL.
Allows more aggressive folding of ashr/shl pairs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240788
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Benjamin Kramer [Fri, 26 Jun 2015 14:51:36 +0000 (14:51 +0000)]
[DAGCombine] fold (X >>?,exact C1) << C2 --> X << (C2-C1)
Instcombine also does this but many opportunities only become visible
after GEPs are lowered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240787
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Aaron Ballman [Fri, 26 Jun 2015 14:51:22 +0000 (14:51 +0000)]
Silencing spurious MSVC C4189 warnings regarding local variables that are initialized but not used; NFC. This bug has been reported to Microsoft (https://connect.microsoft.com/VisualStudio/feedback/details/
1475983).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240786
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Rafael Espindola [Fri, 26 Jun 2015 14:51:16 +0000 (14:51 +0000)]
Rename getObjectFile to getObject for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240785
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Rafael Espindola [Fri, 26 Jun 2015 14:11:54 +0000 (14:11 +0000)]
Simplify isSymbolList64Bit. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240784
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Rafael Espindola [Fri, 26 Jun 2015 13:24:23 +0000 (13:24 +0000)]
Simplify isObject. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240783
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Toma Tabacu [Fri, 26 Jun 2015 13:20:17 +0000 (13:20 +0000)]
[mips] [IAS] Add partial support for the ULW pseudo-instruction.
Summary:
This only adds support for ULW of an immediate address with/without a source register.
It does not include support for ULW of the address of a symbol.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D9663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240782
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Rafael Espindola [Fri, 26 Jun 2015 13:11:15 +0000 (13:11 +0000)]
Implement elf_section_iterator and getELFType().
And with those, simplify getSymbolNMTypeChar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240780
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Rafael Espindola [Fri, 26 Jun 2015 12:44:10 +0000 (12:44 +0000)]
Expose getFlags via ELFSectionRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240779
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Rafael Espindola [Fri, 26 Jun 2015 12:33:37 +0000 (12:33 +0000)]
Add a ELFSectionRef class and use it to expose getSectionType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240778
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Rafael Espindola [Fri, 26 Jun 2015 12:18:49 +0000 (12:18 +0000)]
Simplify getSymbolType.
This is still a really odd function. Most calls are in object format specific
contexts and should probably be replaced with a more direct query, but at least
now this is not too obnoxious to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240777
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Javed Absar [Fri, 26 Jun 2015 12:14:56 +0000 (12:14 +0000)]
[ARM] Cortex-R4F is not VFPOnlySP
Cortex-R4F TRM states that fpu supports both single and double precision.
This patch corrects the information in ARM.td file and corresponding test.
Reviewers: rengolin
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240776
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Rafael Espindola [Fri, 26 Jun 2015 11:39:57 +0000 (11:39 +0000)]
Make getOther ELF only.
No other format has this field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240774
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Rafael Espindola [Fri, 26 Jun 2015 11:31:13 +0000 (11:31 +0000)]
Optimize the creation of mapping symbols.
No need to create two symbols just to assign one to the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240773
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Sergey Dmitrouk [Fri, 26 Jun 2015 10:13:56 +0000 (10:13 +0000)]
Do not ignore projects/LLVMBuild.txt in git repo
Without explicit exception for the path, it matches projects/* rule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240771
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David Majnemer [Fri, 26 Jun 2015 07:03:12 +0000 (07:03 +0000)]
[X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant
No functionality changed, just keeping things clean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240762
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Hao Liu [Fri, 26 Jun 2015 04:38:21 +0000 (04:38 +0000)]
[InterleavedAccess] Fix failures "undefined type 'llvm::raw_ostream'" on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240760
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Hao Liu [Fri, 26 Jun 2015 02:45:36 +0000 (02:45 +0000)]
[ARM] Lower interleaved memory accesses to vldN/vstN intrinsics.
This patch also adds a function to calculate the cost of interleaved memory accesses.
E.g. Lower an interleaved load:
%wide.vec = load <8 x i32>, <8 x i32>* %ptr, align 4
%v0 = shuffle %wide.vec, undef, <0, 2, 4, 6>
%v1 = shuffle %wide.vec, undef, <1, 3, 5, 7>
into:
%vld2 = { <4 x i32>, <4 x i32> } call llvm.arm.neon.vld2(%ptr, 4)
%vec0 = extractelement { <4 x i32>, <4 x i32> } %vld2, i32 0
%vec1 = extractelement { <4 x i32>, <4 x i32> } %vld2, i32 1
E.g. Lower an interleaved store:
%i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
store <12 x i32> %i.vec, <12 x i32>* %ptr, align 4
into:
%sub.v0 = shuffle <8 x i32> %v0, <8 x i32> v1, <0, 1, 2, 3>
%sub.v1 = shuffle <8 x i32> %v0, <8 x i32> v1, <4, 5, 6, 7>
%sub.v2 = shuffle <8 x i32> %v0, <8 x i32> v1, <8, 9, 10, 11>
call void llvm.arm.neon.vst3(%ptr, %sub.v0, %sub.v1, %sub.v2, 4)
Differential Revision: http://reviews.llvm.org/D10533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240755
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Hao Liu [Fri, 26 Jun 2015 02:32:07 +0000 (02:32 +0000)]
[AArch64] Lower interleaved memory accesses to ldN/stN intrinsics. This patch also adds a function to calculate the cost of interleaved memory accesses.
E.g. Lower an interleaved load:
%wide.vec = load <8 x i32>, <8 x i32>* %ptr
%v0 = shuffle %wide.vec, undef, <0, 2, 4, 6>
%v1 = shuffle %wide.vec, undef, <1, 3, 5, 7>
into:
%ld2 = { <4 x i32>, <4 x i32> } call llvm.aarch64.neon.ld2(%ptr)
%vec0 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 0
%vec1 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 1
E.g. Lower an interleaved store:
%i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
store <12 x i32> %i.vec, <12 x i32>* %ptr
into:
%sub.v0 = shuffle <8 x i32> %v0, <8 x i32> v1, <0, 1, 2, 3>
%sub.v1 = shuffle <8 x i32> %v0, <8 x i32> v1, <4, 5, 6, 7>
%sub.v2 = shuffle <8 x i32> %v0, <8 x i32> v1, <8, 9, 10, 11>
call void llvm.aarch64.neon.st3(%sub.v0, %sub.v1, %sub.v2, %ptr)
Differential Revision: http://reviews.llvm.org/D10533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240754
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Hao Liu [Fri, 26 Jun 2015 02:10:27 +0000 (02:10 +0000)]
[InterleavedAccess] Add a pass InterleavedAccess to identify interleaved memory accesses and transform into target specific intrinsics.
E.g. An interleaved load (Factor = 2):
%wide.vec = load <8 x i32>, <8 x i32>* %ptr
%v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6>
%v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7>
It can be transformed into a ld2 intrinsic in AArch64 backend or a vld2 intrinsic in ARM backend.
E.g. An interleaved store (Factor = 3):
%i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
store <12 x i32> %i.vec, <12 x i32>* %ptr
It can be transformed into a st3 intrinsic in AArch64 backend or a vst3 intrinsic in ARM backend.
Differential Revision: http://reviews.llvm.org/D10533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240751
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Duncan P. N. Exon Smith [Fri, 26 Jun 2015 00:53:44 +0000 (00:53 +0000)]
AsmPrinter: More explicitly scope iterator for MSVC
r240748 seems to be on the right path. Be more explicit.
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/1961/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240750
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Duncan P. N. Exon Smith [Fri, 26 Jun 2015 00:41:53 +0000 (00:41 +0000)]
AsmPrinter: Explicitly scope iterator for MSVC
Try to placate bots by explicitly scoping a conversion constructor from
`iterator` to `const_iterator`.
http://lab.llvm.org:8011/builders/sanitizer-windows/builds/5931/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240748
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Matthias Braun [Fri, 26 Jun 2015 00:26:49 +0000 (00:26 +0000)]
Revert "X86: Reject register operands with obvious type mismatches."
Revert until http://llvm.org/PR23955 is investigated.
This reverts commit r239309.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240746
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Matthias Braun [Fri, 26 Jun 2015 00:26:46 +0000 (00:26 +0000)]
Fix mismatched architectures in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240745
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Matthias Braun [Fri, 26 Jun 2015 00:26:44 +0000 (00:26 +0000)]
aad/fix labels in test/CodeGen/X86/StackColoring.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240744
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Alexey Samsonov [Fri, 26 Jun 2015 00:00:47 +0000 (00:00 +0000)]
[ASan] Use llvm::getDISubprogram() to get function entry debug location.
It can be more robust than copying debug info from first non-alloca
instruction in the entry basic block. We use the same strategy in
coverage instrumentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240738
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Duncan P. N. Exon Smith [Thu, 25 Jun 2015 23:52:10 +0000 (23:52 +0000)]
AsmPrinter: Use an intrusively linked list for DIE::Children
Replace the `std::vector<>` for `DIE::Children` with an intrusively
linked list. This is a strict memory improvement: it requires no
auxiliary storage, and reduces `sizeof(DIE)` by one pointer. It also
factors out the DIE-related malloc traffic.
This drops llc memory usage from 735 MB down to 718 MB, or ~2.3%.
(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240736
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Duncan P. N. Exon Smith [Thu, 25 Jun 2015 23:46:41 +0000 (23:46 +0000)]
AsmPrinter: Convert DIE::Values to a linked list
Change `DIE::Values` to a singly linked list, where each node is
allocated on a `BumpPtrAllocator`. In order to support `push_back()`,
the list is circular, and points at the tail element instead of the
head. I abstracted the core list logic out to `IntrusiveBackList` so
that it can be reused for `DIE::Children`, which also cares about
`push_back()`.
This drops llc memory usage from 799 MB down to 735 MB, about 8%.
(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240733
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Michael J. Spencer [Thu, 25 Jun 2015 23:41:23 +0000 (23:41 +0000)]
[ELF] Move ELF{32,64}{L,B}E typedefs to llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240731
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Michael J. Spencer [Thu, 25 Jun 2015 23:40:41 +0000 (23:40 +0000)]
[ELF] Add some accessors for lld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240730
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Alexey Samsonov [Thu, 25 Jun 2015 23:40:15 +0000 (23:40 +0000)]
Make llvm-dwarfdump exit with non-zero exit code if error was occured.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240729
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NAKAMURA Takumi [Thu, 25 Jun 2015 23:38:44 +0000 (23:38 +0000)]
PPCISelLowering.cpp: Appease PR23956. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240727
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Adrian Prantl [Thu, 25 Jun 2015 23:38:22 +0000 (23:38 +0000)]
Split test up into two target-spcific directories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240726
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Anna Zaks [Thu, 25 Jun 2015 23:35:48 +0000 (23:35 +0000)]
[asan] Do not instrument special purpose LLVM sections.
Do not instrument globals that are placed in sections containing "__llvm"
in their name.
This fixes a bug in ASan / PGO interoperability. ASan interferes with LLVM's
PGO, which places its globals into a special section, which is memcpy-ed by
the linker as a whole. When those goals are instrumented, ASan's memcpy wrapper
reports an issue.
http://reviews.llvm.org/D10541
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240723
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Anna Zaks [Thu, 25 Jun 2015 23:35:45 +0000 (23:35 +0000)]
[asan] Don't run stack malloc on functions containing inline assembly.
It makes LLVM run out of registers even on 64-bit platforms. For example, the
following test case fails on darwin.
clang -cc1 -O0 -triple x86_64-apple-macosx10.10.0 -emit-obj -fsanitize=address -mstackrealign -o ~/tmp/ex.o -x c ex.c
error: inline assembly requires more registers than available
void TestInlineAssembly(const unsigned char *S, unsigned int pS, unsigned char *D, unsigned int pD, unsigned int h) {
unsigned int sr = 4, pDiffD = pD - 5;
unsigned int pDiffS = (pS << 1) - 5;
char flagSA = ((pS & 15) == 0),
flagDA = ((pD & 15) == 0);
asm volatile (
"mov %0, %%"PTR_REG("si")"\n"
"mov %2, %%"PTR_REG("cx")"\n"
"mov %1, %%"PTR_REG("di")"\n"
"mov %8, %%"PTR_REG("ax")"\n"
:
: "m" (S), "m" (D), "m" (pS), "m" (pDiffS), "m" (pDiffD), "m" (sr), "m" (flagSA), "m" (flagDA), "m" (h)
: "%"PTR_REG("si"), "%"PTR_REG("di"), "%"PTR_REG("ax"), "%"PTR_REG("cx"), "%"PTR_REG("dx"), "memory"
);
}
http://reviews.llvm.org/D10719
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240722
91177308-0d34-0410-b5e6-
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Adrian Prantl [Thu, 25 Jun 2015 23:19:19 +0000 (23:19 +0000)]
Debug Info: Add basic test coverage for the DWARF encoding of bitfields.
While looking at a couple of bugs in the debug info output for bitfields
I noticed that there wasn't a single regression test to test my changes
against, so here's a start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240717
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Thu, 25 Jun 2015 22:15:05 +0000 (22:15 +0000)]
DAGCombiner: Use pop_back_val()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240709
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Jun 2015 22:10:04 +0000 (22:10 +0000)]
Add an ELFSymbolRef type.
This allows user code to say Sym.getSize() instead of having to manually fetch
the object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240708
91177308-0d34-0410-b5e6-
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Frederic Riss [Thu, 25 Jun 2015 21:57:33 +0000 (21:57 +0000)]
IAS: Use the root macro instanciation for location
r224810 fixed the handling of macro debug locations in AsmParser. This patch
fixes the logic to actually do what was intended: it uses the first macro of
the macro stack instead of the last one. The updated testcase shows that the
current scheme doesn't work when macro instanciations are nested and multiple
files are used.
Reviewers: compnerd
Differential Revision: http://reviews.llvm.org/D10463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240705
91177308-0d34-0410-b5e6-
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Michael J. Spencer [Thu, 25 Jun 2015 21:47:32 +0000 (21:47 +0000)]
[Object][ELF] Add support for dumping dynamic relocations when sections are stripped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240703
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Thu, 25 Jun 2015 21:42:46 +0000 (21:42 +0000)]
dsymutil: Split out patchStmtList(), NFC
Split out code to patch up the `DW_AT_stmt_list` for the cloned DIE, and
reorganize it so that it doesn't depend on `DIE::values_begin()` and
`DIE::values_end()` (which I'm trying to kill off).
David Blaikie and I talked about adding a range-algorithm version of
`std::find_if()`, but the assertion *still* required getting at the end
iterator. IMO, a separate helper function with an early return is
easier to reason about here.
A follow-up commit that removes `DIE::setValue()` and mutates the
`DIEValue` directly is coming shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240701
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 25 Jun 2015 21:11:08 +0000 (21:11 +0000)]
fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240699
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Jun 2015 21:00:51 +0000 (21:00 +0000)]
llvm-nm: Don't print mapping symbols.
This matches the behavior of gnu nm. Fixes pr23930.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240695
91177308-0d34-0410-b5e6-
96231b3b80d8
Pete Cooper [Thu, 25 Jun 2015 20:51:38 +0000 (20:51 +0000)]
Use foreach loop over constant operands. NFC.
A number of places had explicit loops over Constant::operands().
Just use foreach loops where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240694
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 25 Jun 2015 20:20:19 +0000 (20:20 +0000)]
We don't need the targets to read objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240684
91177308-0d34-0410-b5e6-
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Jingyue Wu [Thu, 25 Jun 2015 20:14:47 +0000 (20:14 +0000)]
[InstCombine] call SimplifyICmpInst with correct context
Summary:
Fixes PR23809. Without passing the context to SimplifyICmpInst, we would
use the assume to prove that the condition feeding the assume is
trivially true (see isValidAssumeForContext in ValueTracking.cpp),
causing the removal of the assume which may be useful for later
optimizations.
Test Plan: pr23800.ll
Reviewers: hfinkel, majnemer
Reviewed By: hfinkel
Subscribers: henryhu, llvm-commits, wengxt, broune, meheff, eliben
Differential Revision: http://reviews.llvm.org/D10695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240683
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 25 Jun 2015 20:10:45 +0000 (20:10 +0000)]
Diagnose undefined temporary symbols.
We already disallowed
.global .Lfoo
so this is reasonable.
This is a small cherry pick from r240130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240681
91177308-0d34-0410-b5e6-
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Paul Robinson [Thu, 25 Jun 2015 19:37:13 +0000 (19:37 +0000)]
Make this test verify .debug_pubnames is actually missing.
It was matching at EOF regardless of whether the section was present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240679
91177308-0d34-0410-b5e6-
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Yaron Keren [Thu, 25 Jun 2015 19:28:24 +0000 (19:28 +0000)]
Rangify for loop in Inliner.cpp. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240678
91177308-0d34-0410-b5e6-
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Douglas Katzman [Thu, 25 Jun 2015 18:48:26 +0000 (18:48 +0000)]
Add Arg::getValues method with const 'this' and const result
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240673
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 25 Jun 2015 18:47:02 +0000 (18:47 +0000)]
DAGCombiner: Remove redundant check
MemIntrinsicSDNode is already a subclass of MemSDNode,
so the MemSDNode check is sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240672
91177308-0d34-0410-b5e6-
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Peter Collingbourne [Thu, 25 Jun 2015 18:32:02 +0000 (18:32 +0000)]
GVN: If a branch has two identical successors, we cannot declare either dead.
This previously caused miscompilations as a result of phi nodes receiving
undef incoming values from blocks dominated by such successors.
Differential Revision: http://reviews.llvm.org/D10726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240670
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 25 Jun 2015 16:16:08 +0000 (16:16 +0000)]
Add a test for a recent regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240656
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 25 Jun 2015 16:01:53 +0000 (16:01 +0000)]
llvm-nm: print 'n' instead of '?'
This matches gnu nm and has the advantage that there is a upper case N.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240655
91177308-0d34-0410-b5e6-
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Kit Barton [Thu, 25 Jun 2015 15:17:40 +0000 (15:17 +0000)]
[PPC] Implement vmrgew and vmrgow instructions
This patch adds support for the vector merge even word and vector merge odd word
instructions introduced in POWER8.
Phabricator review: http://reviews.llvm.org/D10704
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240650
91177308-0d34-0410-b5e6-
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Bruno Cardoso Lopes [Thu, 25 Jun 2015 15:17:23 +0000 (15:17 +0000)]
[AsmPrinter] Fix crash in handleIndirectSymViaGOTPCRel
Check for symbols in MCValue before using them. Bail out early in case
they are null. This fixes PR23779.
Differential Revision: http://reviews.llvm.org/D10712
rdar://problem/
21532830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240649
91177308-0d34-0410-b5e6-
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Jonathan Roelofs [Thu, 25 Jun 2015 15:06:47 +0000 (15:06 +0000)]
Doxygen-ify a few comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240647
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 25 Jun 2015 15:06:38 +0000 (15:06 +0000)]
Use computeSymbolSizes in llvm-symbolize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240646
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 25 Jun 2015 15:00:38 +0000 (15:00 +0000)]
Use range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240645
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 25 Jun 2015 14:39:35 +0000 (14:39 +0000)]
Modernize getELFDynamicSymbolIterators.
* Have it return a iterator_range.
* Remove the global function.
* Rename to getDynamicSymbolIterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240644
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 25 Jun 2015 13:47:36 +0000 (13:47 +0000)]
Don't use std::make_unique.
We still have to support C++11 standard libraries, make_unique is a C++14
feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240642
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 25 Jun 2015 13:39:03 +0000 (13:39 +0000)]
[PPC] Replace debug value skipping with getLastNonDebugInstr.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240641
91177308-0d34-0410-b5e6-
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Joseph Tremoulet [Thu, 25 Jun 2015 13:35:22 +0000 (13:35 +0000)]
[ORC] Add ObjectTransformLayer
Summary:
This is a utility for clients that want to insert a layer that modifies
each ObjectFile and then passes it along to the next layer.
Reviewers: lhames
Reviewed By: lhames
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10456
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240640
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 25 Jun 2015 13:28:24 +0000 (13:28 +0000)]
Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240639
91177308-0d34-0410-b5e6-
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Toma Tabacu [Thu, 25 Jun 2015 12:44:38 +0000 (12:44 +0000)]
[mips] [IAS] Refactor the emitDirectiveModuleFP() functions. NFC.
Summary:
Simplify emitDirectiveModuleFP() by having it just print the current information
from MipsABIFlagsSection and doing an updateABIInfo() before such calls.
This prevents us from forgetting to update the STI.FeatureBits,
because updateABIInfo() uses those to update the MipsABIFlagsSection object,
and also makes sure we use the update mechanism from MipsABIFlagsSection.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits, mpf
Differential Revision: http://reviews.llvm.org/D10642
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240637
91177308-0d34-0410-b5e6-
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Artur Pilipenko [Thu, 25 Jun 2015 12:18:43 +0000 (12:18 +0000)]
Take alignment into account in isSafeToLoadUnconditionally
Reviewed By: hfinkel
Differential Revision: http://reviews.llvm.org/D10475
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240636
91177308-0d34-0410-b5e6-
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Ulrich Weigand [Thu, 25 Jun 2015 11:52:36 +0000 (11:52 +0000)]
[SystemZ] Only attempt RxSBG optimization for integer types
As pointed out by Justin Bogner (see r240520), SystemZDAGToDAGISel::Select
currently attempts to convert boolean operations into RxSBG even on some
non-integer types (in particular, vector types). This would not work in
any case, and it happened to trigger undefined behaviour in allOnes.
This patch verifies that we have a (<= 64-bit) integer type before
attempting to perform this optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240634
91177308-0d34-0410-b5e6-
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Toma Tabacu [Thu, 25 Jun 2015 10:56:57 +0000 (10:56 +0000)]
[mips] [IAS] Refactor the emitDirectiveModuleOddSPReg() functions. NFC.
Summary:
We can simplify emitDirectiveModuleOddSPReg() by having it print the current OddSPReg information
from MipsABIFlagsSection and doing an updateABIInfo() before such calls.
This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object,
and also makes sure we use the update mechanism from MipsABIFlagsSection.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits, mpf
Differential Revision: http://reviews.llvm.org/D10641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240630
91177308-0d34-0410-b5e6-
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Pawel Bylica [Thu, 25 Jun 2015 10:47:08 +0000 (10:47 +0000)]
Add missing <array> include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240629
91177308-0d34-0410-b5e6-
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Jay Foad [Thu, 25 Jun 2015 10:34:29 +0000 (10:34 +0000)]
Teach LLVM about the PPC64 memory sanitizer implementation.
Summary:
This is the LLVM part of the PPC memory sanitizer implementation in
D10648.
Reviewers: kcc, samsonov, willschm, wschmidt, eugenis
Reviewed By: eugenis
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240627
91177308-0d34-0410-b5e6-
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Pawel Bylica [Thu, 25 Jun 2015 10:23:52 +0000 (10:23 +0000)]
Express APInt::{s,u}{l,g}e(uint64_t) in terms of APInt::{s,u}{l,g}t(uint64_t). NFC.
This is preparation for http://reviews.llvm.org/D10655: Change APInt comparison with uint64_t.
Some unit tests added also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240626
91177308-0d34-0410-b5e6-
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Toma Tabacu [Thu, 25 Jun 2015 09:52:02 +0000 (09:52 +0000)]
[mips] [IAS] Fix parsing of memory offset expressions with parenthesis depth >1.
Summary:
In an expression such as "(((a+b)+c)+d)", parseParenExpression() would only parse the "a+b)+c", which would result in an error later on in the parser.
This means that we can only parse one level of inner parentheses.
In order to fix this, I added a new function called parseParenExprOfDepth(), which parses a specified number of trailing parenthesis expressions
(except for the outermost parenthesis), and changed MipsAsmParser to use it in parseMemOffset instead of parseParenExpression().
Reviewers: dsanders, rafael
Reviewed By: dsanders, rafael
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D9742
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240625
91177308-0d34-0410-b5e6-
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Ahmed Bougacha [Thu, 25 Jun 2015 00:44:46 +0000 (00:44 +0000)]
[X86] Accept hasAVX512() as well as hasFMA() when generating FMA.
We don't always have FMA, for example when using 'clang -mavx512f'
without an explicit CPU.
Also check for an explicit +avx512f instead of CPUs in a couple
related tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240616
91177308-0d34-0410-b5e6-
96231b3b80d8
Ahmed Bougacha [Thu, 25 Jun 2015 00:40:25 +0000 (00:40 +0000)]
[X86] Cleanup fma tests a little bit. NFC.
Reformat, isolate 213->231 xform, actually --check-prefix CHECK,
and deduplicate the FMA intrinsic tests (FMA3 in AMD-land).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240615
91177308-0d34-0410-b5e6-
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Swaroop Sridhar [Thu, 25 Jun 2015 00:28:42 +0000 (00:28 +0000)]
Enable StackMap Serialization for COFF
Summary
This change turns on the emission of
__LLVM_Stackmaps section when generating COFF binaries.
Test Plan
Added a scenario to the test case:
test\CodeGen\X86\statepoint-stackmap-format.ll.
Code Review:
http://reviews.llvm.org/D10680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240613
91177308-0d34-0410-b5e6-
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Rui Ueyama [Thu, 25 Jun 2015 00:07:39 +0000 (00:07 +0000)]
libObject/COFF: Add a function to get pointers to relocation entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240610
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Wed, 24 Jun 2015 22:23:21 +0000 (22:23 +0000)]
Add simplify_type<const WeakVH>; simplify IndVarSimplify
r240214 fixed some UB in IndVarSimplify, and it needed a temporary
`WeakVH` to do it. Add `simplify_type<const WeakVH>` so that this
temporary isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240599
91177308-0d34-0410-b5e6-
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Douglas Katzman [Wed, 24 Jun 2015 22:04:55 +0000 (22:04 +0000)]
[X86] Simplify some stuff in X86DisassemblerDecoder. NFC
- Deciding that insn->sibIndex is SIB_INDEX_NONE does not require another
check beyond the fully decoded bits being equal to 0x4.
The expression insn->sibIndex == SIB_INDEX_sib could not have been true unless
index were 0x4, because SIB_INDEX_sib is merely the range base (SIB_INDEX_EAX)
plus 4. Respectively SIB_INDEX_sib64.
- Don't use a switch statement to perform left-shift.
Differential Revision: http://reviews.llvm.org/D9762
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240598
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Wed, 24 Jun 2015 21:52:25 +0000 (21:52 +0000)]
[GVN] Intersect the IR flags when CSE'ing two instructions
We performed a simple, but incomplete, intersection when it came time to
CSE instructions. It didn't handle, for example, the 'exact' flag.
This fixes PR23922.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240595
91177308-0d34-0410-b5e6-
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Douglas Katzman [Wed, 24 Jun 2015 21:46:53 +0000 (21:46 +0000)]
Spelling fixes in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240594
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Wed, 24 Jun 2015 21:27:36 +0000 (21:27 +0000)]
[Reassociate] Don't propogate flags when creating negations
Reassociate mutated existing instructions in order to form negations
which would create additional reassociate opportunities.
This fixes PR23926.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240593
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 24 Jun 2015 20:42:33 +0000 (20:42 +0000)]
fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240592
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 24 Jun 2015 20:40:57 +0000 (20:40 +0000)]
don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240591
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Wed, 24 Jun 2015 20:34:35 +0000 (20:34 +0000)]
[If Converter] Convert recursion to iteration.
This commit makes changes to IfConverter::AnalyzeBlock to use iteration instead
of recursion. Previously, this function would get called recursively a large
number of times and eventually segfault when a function with the following CFG
was compiled:
BB0:
if (condition0)
goto BB1
goto BB2
BB1:
goto BB2
BB2:
if (condition1)
goto BB3
goto BB4
BB3:
...
(repeat until BB7488)
rdar://problem/
21386145
Differential Revision: http://reviews.llvm.org/D10587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240589
91177308-0d34-0410-b5e6-
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Pete Cooper [Wed, 24 Jun 2015 20:22:23 +0000 (20:22 +0000)]
Devirtualize Instruction::clone_impl
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240588
91177308-0d34-0410-b5e6-
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