firefly-linux-kernel-4.4.55.git
9 years agoclk: atlas7: fix pll missed divide NR in fraction mode
Guo Zeng [Tue, 4 Aug 2015 14:45:32 +0000 (14:45 +0000)]
clk: atlas7: fix pll missed divide NR in fraction mode

PLL VCO frequency is given by Fvco = Fref * 2 * NF / NR
in integer-N mode, or by Fvco = Fref * SSN / NR in Spread
Spectrum (fractional-N) mode. Thus fix the missing part
of NR

Signed-off-by: Guo Zeng <guo.zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: atlas7: fix bit field and its root clk for coresight_tpiu
Guo Zeng [Tue, 4 Aug 2015 14:45:31 +0000 (14:45 +0000)]
clk: atlas7: fix bit field and its root clk for coresight_tpiu

bit4 thcpum_cpudiv4_clken  r/w
thcpum_cpudiv4_clk clock enable (default: 1)
Root clock CPU_CLK must be enabled for this clock to be enabled

bit3 coresight_tpiu_clken  r/w
coresight_tpiu_clk clock enable (default: 0)
Root clock TPIU_CLK must be enabled for this clock to be enabled

Signed-off-by: Guo Zeng <guo.zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: atlas7: replace dto resolution magic number by macro
Yibo Cai [Tue, 4 Aug 2015 14:45:29 +0000 (14:45 +0000)]
clk: atlas7: replace dto resolution magic number by macro

Signed-off-by: Yibo Cai <yibo.cai@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: atlas7: fix integer overflow in dto rate calculation
Yibo Cai [Tue, 4 Aug 2015 14:45:28 +0000 (14:45 +0000)]
clk: atlas7: fix integer overflow in dto rate calculation

I cannot believe that I spend quite a lot time in finding this bug.
It seems a pitfall people tend to fall in.

In "int64 = int32 * int32", conversion from 32-bits to 64-bits comes
after the multiplication. So this statement may not work as expected.

Signed-off-by: Yibo Cai <yibo.cai@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: atlas7: export mux clks so that consumers can get them
Guo Zeng [Tue, 4 Aug 2015 14:45:27 +0000 (14:45 +0000)]
clk: atlas7: export mux clks so that consumers can get them

this patch makes mux clks can be referenced by device drivers.

Signed-off-by: Guo Zeng <guo.zeng@csr.com>
Signed-off-by: Barry Song <Barry.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: atlas7: add lost pwm unit clks
Guo Zeng [Tue, 4 Aug 2015 14:45:26 +0000 (14:45 +0000)]
clk: atlas7: add lost pwm unit clks

Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: socfpga: Add a second parent option for the dbg_base_clk
Dinh Nguyen [Sat, 25 Jul 2015 03:30:18 +0000 (22:30 -0500)]
clk: socfpga: Add a second parent option for the dbg_base_clk

The debug base clock can be bypassed from the main PLL to the OSC1 clock.
The bypass register is the staysoc1(0x10) register that is in the clock
manager.

This patch adds the option to get the correct parent for the debug base
clock.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ux500: delete the non-DT U8500 clock implementation
Linus Walleij [Thu, 30 Jul 2015 13:19:12 +0000 (15:19 +0200)]
clk: ux500: delete the non-DT U8500 clock implementation

This code is unused and not coming back. Let's kill it off.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: Remove unused provider APIs
Stephen Boyd [Fri, 26 Jun 2015 00:24:15 +0000 (17:24 -0700)]
clk: Remove unused provider APIs

Remove these APIs now that we've converted all users to the
replacement struct clk_hw based versions.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: si5351: Convert __clk_get_name() to clk_hw_get_name()
Stephen Boyd [Fri, 7 Aug 2015 23:32:34 +0000 (16:32 -0700)]
clk: si5351: Convert __clk_get_name() to clk_hw_get_name()

This driver uses __clk_get_name() when it's dealing with struct
clk_hw pointers. Use the simpler form so that we can get rid of
the clk member in struct clk_hw one day.

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agodrm/msm/dsi: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
drm/msm/dsi: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Wentao Xu <wentaox@codeaurora.org>
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: versatile: Switch to assigned clock parents
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: versatile: Switch to assigned clock parents

We're removing struct clk from the clk provider API. This code is
calling the consumer APIs to change the parent to a 1 MHz fixed
rate clock for each of the clocks that the driver provides. Move
to using the assigned-clock-parents DT property for this instead.
Because this is an ABI break, detect if the property is missing
and fall back to setting the parent explicitly before the clocks
are registered.

Acked-by: Pawel Moll <pawel.moll@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: versatile: Add SP810 device tree bindings document
Pawel Moll [Thu, 6 Aug 2015 15:05:13 +0000 (16:05 +0100)]
clk: versatile: Add SP810 device tree bindings document

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ti: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: ti: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: tegra: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: tegra: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: sunxi: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: sunxi: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Emilio López" <emilio@elopez.com.ar>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: spear: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: spear: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: sirf: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: sirf: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: samsung: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: samsung: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: rockchip: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: rockchip: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: qcom: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: qcom: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: stm32f4: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: stm32f4: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: mvebu: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: mvebu: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs. This also
removes a clk_get() in this driver that can just as easily use
of_clk_get_parent_name() instead.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: mmp: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: mmp: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: Convert basic types to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: Convert basic types to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: bcm: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: bcm: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: at91: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
clk: at91: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoMIPS: alchemy: Convert to clk_hw based provider APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
MIPS: alchemy: Convert to clk_hw based provider APIs

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoARM: OMAP: Convert __clk_get_rate() to provider/consumer APIs
Stephen Boyd [Fri, 31 Jul 2015 00:20:57 +0000 (17:20 -0700)]
ARM: OMAP: Convert __clk_get_rate() to provider/consumer APIs

We're removing struct clk from the clk provider API, so switch to
clk_get_rate() and clk_hw_get_rate() here appropriately.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ti: Remove CLK_IS_BASIC check
Stephen Boyd [Tue, 21 Jul 2015 00:23:54 +0000 (17:23 -0700)]
clk: ti: Remove CLK_IS_BASIC check

This code is never called with a basic clock type, so the check
here is not doing anything useful and is blocking the removal of
__clk_get_flags(). Remove the check so we can delete the
__clk_get_flags() API.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: Convert __clk_get_flags() to clk_hw_get_flags()
Stephen Boyd [Mon, 29 Jun 2015 23:56:30 +0000 (16:56 -0700)]
clk: Convert __clk_get_flags() to clk_hw_get_flags()

Mostly converted with the following snippet:

@@
struct clk_hw *E;
@@

-__clk_get_flags(E->clk)
+clk_hw_get_flags(E)

Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: Replace __clk_get_num_parents with clk_hw_get_num_parents()
Stephen Boyd [Thu, 25 Jun 2015 23:53:23 +0000 (16:53 -0700)]
clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()

Mostly converted with the following semantic patch:

@@
struct clk_hw *E;
@@

-__clk_get_num_parents(E->clk)
+clk_hw_get_num_parents(E)

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Chao Xie <chao.xie@marvell.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Emilio López" <emilio@elopez.com.ar>
Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: Add clk_hw_*() APIs for use by clk providers
Stephen Boyd [Thu, 25 Jun 2015 22:55:14 +0000 (15:55 -0700)]
clk: Add clk_hw_*() APIs for use by clk providers

clk providers shouldn't need to use the consumer APIs (clk.h).
Add provider APIs to replace the __clk_*() APIs that take a
struct clk_hw as their first argument instead of a struct clk.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: rockchip: Fix SPIF special clock definition
Sjoerd Simons [Tue, 28 Jul 2015 09:52:42 +0000 (11:52 +0200)]
clk: rockchip: Fix SPIF special clock definition

Neither spdif_src nor spdif_pll exists, judging by the vendor kernel in
both cases spdif_pre was meant. This brings the naming in line and
hierachy in line with that of sclk_i2s0.

Also allow sclk_spdif and spdif_frac to change their parents rate as
that the upstream dividers are purely there to feed sclk_spdif

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoclk: bcm2835: Drop the fixed sys_pclk.
Eric Anholt [Mon, 20 Jul 2015 19:33:04 +0000 (12:33 -0700)]
clk: bcm2835: Drop the fixed sys_pclk.

Nothing uses it, and I can't find any evidence that anything ever has.
Its role is now filled by the core clock in the firmware driver.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoclk: track the orphan status of clocks and their children
Heiko Stuebner [Wed, 22 Apr 2015 20:53:05 +0000 (22:53 +0200)]
clk: track the orphan status of clocks and their children

While children of orphan clocks are not carried in the orphan-list itself,
they're nevertheless orphans in their own right as they also don't have an
input-rate available. To ease tracking if a clock is an orphan or has an
orphan in its parent path introduce an orphan field into struct clk and
update it and the fields in child-clocks when a clock gets added or removed
from the orphan-list.

Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Alex Elder <elder@linaro.org>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: kernel@pengutronix.de
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Chao Xie <chao.xie@marvell.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Georgi Djakov <georgi.djakov@linaro.org>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Barry Song <baohua@kernel.org>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Gabriel FERNANDEZ <gabriel.fernandez@st.com>
Cc: emilio@elopez.com.ar
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Michal Simek <michal.simek@xilinx.com>
[sboyd@codeaurora.org: s/clk/core/ in new function]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: sunxi: Add a simple gates driver
Maxime Ripard [Fri, 31 Jul 2015 17:46:22 +0000 (19:46 +0200)]
clk: sunxi: Add a simple gates driver

The gates were handled with a common piece of framework that was
registering all gates array, that was not using the CLK_OF_DECLARE logic,
and was not using clock-indices but some private masks that were pretty
much equivalent.

Move this code in a new driver that handles all the gates array and solves
both these issues.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
[sboyd@codeaurora.org: Include clk.h for consumer API usage]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoARM: sun9i: Wrap the clock-indices
Maxime Ripard [Fri, 31 Jul 2015 17:46:21 +0000 (19:46 +0200)]
ARM: sun9i: Wrap the clock-indices

Wrap the clock-indices to match the wrapping of the clock-output-names in
order to make it easier to match indices to names.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoARM: sun8i: Add clock indices
Maxime Ripard [Fri, 31 Jul 2015 17:46:20 +0000 (19:46 +0200)]
ARM: sun8i: Add clock indices

The A23 and A33 gates have a non continuous set of clock IDs that are
valid. Add the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoARM: sun7i: Add clock indices
Maxime Ripard [Fri, 31 Jul 2015 17:46:19 +0000 (19:46 +0200)]
ARM: sun7i: Add clock indices

The A20 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoARM: sun6i: Add clock indices
Maxime Ripard [Fri, 31 Jul 2015 17:46:18 +0000 (19:46 +0200)]
ARM: sun6i: Add clock indices

The A31 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoARM: sun5i: Add clock indices
Maxime Ripard [Fri, 31 Jul 2015 17:46:17 +0000 (19:46 +0200)]
ARM: sun5i: Add clock indices

The A10s and A13 gates have a non continuous set of clock IDs that are
valid. Add the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoARM: sun4i: Add clock indices
Maxime Ripard [Fri, 31 Jul 2015 17:46:16 +0000 (19:46 +0200)]
ARM: sun4i: Add clock indices

The A10 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoMerge tag 'imx-clk-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo...
Michael Turquette [Tue, 11 Aug 2015 17:44:24 +0000 (10:44 -0700)]
Merge tag 'imx-clk-4.3' of git://git./linux/kernel/git/shawnguo/linux into clk-next

The i.MX clock updates for 4.3:
 - Provide a better IPU clock initial settings on imx6dl for getting
   HDMI and LVDS at the same time.
 - Add clock driver support for i.MX6UL SoC
 - Add a second clock for RTC device on i.MX31 and i.MX35

9 years agoclk/mmp: use kmemdup rather than duplicating its implementation
Andrzej Hajda [Fri, 7 Aug 2015 07:59:16 +0000 (09:59 +0200)]
clk/mmp: use kmemdup rather than duplicating its implementation

The patch was generated using fixed coccinelle semantic patch
scripts/coccinelle/api/memdup.cocci [1].

[1]: http://permalink.gmane.org/gmane.linux.kernel/2014320

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: imx35: define two clocks for rtc
Philippe Reynes [Sun, 26 Jul 2015 21:37:49 +0000 (23:37 +0200)]
clk: imx35: define two clocks for rtc

The imx35 don't define clocks for rtc.
This patch add two clocks, as needed
by the mxc rtc driver.

Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
9 years agoclk: imx31: add a second rtc clock
Philippe Reynes [Sun, 26 Jul 2015 21:37:48 +0000 (23:37 +0200)]
clk: imx31: add a second rtc clock

The mxc rtc driver needs two clock.
It was defined only one clock, so we
define the second clock.

Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
9 years agoclk: hisi: refine parameter checking for init
Leo Yan [Mon, 3 Aug 2015 01:13:34 +0000 (09:13 +0800)]
clk: hisi: refine parameter checking for init

*of_iomap()* will check the device node pointer, and if the pointer is
NULL it will return error code. So refine clock's init flow by checking
the device node with this simple way; and polish a little for the print
out message.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: versatile: off by one in clk_sp810_timerclken_of_get()
Dan Carpenter [Wed, 29 Jul 2015 10:17:06 +0000 (13:17 +0300)]
clk: versatile: off by one in clk_sp810_timerclken_of_get()

The ">" should be ">=" or we end up reading beyond the end of the array.

Fixes: 6e973d2c4385 ('clk: vexpress: Add separate SP810 driver')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: exynos4: Fix wrong clock for Exynos4x12 ADC
Krzysztof Kozlowski [Fri, 12 Jun 2015 01:53:25 +0000 (10:53 +0900)]
clk: exynos4: Fix wrong clock for Exynos4x12 ADC

The TSADC gate clock was used in Exynos4x12 DTSI for exynos-adc driver.
However TSADC is present only on Exynos4210 so on Trats2 board (with
Exynos4412 SoC) the exynos-adc driver could not be probed:
   ERROR: could not get clock /adc@126C0000:adc(0)
   exynos-adc 126c0000.adc: failed getting clock, err = -2
   exynos-adc: probe of 126c0000.adc failed with error -2

Instead on Exynos4x12 SoCs the main clock used by Analog to Digital
Converter is located in different register and it is named in datasheet
as PCLK_ADC. Regardless of the name the purpose of this PCLK_ADC clock
is the same as purpose of TSADC from Exynos4210.

The patch adds gate clock for Exynos4x12 using the proper register so
backward compatibility is preserved. This fixes the probe of exynos-adc
driver on Exynos4x12 boards and allows accessing sensors connected to it
on Trats2 board (ntc,ncp15wb473 AP and battery thermistors).

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: <stable@vger.kernel.org>
Fixes: c63c57433003 ("ARM: dts: Add ADC's dt data to read raw data for exynos4x12")
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: kill off set_irq_flags usage
Rob Herring [Mon, 27 Jul 2015 20:55:14 +0000 (15:55 -0500)]
clk: kill off set_irq_flags usage

set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also modify IRQ_NOPROBE and this has been maintained although it
is not clear that is really needed. There appears to be a great deal of
blind copy and paste of this code.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Mike Turquette <mturquette@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: zx: Constify parent names in clock init data
Jun Nie [Thu, 23 Jul 2015 07:02:53 +0000 (15:02 +0800)]
clk: zx: Constify parent names in clock init data

The array of parent names can be made as array of const pointers to
const strings.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: zx: Add audio and GPIO clock for zx296702
Jun Nie [Thu, 23 Jul 2015 07:02:52 +0000 (15:02 +0800)]
clk: zx: Add audio and GPIO clock for zx296702

Add SPDIF/I2S and GPIO clock for zx296702

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: zx: Add audio div clock method for zx296702
Jun Nie [Thu, 23 Jul 2015 07:02:51 +0000 (15:02 +0800)]
clk: zx: Add audio div clock method for zx296702

Add SPDIF/I2S divider clock method for zx296702

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: s2mps11: Use kcalloc instead of kzalloc for array allocation
Vaibhav Hiremath [Wed, 22 Jul 2015 09:34:53 +0000 (15:04 +0530)]
clk: s2mps11: Use kcalloc instead of kzalloc for array allocation

This patch cleans up the driver for,

  - Use devm_kcalloc() variant instead of devm_kzalloc() for array
    allocation.
  - clk_prepare()/unprepare(), remove "ret" variable as it is not required
  - use __exit for cleanup function

As I am referring this driver as a reference for my 88pm800 clk driver,
applying same changes here as well.

Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: Silence warnings about lock imbalances
Stephen Boyd [Fri, 24 Jul 2015 19:24:48 +0000 (12:24 -0700)]
clk: Silence warnings about lock imbalances

The recursive spinlock implementation trips up sparse and it
complains that these functions have lock imbalances. That isn't
really true though, so add some __acquires() and __releases()
information so that sparse is quiet.

drivers/clk/clk.c:116:22: warning: context imbalance in 'clk_enable_lock' - wrong count at exit
drivers/clk/clk.c:141:9: warning: context imbalance in 'clk_enable_unlock' - unexpected unlock

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: basic-type: Silence warnings about lock imbalances
Stephen Boyd [Fri, 24 Jul 2015 19:21:12 +0000 (12:21 -0700)]
clk: basic-type: Silence warnings about lock imbalances

The basic clock types use conditional locking for the register
accessor spinlocks. Add __acquire() and __release() markings in
the right locations so that sparse isn't tripped up on the
conditional locking.

drivers/clk/clk-mux.c:68:12: warning: context imbalance in 'clk_mux_set_parent' - different lock contexts for basic block
drivers/clk/clk-divider.c:379:12: warning: context imbalance in 'clk_divider_set_rate' - different lock contexts for basic block
drivers/clk/clk-gate.c:71:9: warning: context imbalance in 'clk_gate_endisable' - different lock contexts for basic block
drivers/clk/clk-fractional-divider.c:36:9: warning: context imbalance in 'clk_fd_recalc_rate' - different lock contexts for basic block
drivers/clk/clk-fractional-divider.c:68:12: warning: context imbalance in 'clk_fd_set_rate' - different lock contexts for basic block

Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: qcom: Give clk-qcom.ko module a GPLv2 license
Stephen Boyd [Fri, 24 Jul 2015 18:55:42 +0000 (11:55 -0700)]
clk: qcom: Give clk-qcom.ko module a GPLv2 license

The missing license causes the clk-qcom.ko module to taint the
kernel. Add the appropriate license to avoid taint.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: gpio: Mark parent_names array const
Stephen Boyd [Fri, 24 Jul 2015 16:31:29 +0000 (09:31 -0700)]
clk: gpio: Mark parent_names array const

Let's encourage const arrays of parent names like other basic
clock types.

Cc: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoMerge branch 'v4.3-topic/clk-samsung' of git://git.kernel.org/pub/scm/linux/kernel...
Michael Turquette [Fri, 24 Jul 2015 18:29:53 +0000 (11:29 -0700)]
Merge branch 'v4.3-topic/clk-samsung' of git://git./linux/kernel/git/kgene/linux-samsung into clk-next

9 years agoclk: allow a clk divider with max divisor when zero
Jim Quinlan [Fri, 15 May 2015 19:45:47 +0000 (15:45 -0400)]
clk: allow a clk divider with max divisor when zero

This commit allows certain Broadcom STB clock dividers to be used with
clk-divider.c.  It allows for a clock whose field value is the equal
to the divisor, execpt when the field value is zero, in which case the
divisor is 2^width.  For example, consider a divisor clock with a two
bit field:

value divisor
0 4
1 1
2 2
3 3

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
9 years agoclk: socfpga: switch to GENMASK()
Andy Shevchenko [Mon, 13 Jul 2015 14:07:43 +0000 (17:07 +0300)]
clk: socfpga: switch to GENMASK()

Convert the code to use GENMASK() helper instead of div_mask() macro.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: pxa: fix core frequency reporting unit
Robert Jarzmik [Sun, 12 Jul 2015 20:49:53 +0000 (22:49 +0200)]
clk: pxa: fix core frequency reporting unit

Legacy drivers which are not yet ported, such as cpufreq-pxa[23]xx, rely
on pxaXXx_get_clk_frequency_khz() to find the CPU core frequency.

This reporting was broken because the expected unit is kHz and not
Hz. Fix the reporting for pxa25x, pxa27x and pxa3xx.

Fixes: fe7710fae477 ("clk: add pxa25x clock drivers")
Fixes: d40670dc6169 ("clk: add pxa27x clock drivers")
Fixes: 9bbb8a338fb2 ("clk: pxa: add pxa3xx clock driver")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: rockchip: Fix PLL bandwidth
Douglas Anderson [Tue, 21 Jul 2015 20:41:23 +0000 (13:41 -0700)]
clk: rockchip: Fix PLL bandwidth

In the TRM we see that BWADJ is "a 12-bit bus that selects the values
1-4096 for the bandwidth divider (NB)":
 NB = BWADJ[11:0] + 1
The recommended setting of NB: NB = NF / 2.

So:
  NB = NF / 2
  BWADJ[11:0] + 1 = NF / 2
  BWADJ[11:0] = NF / 2 - 1

Right now, we have:

{                                               \
        .rate   = _rate##U,                     \
        .nr = _nr,                              \
        .nf = _nf,                              \
        .no = _no,                              \
        .bwadj = (_nf >> 1),                    \
}

That means we set bwadj to NF / 2, not NF / 2 - 1

All of this is a bit confusing because we specify "NR" (the 1-based
value), "NF" (the 1-based value), "NO" (the 1-based value), but
"BWADJ" (the 0-based value) instead of "NB" (the 1-based value).

Let's change to working with "NB" and fix the off by one error.  This
may affect PLL jitter in a small way (hopefully for the better).

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoMerge branch 'cleanup-clk-h-includes' into clk-next
Stephen Boyd [Tue, 21 Jul 2015 18:22:42 +0000 (11:22 -0700)]
Merge branch 'cleanup-clk-h-includes' into clk-next

* cleanup-clk-h-includes: (62 commits)
  clk: Remove clk.h from clk-provider.h
  clk: h8300: Remove clk.h and clkdev.h includes
  clk: at91: Include clk.h and slab.h
  clk: ti: Switch clk-provider.h include to clk.h
  clk: pistachio: Include clk.h
  clk: ingenic: Include clk.h
  clk: si570: Include clk.h
  clk: moxart: Include clk.h
  clk: cdce925: Include clk.h
  clk: Include clk.h in clk.c
  clk: zynq: Include clk.h
  clk: ti: Include clk.h
  clk: sunxi: Include clk.h and remove unused clkdev.h includes
  clk: st: Include clk.h
  clk: qcom: Include clk.h
  clk: highbank: Include clk.h
  clk: bcm: Include clk.h
  clk: versatile: Remove clk.h and clkdev.h includes
  clk: ux500: Remove clk.h and clkdev.h includes
  clk: tegra: Properly include clk.h
  ...

9 years agoclk: ti: make use of of_clk_parent_fill helper function
Dinh Nguyen [Tue, 7 Jul 2015 03:59:06 +0000 (22:59 -0500)]
clk: ti: make use of of_clk_parent_fill helper function

Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: sunxi: make use of of_clk_parent_fill helper function
Dinh Nguyen [Tue, 7 Jul 2015 03:59:05 +0000 (22:59 -0500)]
clk: sunxi: make use of of_clk_parent_fill helper function

Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Emilio López" <emilio@elopez.com.ar>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: st: make use of of_clk_parent_fill helper function
Dinh Nguyen [Tue, 7 Jul 2015 03:59:04 +0000 (22:59 -0500)]
clk: st: make use of of_clk_parent_fill helper function

Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Tested-by Gabriel Fernandez <gabriel.fernandez@st.com>
Cc: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: keystone: make use of of_clk_parent_fill helper function
Dinh Nguyen [Tue, 7 Jul 2015 03:59:03 +0000 (22:59 -0500)]
clk: keystone: make use of of_clk_parent_fill helper function

Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: at91: make use of of_clk_parent_fill helper function
Dinh Nguyen [Tue, 7 Jul 2015 03:59:01 +0000 (22:59 -0500)]
clk: at91: make use of of_clk_parent_fill helper function

Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: mediatek: Add MT8173 MMPLL change rate support
James Liao [Fri, 10 Jul 2015 08:39:34 +0000 (16:39 +0800)]
clk: mediatek: Add MT8173 MMPLL change rate support

MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch add support for MT8173 MMPLL frequency setting by adding
div-rate table to lookup suitable post divider setting under a
specified frequency.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: mediatek: Fix calculation of PLL rate settings
James Liao [Fri, 10 Jul 2015 08:39:33 +0000 (16:39 +0800)]
clk: mediatek: Fix calculation of PLL rate settings

Avoid u32 overflow when calculate post divider setting, and
increase the max post divider setting from 3 (/8) to 4 (/16).

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: mediatek: Fix PLL registers setting flow
James Liao [Fri, 10 Jul 2015 08:39:32 +0000 (16:39 +0800)]
clk: mediatek: Fix PLL registers setting flow

Write postdiv and pcw settings at the same time for PLLs if postdiv
and pcw settings are on the same register.

This is need by PLLs such as MT8173 MMPLL and ARM*PLL.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: Allow providers to configure min/max rates
Stephen Boyd [Thu, 16 Jul 2015 19:50:27 +0000 (12:50 -0700)]
clk: Allow providers to configure min/max rates

clk providers are using the consumer APIs to set min/max rates on
the clock they're providing. To encourage clk providers to move
away from the consumer APIs, add a provider API to set the
min/max rate of a clock. The assumption is that this is done
before the clock can be requested via clk_get() and that the
clock rate is already within the boundaries of the min/max that's
configured.

Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: twl6040: Convert to use devm_clk_register
Axel Lin [Thu, 16 Jul 2015 14:15:53 +0000 (22:15 +0800)]
clk: twl6040: Convert to use devm_clk_register

Use devm_clk_register() to simplify the code by removing
twl6040_clk_remove().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: s2mps11: Simplify s2mps11_clk_probe unwind paths
Axel Lin [Thu, 16 Jul 2015 13:59:43 +0000 (21:59 +0800)]
clk: s2mps11: Simplify s2mps11_clk_probe unwind paths

The devm_clk_unregister() in .probe error case is not necessary as it will
be automatically called when probe fails.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: shmobile: Remove unneeded #include <linux/clkdev.h>
Geert Uytterhoeven [Tue, 23 Jun 2015 13:09:27 +0000 (15:09 +0200)]
clk: shmobile: Remove unneeded #include <linux/clkdev.h>

The CCF implementations for the various shmobile SoCs don't use clkdev
functionality, hence drop the inclusion of <linux/clkdev.h>.

Add the missing #include <linux/slab.h>, which was included implicitly
through <asm/clkdev.h> before.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ti: Force pointer to be __iomem
Stephen Boyd [Wed, 15 Jul 2015 19:58:22 +0000 (12:58 -0700)]
clk: ti: Force pointer to be __iomem

Add __force here so that sparse doesn't complain about us playing
tricks with __iomem.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ti: clk-3xxx: Remove unused structures
Stephen Boyd [Wed, 15 Jul 2015 19:04:53 +0000 (12:04 -0700)]
clk: ti: clk-3xxx: Remove unused structures

Sparse complains about these structures missing static, but they
also don't look to be used. Remove them.

drivers/clk/ti/clk-3xxx.c:74:30: warning: symbol 'clkhwops_omap3430es2_ssi_wait' was not declared. Should it be static?
drivers/clk/ti/clk-3xxx.c:157:30: warning: symbol 'clkhwops_omap3430es2_hsotgusb_wait' was not declared. Should it be static?

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ti: Mark ti_clk_features static
Stephen Boyd [Wed, 15 Jul 2015 19:03:52 +0000 (12:03 -0700)]
clk: ti: Mark ti_clk_features static

This variable isn't exported outside of this file so mark it
static. Silences the following sparse warning:

drivers/clk/ti/clk.c:36:24: warning: symbol 'ti_clk_features' was not declared. Should it be static?

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ti: Check kzalloc() for failures
Stephen Boyd [Wed, 15 Jul 2015 18:55:42 +0000 (11:55 -0700)]
clk: ti: Check kzalloc() for failures

smatch reports a failure to check kzalloc() here:

drivers/clk/ti/clk.c:232
omap2_clk_provider_init() error: potential null dereference 'io'.
(kzalloc returns null)

Check for an allocation failure and return -ENOMEM.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoMerge branch 'for-4.2/ti-clk-move' of https://github.com/t-kristo/linux-pm into clk...
Stephen Boyd [Tue, 28 Jul 2015 18:58:26 +0000 (11:58 -0700)]
Merge branch 'for-4.2/ti-clk-move' of https://github.com/t-kristo/linux-pm into clk-next

From Tero Kristo:
  "This pull request contains the TI clock driver set to move the
   clock implementations under clock driver. Some small portions of
   the clock driver code still remain under mach-omap2 after this,
   it should be decided whether this code is now obsolete and should
   be deleted or should someone try to fix it."

Slight merge conflicts with determine_rate prototype changes.

9 years agoclk: h8300: Fix signness bug
Axel Lin [Sat, 20 Jun 2015 07:27:03 +0000 (15:27 +0800)]
clk: h8300: Fix signness bug

of_clk_get_parent_count() may return negative error code, so num_parents
needs to be int rather than unsigned int.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks
Stephen Boyd [Tue, 14 Jul 2015 23:57:29 +0000 (16:57 -0700)]
clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks

The other ce clocks have the flag set, but ce1 doesn't, so
clk_set_rate() doesn't propagate up the tree to the ce1_src_clk.
Set the flag as this is supported.

Reported-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Tested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Fixes: 02824653200b ("clk: qcom: Add APQ8084 Global Clock Controller support")
Fixes: d33faa9ead8d ("clk: qcom: Add support for MSM8974's global clock controller (GCC)")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: gpio: Unlock mutex on error path
Stephen Boyd [Tue, 14 Jul 2015 19:45:19 +0000 (12:45 -0700)]
clk: gpio: Unlock mutex on error path

We don't unlock the mutex if we fail to allocate the parent names
array. Unlock it and return an error in this case as well.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Acked-by: Julia Lawall <julia.lawall@lip6.fr>
Cc: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: h8300: Use standard Linux I/O accessors
Stephen Boyd [Tue, 14 Jul 2015 00:06:53 +0000 (17:06 -0700)]
clk: h8300: Use standard Linux I/O accessors

There doesn't seem to be any reason why we can't use the standard
readb()/writeb() accessors here because ctrl_inb() and
ctrl_outb() match the generic implementation of readb() and
writeb() that the h8300 architecture uses. This allows us to test
compile this driver on other architectures besides h8300.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: h8300: Drop allocation printk and cleanup sizeof style
Stephen Boyd [Mon, 13 Jul 2015 23:54:04 +0000 (16:54 -0700)]
clk: h8300: Drop allocation printk and cleanup sizeof style

We don't need to print an error on allocation failures, drop it.
While we're here, change the sizeof() to be sizeof(*<ptr>) to
make code more future proof.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoMerge branch 'clk-determine-rate-struct' into clk-next
Stephen Boyd [Tue, 28 Jul 2015 18:51:30 +0000 (11:51 -0700)]
Merge branch 'clk-determine-rate-struct' into clk-next

* clk-determine-rate-struct:
  clk: fix some determine_rate implementations
  clk: change clk_ops' ->determine_rate() prototype

9 years agoclk: fix some determine_rate implementations
Boris Brezillon [Thu, 9 Jul 2015 20:39:38 +0000 (22:39 +0200)]
clk: fix some determine_rate implementations

Some determine_rate implementations are not returning an error
when they failed to adapt the rate according to the rate request.
Fix them so that they return an error instead of silently
returning 0.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: change clk_ops' ->determine_rate() prototype
Boris Brezillon [Tue, 7 Jul 2015 18:48:08 +0000 (20:48 +0200)]
clk: change clk_ops' ->determine_rate() prototype

Clock rates are stored in an unsigned long field, but ->determine_rate()
(which returns a rounded rate from a requested one) returns a long
value (errors are reported using negative error codes), which can lead
to long overflow if the clock rate exceed 2Ghz.

Change ->determine_rate() prototype to return 0 or an error code, and pass
a pointer to a clk_rate_request structure containing the expected target
rate and the rate constraints imposed by clk users.

The clk_rate_request structure might be extended in the future to contain
other kind of constraints like the rounding policy, the maximum clock
inaccuracy or other things that are not yet supported by the CCF
(power consumption constraints ?).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
[sboyd@codeaurora.org: Fix parent dereference problem in
__clk_determine_rate()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate
clocks without parents or a rate determining op]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: exynos3250: Add cpu clock configuration data and instaniate cpu clock
Chanwoo Choi [Fri, 24 Jul 2015 03:42:40 +0000 (12:42 +0900)]
clk: exynos3250: Add cpu clock configuration data and instaniate cpu clock

This patch add CPU clock configuration data and instantiate the CPU
clock type for Exynos3250 to support Samsung specific cpu-clock type.

Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
9 years agoclk: exynos5250: add cpu clock configuration data and instantiate cpu clock
Thomas Abraham [Wed, 1 Jul 2015 13:10:35 +0000 (15:10 +0200)]
clk: exynos5250: add cpu clock configuration data and instantiate cpu clock

With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5250.

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[b.zolnierkie: split exynos5250 support from the original patch]
[b.zolnierkie: moved E5250_CPU_DIV[0,1] macros to clk-exynos5250.c]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
9 years agoclk: Remove clk.h from clk-provider.h
Stephen Boyd [Tue, 23 Jun 2015 00:13:49 +0000 (17:13 -0700)]
clk: Remove clk.h from clk-provider.h

Remove clk.h from clk-provider.h so that we can clearly split clk
providers from clk consumers. This will allow us to quickly
detect when clock providers are using the consumer APIs by
looking at the includes.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: h8300: Remove clk.h and clkdev.h includes
Stephen Boyd [Mon, 13 Jul 2015 23:47:44 +0000 (16:47 -0700)]
clk: h8300: Remove clk.h and clkdev.h includes

Neither of these includes are used in these files, remove them.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: at91: Include clk.h and slab.h
Stephen Boyd [Fri, 19 Jun 2015 22:00:46 +0000 (15:00 -0700)]
clk: at91: Include clk.h and slab.h

This clock provider uses the consumer API, so include clk.h
explicitly. Also include slab.h instead of relying on clkdev.h
for it.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ti: Switch clk-provider.h include to clk.h
Stephen Boyd [Thu, 9 Jul 2015 22:24:51 +0000 (15:24 -0700)]
clk: ti: Switch clk-provider.h include to clk.h

This file isn't a clock provider but uses the consumer API, so
include clk.h instead of clk-provider.h.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: pistachio: Include clk.h
Stephen Boyd [Thu, 9 Jul 2015 22:24:51 +0000 (15:24 -0700)]
clk: pistachio: Include clk.h

This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: ingenic: Include clk.h
Stephen Boyd [Fri, 1 May 2015 23:09:33 +0000 (16:09 -0700)]
clk: ingenic: Include clk.h

This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: si570: Include clk.h
Stephen Boyd [Fri, 1 May 2015 23:09:33 +0000 (16:09 -0700)]
clk: si570: Include clk.h

This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Guenter Roeck <linux@roeck-us.net>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
9 years agoclk: moxart: Include clk.h
Stephen Boyd [Fri, 1 May 2015 23:09:33 +0000 (16:09 -0700)]
clk: moxart: Include clk.h

This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>