Rafael Espindola [Wed, 15 Dec 2010 07:12:24 +0000 (07:12 +0000)]
Generalize an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121851
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Chris Lattner [Wed, 15 Dec 2010 07:10:43 +0000 (07:10 +0000)]
add a shift/imul missed optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121850
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Chris Lattner [Wed, 15 Dec 2010 06:38:24 +0000 (06:38 +0000)]
add a note about a SPEC hack that gcc mainline does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121849
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Chris Lattner [Wed, 15 Dec 2010 06:04:19 +0000 (06:04 +0000)]
take care of some todos, transforming [us]mul_lohi into
a wider mul if the wider mul is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121848
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Chris Lattner [Wed, 15 Dec 2010 05:58:59 +0000 (05:58 +0000)]
merge two tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121847
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Chris Lattner [Wed, 15 Dec 2010 05:51:39 +0000 (05:51 +0000)]
when transforming a MULHS into a wider MUL, there is no need to SRA the
result, the top bits are truncated off anyway, just use SRL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121846
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Chris Lattner [Wed, 15 Dec 2010 04:52:41 +0000 (04:52 +0000)]
make qsort predicate more conformant by returning 0 for equal values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121838
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Chris Lattner [Wed, 15 Dec 2010 04:48:22 +0000 (04:48 +0000)]
various cleanups to tblgen, patch by Garrison Venn!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121837
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Bill Wendling [Wed, 15 Dec 2010 01:35:55 +0000 (01:35 +0000)]
Add mention that we support FreeBSD/amd64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121832
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Kevin Enderby [Wed, 15 Dec 2010 01:24:36 +0000 (01:24 +0000)]
Add some more MC tests for ARM arithmetic instructions that update or don't
update the condition codes. These come from my test generator and are just
the ones that MC currently assembles correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121830
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:22:34 +0000 (01:22 +0000)]
Copy-pastos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121829
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:22:29 +0000 (01:22 +0000)]
Remove ConvertToMAttrImpl, it became too '-march'-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121828
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:22:25 +0000 (01:22 +0000)]
llvmc: Support -march arguments that should be forwarded to llc as -mcpu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121827
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:22:20 +0000 (01:22 +0000)]
llvmc: Better -mfpu/-mcpu support for ARM & PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121826
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:22:15 +0000 (01:22 +0000)]
llvmc: more complete -march table for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121825
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:22:10 +0000 (01:22 +0000)]
llvmc: Support -mabi/-mfloat-abi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121824
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:22:05 +0000 (01:22 +0000)]
llvmc: Forward -march/-mcpu/-mtune to as & ld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121823
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Mikhail Glushenkov [Wed, 15 Dec 2010 01:21:59 +0000 (01:21 +0000)]
llvmc: make switch options ZeroOrMore by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121822
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Bill Wendling [Wed, 15 Dec 2010 01:03:19 +0000 (01:03 +0000)]
Reapply r121808 now that the missing patterns have been supplied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121820
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Bill Wendling [Wed, 15 Dec 2010 00:58:57 +0000 (00:58 +0000)]
Add some missing patterns now that tLDRB and tLDRH are split into reg and
immediate versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121819
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Owen Anderson [Wed, 15 Dec 2010 00:55:35 +0000 (00:55 +0000)]
Fix PR8790, another instance where unreachable code can cause instruction simplification to fail,
this case involve a select that simplifies to itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121817
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Owen Anderson [Wed, 15 Dec 2010 00:52:44 +0000 (00:52 +0000)]
Cleanup trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121816
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Bill Wendling [Wed, 15 Dec 2010 00:04:00 +0000 (00:04 +0000)]
Revert r121808 until I can fix the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121815
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Jim Grosbach [Tue, 14 Dec 2010 23:47:35 +0000 (23:47 +0000)]
thumb adr fixup needs alignment just like the t2 version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121812
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Bill Wendling [Tue, 14 Dec 2010 23:42:48 +0000 (23:42 +0000)]
Comments and cleaning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121809
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Bill Wendling [Tue, 14 Dec 2010 23:40:49 +0000 (23:40 +0000)]
Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In
particular, we want
ldr r2, [r3]
to be equivalent to
ldr r2, [r3, #0]
and not
ldr r2, [r3, r0]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121808
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 23:38:19 +0000 (23:38 +0000)]
Simplify RegAllocGreedy's use of register aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121807
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 23:28:01 +0000 (23:28 +0000)]
Simplify CCState's use of register aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121806
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 23:23:15 +0000 (23:23 +0000)]
Simplify AggressiveAntiDepBreaker's use of register aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121805
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 23:10:48 +0000 (23:10 +0000)]
Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121801
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 23:03:42 +0000 (23:03 +0000)]
Introduce TargetRegisterInfo::getOverlaps(Reg), returning a list of all
registers that alias Reg, including itself. This is almost the same as the
existing getAliasSet() method, except for the inclusion of Reg.
The name matches the reflexive TRI::regsOverlap(x, y) relation.
It is very common to do stuff to a register and all its aliases:
stuff(Reg)
for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
stuff(*Alias);
That can now be written as the simpler:
for (const unsigned *Alias = TRI->getOverlaps(Reg); *Alias; ++Alias)
stuff(*Alias);
This change requires a bit more constant space for the alias lists because Reg
is included and because the empty alias list cannot be shared any longer.
If the getAliasSet method is eventually removed, this space can be reclaimed by
sharing overlap lists. For instance, %rax and %eax have identical overlap sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121800
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Jim Grosbach [Tue, 14 Dec 2010 22:28:03 +0000 (22:28 +0000)]
Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://
8755755
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121798
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Bill Wendling [Tue, 14 Dec 2010 22:26:49 +0000 (22:26 +0000)]
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121797
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Bill Wendling [Tue, 14 Dec 2010 22:10:49 +0000 (22:10 +0000)]
Multiclassify the LDR/STR encoding patterns. The only functionality difference
is the addition of the FoldableAsLoad & Rematerializable flags to some of the
load instructions. ARM has these flags set for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121794
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Evan Cheng [Tue, 14 Dec 2010 21:34:53 +0000 (21:34 +0000)]
Fix a minor bug in two-address pass. It was missing a commute opportunity.
regB = move RCX
regA = op regB, regC
RAX = move regA
where both regB and regC are killed. If regB is constrainted to non-compatible
physical registers but regC is not constrainted at all, then it's better to
commute the instruction.
movl %edi, %eax
shlq $32, %rcx
leaq (%rcx,%rax), %rax
=>
movl %edi, %eax
shlq $32, %rcx
orq %rcx, %rax
rdar://
8762995
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121793
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Jim Grosbach [Tue, 14 Dec 2010 21:28:29 +0000 (21:28 +0000)]
trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121792
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Matt Beaumont-Gay [Tue, 14 Dec 2010 21:14:55 +0000 (21:14 +0000)]
Move debugging code entirely within DEBUG(). Silences an unused variable
warning in the opt build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121791
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Jim Grosbach [Tue, 14 Dec 2010 21:10:47 +0000 (21:10 +0000)]
Refactor a bit for legibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121790
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Jim Grosbach [Tue, 14 Dec 2010 20:46:39 +0000 (20:46 +0000)]
trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121789
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Jim Grosbach [Tue, 14 Dec 2010 20:45:47 +0000 (20:45 +0000)]
Make sure to propagate the predicate operands for LEApcrel to ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121788
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Owen Anderson [Tue, 14 Dec 2010 19:42:53 +0000 (19:42 +0000)]
Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121784
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 19:38:49 +0000 (19:38 +0000)]
Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121783
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 18:53:47 +0000 (18:53 +0000)]
Use TRI::printReg instead of AbstractRegisterDescription when printing
LiveIntervalUnions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121781
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 18:53:39 +0000 (18:53 +0000)]
Add TargetRegisterInfo::printReg() to pretty-print registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121780
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Jim Grosbach [Tue, 14 Dec 2010 18:46:57 +0000 (18:46 +0000)]
ARM Fixups relative to thumb functions need to have the low bit of the value
set for interworking to work properly. rdar://
8755956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121778
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 17:47:36 +0000 (17:47 +0000)]
Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121774
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Daniel Dunbar [Tue, 14 Dec 2010 17:37:16 +0000 (17:37 +0000)]
MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121772
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Jim Grosbach [Tue, 14 Dec 2010 16:25:15 +0000 (16:25 +0000)]
Trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121769
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Bill Wendling [Tue, 14 Dec 2010 12:33:05 +0000 (12:33 +0000)]
Use the integer scheduling intrinsic for integer loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121765
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Chris Lattner [Tue, 14 Dec 2010 08:46:09 +0000 (08:46 +0000)]
- Insert new instructions before DomBlock's terminator,
which is simpler than finding a place to insert in BB.
- Don't perform the 'if condition hoisting' xform on certain
i1 PHIs, as it interferes with switch formation.
This re-fixes "example 7", without breaking the world hopefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121764
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Chris Lattner [Tue, 14 Dec 2010 08:01:53 +0000 (08:01 +0000)]
fix two significant issues with FoldTwoEntryPHINode:
first, it can kick in on blocks whose conditions have been
folded to a constant, even though one of the edges will be
trivially folded.
second, it doesn't clean up the "if diamond" that it just
eliminated away. This is a problem because other simplifycfg
xforms kick in depending on the order of block visitation,
causing pointless work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121762
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Chris Lattner [Tue, 14 Dec 2010 07:53:03 +0000 (07:53 +0000)]
remove the instsimplify logic I added in r121754. It is apparently
breaking the selfhost builds, though I can't fathom how.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121761
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Chris Lattner [Tue, 14 Dec 2010 07:41:39 +0000 (07:41 +0000)]
clean up logic, convert std::set to SmallPtrSet, handle the case
when all 2-entry phis are simplified away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121760
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Chris Lattner [Tue, 14 Dec 2010 07:23:10 +0000 (07:23 +0000)]
tidy up a bit, move DEBUG down to when we commit to doing the transform so we
don't print it unless the xform happens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121758
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Chris Lattner [Tue, 14 Dec 2010 07:20:29 +0000 (07:20 +0000)]
use SimplifyInstruction instead of reimplementing part of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121757
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Chris Lattner [Tue, 14 Dec 2010 07:15:21 +0000 (07:15 +0000)]
simplify GetIfCondition by using getSinglePredecessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121756
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Chris Lattner [Tue, 14 Dec 2010 07:09:42 +0000 (07:09 +0000)]
use AddPredecessorToBlock in 3 places instead of a manual loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121755
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Chris Lattner [Tue, 14 Dec 2010 07:00:00 +0000 (07:00 +0000)]
make FoldTwoEntryPHINode use instsimplify a bit, make
GetIfCondition faster by avoiding pred_iterator. No
really interesting change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121754
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Chris Lattner [Tue, 14 Dec 2010 06:51:55 +0000 (06:51 +0000)]
remove the dead (and terrible) llvm::RemoveSuccessor function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121753
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Chris Lattner [Tue, 14 Dec 2010 06:17:25 +0000 (06:17 +0000)]
improve DEBUG's a bit, switch to eraseFromParent() to simplify
code a bit, switch from constant folding to instsimplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121751
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Chris Lattner [Tue, 14 Dec 2010 06:09:07 +0000 (06:09 +0000)]
fix yet anohter broken line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121750
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Chris Lattner [Tue, 14 Dec 2010 05:57:30 +0000 (05:57 +0000)]
reapply my recent change that disables a piece of the switch formation
work, but fixes 400.perlbmk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121749
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Bill Wendling [Tue, 14 Dec 2010 03:36:38 +0000 (03:36 +0000)]
The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.
The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.
There are some obvious cleanups here, which will happen shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747
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Evan Cheng [Tue, 14 Dec 2010 03:22:07 +0000 (03:22 +0000)]
bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://
8458663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121746
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Jason W Kim [Tue, 14 Dec 2010 01:42:38 +0000 (01:42 +0000)]
fix fixme case typo :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121743
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 00:58:47 +0000 (00:58 +0000)]
Remove unused vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121741
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 00:55:51 +0000 (00:55 +0000)]
Add IntervalMap to the Programmer's Manual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121740
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 00:37:52 +0000 (00:37 +0000)]
Remove debugging code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121738
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 00:37:49 +0000 (00:37 +0000)]
Try reassigning all virtual register interferences, not just those with lower
spill weight. Filter out fixed registers instead.
Add support for reassigning an interference that was assigned to an alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121737
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Jakob Stoklund Olesen [Tue, 14 Dec 2010 00:37:44 +0000 (00:37 +0000)]
Add stub for RAGreedy::trySplit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121736
91177308-0d34-0410-b5e6-
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Owen Anderson [Tue, 14 Dec 2010 00:36:49 +0000 (00:36 +0000)]
Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire
process cleaner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121735
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Owen Anderson [Mon, 13 Dec 2010 23:49:28 +0000 (23:49 +0000)]
Fix recent buildbot breakage by pulling SimplifyCFG back to its state as of r121694, the most recent state
where I'm confident there were no crashes or miscompilations. XFAIL the test added since then for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121733
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Jason W Kim [Mon, 13 Dec 2010 23:16:07 +0000 (23:16 +0000)]
First cut of ARM/MC/ELF PIC relocations.
Test has fixme, to move to .s -> .o test when AsmParser works better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121732
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Bob Wilson [Mon, 13 Dec 2010 23:02:37 +0000 (23:02 +0000)]
Remove the rest of the *_sfp Neon instruction patterns.
Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now. It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior. Since that isn't obviously wrong, I've just
changed the test file. This completes the work for Radar
8711675.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121730
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Bob Wilson [Mon, 13 Dec 2010 23:02:31 +0000 (23:02 +0000)]
Simplify N2VSPat, removing some unnecessary type arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121729
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Chris Lattner [Mon, 13 Dec 2010 23:02:19 +0000 (23:02 +0000)]
temporarily disable part of my previous patch, which causes an iterator invalidation issue, causing a crash on some versions of perlbmk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121728
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Dan Gohman [Mon, 13 Dec 2010 22:53:18 +0000 (22:53 +0000)]
Update a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121727
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Owen Anderson [Mon, 13 Dec 2010 22:51:08 +0000 (22:51 +0000)]
Revert r121721, which broke buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121726
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Dan Gohman [Mon, 13 Dec 2010 22:50:24 +0000 (22:50 +0000)]
Reapply r121520, PartialAlias implementation for BasicAA, now that
memdep is updated to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121725
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Dan Gohman [Mon, 13 Dec 2010 22:47:57 +0000 (22:47 +0000)]
Update memdep to handle PartialAlias as MayAlias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121723
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Owen Anderson [Mon, 13 Dec 2010 22:29:52 +0000 (22:29 +0000)]
Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR,
which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121721
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Bob Wilson [Mon, 13 Dec 2010 22:05:55 +0000 (22:05 +0000)]
Delete a line that I forgot to revert previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121719
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Bob Wilson [Mon, 13 Dec 2010 21:58:05 +0000 (21:58 +0000)]
Use COPY_TO_REGCLASS instead of pseudo instructions for Neon FP patterns.
Jakob Olesen suggested that we can avoid the need for separate pseudo
instructions here by using COPY_TO_REGCLASS in the patterns. The pattern
gets pretty ugly but it seems to work well. Partial fix for Radar
8711675.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121718
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Bob Wilson [Mon, 13 Dec 2010 21:05:52 +0000 (21:05 +0000)]
Use pseudo instructions for 2-register Neon instructions for scalar FP.
Partial fix for Radar
8711675.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121716
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Bob Wilson [Mon, 13 Dec 2010 21:05:44 +0000 (21:05 +0000)]
Remove unused instruction class arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121715
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Evan Cheng [Mon, 13 Dec 2010 20:32:54 +0000 (20:32 +0000)]
Generalize BFI isel lowering a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121714
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Chris Lattner [Mon, 13 Dec 2010 19:55:30 +0000 (19:55 +0000)]
add some DEBUG's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121711
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Owen Anderson [Mon, 13 Dec 2010 19:31:11 +0000 (19:31 +0000)]
In Thumb2, direct branches can be encoded as either a "short" conditional branch with a null predicate, or
as a "long" direct branch. While the mnemonics are the same, they encode the branch offset differently, and
the Darwin assembler appears to prefer the "long" form for direct branches. Thus, in the name of bitwise
equivalence, provide encoding and fixup support for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121710
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Jim Grosbach [Mon, 13 Dec 2010 19:25:46 +0000 (19:25 +0000)]
Use 32-bit types for 32-bit values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121709
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Jim Grosbach [Mon, 13 Dec 2010 19:18:13 +0000 (19:18 +0000)]
Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121708
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Benjamin Kramer [Mon, 13 Dec 2010 18:20:38 +0000 (18:20 +0000)]
Fix sort predicate. qsort(3)'s predicate semantics differ from std::sort's. Fixes PR 8780.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121705
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Chris Lattner [Mon, 13 Dec 2010 08:39:40 +0000 (08:39 +0000)]
rename test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121697
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Chris Lattner [Mon, 13 Dec 2010 08:39:01 +0000 (08:39 +0000)]
Add a couple dag combines to transform mulhi/mullo into a wider multiply
when the wider type is legal. This allows us to compile:
define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
%div = udiv i16 %x, 33
ret i16 %div
}
into:
test1: # @test1
movzwl 4(%esp), %eax
imull $63551, %eax, %eax # imm = 0xF83F
shrl $21, %eax
ret
instead of:
test1: # @test1
movw $-1985, %ax # imm = 0xFFFFFFFFFFFFF83F
mulw 4(%esp)
andl $65504, %edx # imm = 0xFFE0
movl %edx, %eax
shrl $5, %eax
ret
Implementing rdar://
8760399 and example #4 from:
http://blog.regehr.org/archives/320
We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121696
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Chris Lattner [Mon, 13 Dec 2010 08:12:19 +0000 (08:12 +0000)]
reinstate my patch: the miscompile was caused by an inverted branch in the
'and' case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121695
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Chris Lattner [Mon, 13 Dec 2010 07:41:29 +0000 (07:41 +0000)]
Completely disable the optimization I added in r121680 until
I can track down a miscompile. This should bring the buildbots
back to life
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121693
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Chris Lattner [Mon, 13 Dec 2010 07:35:47 +0000 (07:35 +0000)]
remove the verbose-asm "constant pool double" comments that we were printing
for each constant pool entry. Using WriteTypeSymbolic here takes time
proportional to the size of the module, for each constant pool entry.
This speeds up -verbose-asm llc on 252.eon (a random testcase at my disposal)
from 4.4s to 2.137s. llc takes 2.11s with asm-verbose off, so this is now a
pretty reasonable cost for verbose comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121691
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Chris Lattner [Mon, 13 Dec 2010 07:00:06 +0000 (07:00 +0000)]
Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
when simplifying, allowing them to be eagerly turned into switches. This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320
On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:
_crud: ## @crud
## BB#0: ## %entry
cmpb $33, %dil
jb LBB0_4
## BB#1: ## %switch.early.test
addb $-34, %dil
cmpb $58, %dil
ja LBB0_3
## BB#2: ## %switch.early.test
movzbl %dil, %eax
movabsq $
288230376537592865, %rcx ## imm = 0x400000017001421
btq %rax, %rcx
jb LBB0_4
LBB0_3: ## %lor.rhs
xorl %eax, %eax
ret
LBB0_4: ## %lor.end
movl $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121690
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Chris Lattner [Mon, 13 Dec 2010 06:36:51 +0000 (06:36 +0000)]
make this logic a bit simpler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121689
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Chris Lattner [Mon, 13 Dec 2010 06:25:44 +0000 (06:25 +0000)]
split all the guts of SimplifyCFGOpt::run out into one function
per terminator kind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121688
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Chris Lattner [Mon, 13 Dec 2010 05:34:18 +0000 (05:34 +0000)]
fix a bug in r121680 that upset the various buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121687
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